drivers: uart for LPC devices interrupt enabled
NXP's MCU LPC families uart interrupt was enabled. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
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bf0f6d911d
commit
58e05ddcc1
6 changed files with 206 additions and 5 deletions
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@ -11,6 +11,7 @@ CONFIG_BOARD_LPCXPRESSO54114_M4=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_PINMUX=y
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@ -10,6 +10,7 @@ CONFIG_BOARD_LPCXPRESSO55S69_CPU0=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_PINMUX=y
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@ -8,6 +8,7 @@ menuconfig USART_MCUX_LPC
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bool "MCUX USART driver"
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depends on HAS_MCUX
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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help
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Enable the MCUX USART driver.
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@ -5,12 +5,11 @@
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*/
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/** @file
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* @brief USART driver for LPC54XXX family
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* @brief USART driver for LPC54XXX and LPC55xxx families.
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*
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* Note:
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* - Only basic USART features sufficient to support printf functionality
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* are currently implemented.
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* - The driver works only in polling mode, interrupt mode is not implemented.
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* - The driver is implemented for only one device, multiple instances
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* will be implemented in the future.
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*/
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#include <errno.h>
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@ -25,10 +24,16 @@ struct usart_mcux_lpc_config {
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USART_Type *base;
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clock_name_t clock_source;
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u32_t baud_rate;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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void (*irq_config_func)(struct device *dev);
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#endif
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};
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struct usart_mcux_lpc_data {
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/* put irq call back instance when required */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t callback;
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void *cb_data;
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#endif
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};
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static int usart_mcux_lpc_poll_in(struct device *dev, unsigned char *c)
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@ -83,6 +88,158 @@ static int usart_mcux_lpc_err_check(struct device *dev)
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return err;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int usart_mcux_lpc_fifo_fill(struct device *dev, const u8_t *tx_data,
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int len)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u8_t num_tx = 0U;
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while ((len - num_tx > 0) &&
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(USART_GetStatusFlags(config->base)
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& kUSART_TxFifoNotFullFlag)) {
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USART_WriteByte(config->base, tx_data[num_tx++]);
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}
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return num_tx;
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}
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static int usart_mcux_lpc_fifo_read(struct device *dev, u8_t *rx_data,
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const int len)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u8_t num_rx = 0U;
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while ((len - num_rx > 0) &&
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(USART_GetStatusFlags(config->base)
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& kUSART_RxFifoNotEmptyFlag)) {
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rx_data[num_rx++] = USART_ReadByte(config->base);
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}
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return num_rx;
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}
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static void usart_mcux_lpc_irq_tx_enable(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kUSART_TxLevelInterruptEnable;
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USART_EnableInterrupts(config->base, mask);
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}
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static void usart_mcux_lpc_irq_tx_disable(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kUSART_TxLevelInterruptEnable;
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USART_DisableInterrupts(config->base, mask);
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}
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static int usart_mcux_lpc_irq_tx_complete(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t flags = USART_GetStatusFlags(config->base);
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return (flags & kUSART_TxFifoEmptyFlag) != 0U;
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}
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static int usart_mcux_lpc_irq_tx_ready(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kUSART_TxLevelInterruptEnable;
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return (USART_GetEnabledInterrupts(config->base) & mask)
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&& usart_mcux_lpc_irq_tx_complete(dev);
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}
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static void usart_mcux_lpc_irq_rx_enable(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kUSART_RxLevelInterruptEnable;
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USART_EnableInterrupts(config->base, mask);
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}
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static void usart_mcux_lpc_irq_rx_disable(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kUSART_RxLevelInterruptEnable;
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USART_DisableInterrupts(config->base, mask);
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}
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static int usart_mcux_lpc_irq_rx_full(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t flags = USART_GetStatusFlags(config->base);
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return (flags & kUSART_RxFifoNotEmptyFlag) != 0U;
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}
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static int usart_mcux_lpc_irq_rx_ready(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kUSART_RxLevelInterruptEnable;
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return (USART_GetEnabledInterrupts(config->base) & mask)
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&& usart_mcux_lpc_irq_rx_full(dev);
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}
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static void usart_mcux_lpc_irq_err_enable(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kStatus_USART_NoiseError |
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kStatus_USART_FramingError |
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kStatus_USART_ParityError;
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USART_EnableInterrupts(config->base, mask);
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}
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static void usart_mcux_lpc_irq_err_disable(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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u32_t mask = kStatus_USART_NoiseError |
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kStatus_USART_FramingError |
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kStatus_USART_ParityError;
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USART_DisableInterrupts(config->base, mask);
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}
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static int usart_mcux_lpc_irq_is_pending(struct device *dev)
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{
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return (usart_mcux_lpc_irq_tx_ready(dev)
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|| usart_mcux_lpc_irq_rx_ready(dev));
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}
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static int usart_mcux_lpc_irq_update(struct device *dev)
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{
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return 1;
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}
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static void usart_mcux_lpc_irq_callback_set(struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct usart_mcux_lpc_data *data = dev->driver_data;
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data->callback = cb;
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data->cb_data = cb_data;
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}
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static void usart_mcux_lpc_isr(void *arg)
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{
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struct device *dev = arg;
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struct usart_mcux_lpc_data *data = dev->driver_data;
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if (data->callback) {
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data->callback(data->cb_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static int usart_mcux_lpc_init(struct device *dev)
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{
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const struct usart_mcux_lpc_config *config = dev->config->config_info;
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@ -98,6 +255,10 @@ static int usart_mcux_lpc_init(struct device *dev)
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USART_Init(config->base, &usart_config, clock_freq);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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config->irq_config_func(dev);
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#endif
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return 0;
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}
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@ -105,13 +266,36 @@ static const struct uart_driver_api usart_mcux_lpc_driver_api = {
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.poll_in = usart_mcux_lpc_poll_in,
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.poll_out = usart_mcux_lpc_poll_out,
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.err_check = usart_mcux_lpc_err_check,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = usart_mcux_lpc_fifo_fill,
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.fifo_read = usart_mcux_lpc_fifo_read,
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.irq_tx_enable = usart_mcux_lpc_irq_tx_enable,
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.irq_tx_disable = usart_mcux_lpc_irq_tx_disable,
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.irq_tx_complete = usart_mcux_lpc_irq_tx_complete,
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.irq_tx_ready = usart_mcux_lpc_irq_tx_ready,
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.irq_rx_enable = usart_mcux_lpc_irq_rx_enable,
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.irq_rx_disable = usart_mcux_lpc_irq_rx_disable,
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.irq_rx_ready = usart_mcux_lpc_irq_rx_ready,
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.irq_err_enable = usart_mcux_lpc_irq_err_enable,
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.irq_err_disable = usart_mcux_lpc_irq_err_disable,
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.irq_is_pending = usart_mcux_lpc_irq_is_pending,
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.irq_update = usart_mcux_lpc_irq_update,
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.irq_callback_set = usart_mcux_lpc_irq_callback_set,
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#endif
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};
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#ifdef CONFIG_USART_MCUX_LPC_0
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart_mcux_lpc_config_func_0(struct device *dev);
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#endif
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static const struct usart_mcux_lpc_config usart_mcux_lpc_0_config = {
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.base = (USART_Type *)DT_USART_MCUX_LPC_0_BASE_ADDRESS,
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.clock_source = kCLOCK_Flexcomm0,
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.baud_rate = DT_USART_MCUX_LPC_0_BAUD_RATE,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = usart_mcux_lpc_config_func_0,
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#endif
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};
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static struct usart_mcux_lpc_data usart_mcux_lpc_0_data;
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@ -121,4 +305,16 @@ DEVICE_AND_API_INIT(usart_0, DT_USART_MCUX_LPC_0_NAME,
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&usart_mcux_lpc_0_data, &usart_mcux_lpc_0_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&usart_mcux_lpc_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart_mcux_lpc_config_func_0(struct device *dev)
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{
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IRQ_CONNECT(DT_USART_MCUX_LPC_0_IRQ,
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DT_USART_MCUX_LPC_0_IRQ_PRI,
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usart_mcux_lpc_isr, DEVICE_GET(usart_0), 0);
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irq_enable(DT_USART_MCUX_LPC_0_IRQ);
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}
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#endif
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#endif /* CONFIG_USART_MCUX_LPC_0 */
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@ -14,6 +14,7 @@
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#define DT_USART_MCUX_LPC_0_BASE_ADDRESS DT_NXP_LPC_USART_40086000_BASE_ADDRESS
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#define DT_USART_MCUX_LPC_0_BAUD_RATE DT_NXP_LPC_USART_40086000_CURRENT_SPEED
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#define DT_USART_MCUX_LPC_0_IRQ DT_NXP_LPC_USART_40086000_IRQ_0
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#define DT_USART_MCUX_LPC_0_IRQ_PRI DT_NXP_LPC_USART_40086000_IRQ_0_PRIORITY
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#define DT_USART_MCUX_LPC_0_NAME DT_NXP_LPC_USART_40086000_LABEL
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@ -10,6 +10,7 @@
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#define DT_USART_MCUX_LPC_0_BASE_ADDRESS DT_NXP_LPC_USART_50086000_BASE_ADDRESS
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#define DT_USART_MCUX_LPC_0_BAUD_RATE DT_NXP_LPC_USART_50086000_CURRENT_SPEED
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#define DT_USART_MCUX_LPC_0_IRQ DT_NXP_LPC_USART_50086000_IRQ_0
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#define DT_USART_MCUX_LPC_0_IRQ_PRI DT_NXP_LPC_USART_50086000_IRQ_0_PRIORITY
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#define DT_USART_MCUX_LPC_0_NAME DT_NXP_LPC_USART_50086000_LABEL
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