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arc: hsdk: add pinmux driver support and doc enhancement

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* add pinmux driver. hsdk board has arduino, mikrobus and
  pmod interfaces, which can be confiured for different function,
  such as: gpio, spi, uart, iic.
* add introduction for arduino, mikrobus and pmod interfaces.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
This commit is contained in:
Watson Zeng 2019-09-10 11:18:25 +08:00 • committed by Anas Nashif
commit 9eb379f2bf
13 changed files with 436 additions and 5 deletions
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1
CODEOWNERS
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@ -139,6 +139,7 @@
/drivers/modem/ @mike-scott
/drivers/pcie/ @gnuless
/drivers/pinmux/stm32/ @rsalveti @idlethread
/drivers/pinmux/*hsdk* @iriszzw
/drivers/sensor/ @MaureenHelm
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter

7
boards/arc/hsdk/CMakeLists.txt Normal file
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@ -0,0 +1,7 @@
#
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: Apache-2.0
#
zephyr_sources_ifdef(CONFIG_PINMUX_HSDK pinmux.c)

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282
boards/arc/hsdk/doc/index.rst
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@ -20,13 +20,286 @@ software on a comprehensive hardware platform
:alt: DesignWare(R) ARC(R) HS Development Kit (synopsys.com)
For details about the board, see: `ARC HS Development Kit
(IoTDK) <https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__
(HSDK) <https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__
Hardware
********
For hardware feature details, refer to :
`Designware HS Development Kit website`_.
The ARC HSDK has 24 general GPIOs, which divided into 8 groups named from GPIO_SEL_0 to GPIO_SEL_7.
Each sel can configured for different functions, such as: GPIO, UART, SPI, I2C and PWM. We can program
CREG_GPIO_MUX register to do configuration for each sel. Tables below show the bit definition for
CREG_GPIO_MUX register and the details configuration for each pin.
+--------+-------------+---------+--------------+---------------------------------+
| Bit | Name | Access | Reset value | Description |
+--------+-------------+---------+--------------+---------------------------------+
| 2:0 | GPIO_SEL_0 | RW | 0x0* | GPIO mux select for gpio[3:0] |
+--------+-------------+---------+--------------+---------------------------------+
| 5:3 | GPIO_SEL_1 | RW | 0x0* | GPIO mux select for gpio[7:4] |
+--------+-------------+---------+--------------+---------------------------------+
| 8:6 | GPIO_SEL_2 | RW | 0x0* | GPIO mux select for gpio[11:8] |
+--------+-------------+---------+--------------+---------------------------------+
| 11:9 | GPIO_SEL_3 | RW | 0x0* | GPIO mux select for gpio[15:12] |
+--------+-------------+---------+--------------+---------------------------------+
| 14:12 | GPIO_SEL_4 | RW | 0x0* | GPIO mux select for gpio[17:16] |
+--------+-------------+---------+--------------+---------------------------------+
| 17:15 | GPIO_SEL_5 | RW | 0x0* | GPIO mux select for gpio[19:18] |
+--------+-------------+---------+--------------+---------------------------------+
| 20:18 | GPIO_SEL_6 | RW | 0x0* | GPIO mux select for gpio[21:20] |
+--------+-------------+---------+--------------+---------------------------------+
| 23:21 | GPIO_SEL_7 | RW | 0x0* | GPIO mux select for gpio[23:22] |
+--------+-------------+---------+--------------+---------------------------------+
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SELS | GPIO PINS | FUN0 | FUN1 | FUN2 | FUN3 | FUN4 | FUN5 | FUN6 | FUN7 |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL0 | 0 | gpio[0] | uart0_cts | spi1_cs[0] | gpio[0] | gpio[0] | pwm_ch[6] | pwm_ch[6] | pwm_ch[1] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 1 | gpio[1] | uart0_txd | spi1_mosi | gpio[1] | pwm_ch[0] | gpio[1] | pwm_ch[0] | pwm_ch[0] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 2 | gpio[2] | uart0_rxd | spi1 _miso | i2c1_scl | gpio[2] | gpio[2] | gpio[2] | gpio[2] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 3 | gpio[3] | uart0_rts | spi1_clk | i2c1_sda | gpio[3] | gpio[3] | gpio[3] | gpio[3] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL1 | 4 | gpio[4] | uart1_cts | spi2_cs[0] | gpio[4] | gpio[4] | pwm_ch[4] | pwm_ch[4] | pwm_ch[3] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 5 | gpio[5] | uart1_txd | spi2_mosi | gpio[5] | pwm_ch[2] | gpio[5] | pwm_ch[2] | pwm_ch[2] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 6 | gpio[6] | uart1_rxd | spi2_miso | i2c2_scl | gpio[6] | gpio[6] | gpio[6] | gpio[6] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 7 | gpio[7] | uart1_rts | spi2_clk | i2c2_sda | gpio[7] | gpio[7] | gpio[7] | gpio[7] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL2 | 8 | gpio[8] | uart2_cts | spi1_cs[1] | gpio[8] | gpio[8] | pwm_ch[2] | pwm_ch[2] | pwm_ch[5] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 9 | gpio[9] | uart2_txd | spi1_mosi | gpio[9] | pwm_ch[4] | gpio[9] | pwm_ch[4] | pwm_ch[4] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 10 | gpio[10] | uart2_rxd | spi1_miso | i2c1_scl | gpio[10] | gpio[10] | gpio[10] | gpio[10] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 11 | gpio[11] | uart2_rts | spi1_clk | i2c1_sda | gpio[11] | gpio[11] | gpio[11] | gpio[11] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL3 | 12 | gpio[12] | uart0_cts | spi2_cs[1] | gpio[12] | gpio[12] | pwm_ch[0] | pwm_ch[0] | pwm_ch[7] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 13 | gpio[13] | uart0_txd | spi2_mosi | gpio[13] | pwm_ch[6] | gpio[13] | pwm_ch[6] | pwm_ch[6] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 14 | gpio[14] | uart0_rxd | spi2_miso | i2c2_scl | gpio[14] | gpio[14] | gpio[14] | gpio[14] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 15 | gpio[15] | uart0_rts | spi2_clk | i2c2_sda | gpio[15] | gpio[15] | gpio[15] | gpio[15] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL4 | 16 | gpio[16] | uart1_txd | spi1_cs[2] | i2c1_scl | gpio[16] | pwm_fault_0 | gpio[16] | pwm_fault_0 |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 17 | gpio[17] | uart1_rxd | spi1_mosi | i2c1_sda | pwm_ch[0] | pwm_ch[0] | pwm_ch[5] | pwm_ch[5] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL5 | 18 | gpio[18] | uart2_txd | spi1_miso | i2c2_scl | gpio[18] | gpio[18] | gpio[18] | gpio[18] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 19 | gpio[19] | uart2_rxd | spi1_clk | i2c2_sda | gpio[19] | gpio[19] | gpio[19] | gpio[19] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL6 | 20 | gpio[20] | uart0_txd | spi2_cs[2] | i2c1_scl | gpio[20] | pwm_fault_1 | gpio[20] | pwm_fault_1 |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 21 | gpio[21] | uart0_rxd | spi2_mosi | i2c1_sda | pwm_ch[6] | pwm_ch[6] | pwm_ch[3] | pwm_ch[3] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| SEL7 | 22 | gpio[22] | uart2_txd | spi2_miso | i2c2_scl | gpio[22] | gpio[22] | gpio[22] | gpio[22] |
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
| | 23 | gpio[23] | uart2_rxd | spi2_clk | i2c2_sda | gpio[23] | gpio[23] | gpio[23] | gpio[23] |
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
Digilent Pmod
=============
The ARC HSDK features two 12-pin Pmod connectors Pmod_A and Pmod_B and one 6-pin Pmod connector Pmod_C.
The functionality of the Pmod connectors is programmable and includes GPIO, UART, SPI, I2C and PWM.
The location of the pins on the Pmod connectors is shown in Figure below. Detailed pin descriptions
depending on the pin multiplexer settings are provided in the subsequent sections.
.. image:: ./pinout_diagram_of_the_pmod.jpg
:width: 442px
:align: center
:alt: Pinout Diagram of the Pmod
Pmod_A Connector
----------------
Table below lists the pin assignment of valid protocols that can be multiplexed on the Pmod_A
connector. The GPIO column is the default assignment after Reset.
+------+-----------+------------+-------------+-----------+------------+-----------+
| Pin | GPIO | UART | SPI | I2C | PWM_1 | PWM_2 |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A1 | gpio[8] | uart2_cts | spi1_cs[1] | gpio[8] | gpio[8] | pwm_ch[2] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A2 | gpio[9] | uart2_txd | spi1_mosi | gpio[9] | pwm_ch[4] | gpio[9] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A3 | gpio[10] | uart2_rxd | spi1_miso | i2c1_scl | gpio[10] | gpio[10] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A4 | gpio[11] | uart2_rts | spi1_clk | i2c1_sda | gpio[11] | gpio[11] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A5 | GND | GND | GND | GND | GND | GND |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A7 | gpio[20] | gpio[20] | gpio[20] | gpio[20] | gpio[20] | gpio[20] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A8 | gpio[21] | gpio[21] | gpio[21] | gpio[21] | gpio[21] | gpio[21] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A9 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A10 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A11 | GND | GND | GND | GND | GND | GND |
+------+-----------+------------+-------------+-----------+------------+-----------+
| A12 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
+------+-----------+------------+-------------+-----------+------------+-----------+
Pmod_B Connector
----------------
Table below lists the pin assignment of valid protocols that can be multiplexed on the Pmod_B
connector. The GPIO column is the default assignment after Reset.
+------+-----------+------------+-------------+-----------+------------+-----------+
| Pin | GPIO | UART | SPI | I2C | PWM_1 | PWM_2 |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B1 | gpio[12] | uart0_cts | spi2_cs[1] | gpio[12] | gpio[12] | pwm_ch[0] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B2 | gpio[13] | uart0_txd | spi2_mosi | gpio[13] | pwm_ch[6] | gpio[13] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B3 | gpio[14] | uart0_rxd | spi2_miso | i2c2_scl | gpio[14] | gpio[14] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B4 | gpio[15] | uart0_rts | spi2_clk | i2c2_sda | gpio[15] | gpio[15] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B5 | GND | GND | GND | GND | GND | GND |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B7 | gpio[22] | gpio[22] | gpio[22] | gpio[22] | gpio[22] | gpio[22] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B8 | gpio[23] | gpio[23] | gpio[23] | gpio[23] | gpio[23] | gpio[23] |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B9 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B10 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B11 | GND | GND | GND | GND | GND | GND |
+------+-----------+------------+-------------+-----------+------------+-----------+
| B12 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
+------+-----------+------------+-------------+-----------+------------+-----------+
Pmod_C Connector
----------------
Table below lists the pin assignment of valid protocols that can be multiplexed on the Pmod_C
connector. The GPIO column is the default assignment after Reset.
+------+-----------+------------+-------------+-----------+-----------+
| Pin | GPIO | UART | SPI | I2C | PWM |
+------+-----------+------------+-------------+-----------+-----------+
| C1 | gpio[16] | uart1_txd | spi1_cs[2] | i2c1_scl | gpio[16] |
+------+-----------+------------+-------------+-----------+-----------+
| C2 | gpio[17] | uart1_rxd | spi1_mosi | i2c1_sda | pwm_ch[0] |
+------+-----------+------------+-------------+-----------+-----------+
| C3 | gpio[18] | uart2_txd | spi1_miso | i2c2_scl | gpio[18] |
+------+-----------+------------+-------------+-----------+-----------+
| C4 | gpio[19] | uart2_rxd | spi1_clk | i2c2_sda | gpio[19] |
+------+-----------+------------+-------------+-----------+-----------+
| C5 | GND | GND | GND | GND | GND |
+------+-----------+------------+-------------+-----------+-----------+
| C6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
+------+-----------+------------+-------------+-----------+-----------+
Mikrobus
========
The ARC HSDK features a set of MikroBUS headers. Figure below shows the relevant function assignments,
fully compatible with the MikroBUS standard. Table below shows the pin assignment on the I/O Multiplexer.
.. image:: ./mikrobus_header.jpg
:width: 442px
:align: center
:alt: mikrobus header
+-------+-----------------+------+-----------+
| Pin | I/O | Pin | I/O |
+-------+-----------------+------+-----------+
| AN | ADC VIN6* | PWM | pwm_ch[0] |
+-------+-----------------+------+-----------+
| RST | GPX_Port0_bit1 | INT | gpio[16] |
+-------+-----------------+------+-----------+
| CS | spi2_cs[1] | RX | uart2_rxd |
+-------+-----------------+------+-----------+
| SCK | spi2_clk | TX | uart2_txd |
+-------+-----------------+------+-----------+
| MISO | spi2_miso | SCL | i2c2_scl |
+-------+-----------------+------+-----------+
| MOSI | spi2_mosi | SDA | i2c2_sda |
+-------+-----------------+------+-----------+
.. note::
ADC VIN6 is available through the on-board ADC and is
read though SPI0 using SPI chip select 1.
Arduino
=======
The ARC HSDK provides an Arduino shield interface. Figure below shows the relevant
function assignments. The Arduino shield interface is compatible with the Arduino UNO
R3 with the following exceptions: 5 Volt shields are not supported, the IOREF voltage on
the ARC HSDK board is fixed to 3V3. Note that the ICSP header is also not available. Most
shields do not require this ICSP header as the SPI master interface on this ICSP header
is also available on the IO10 to IO13 pins.
.. image:: ./arduino_shield_interface.jpg
:width: 442px
:align: center
:alt: arduino shield interface
Table below shows the pin assignment on the I/O Multiplexer. Multiplexing is controlled by software
using the CREG_GPIO_MUX register (see Pinmux ). After a reset, all ports are configured as GPIO inputs.
+-------+------------+-----------------+------------+
| Pin | I/O-1 | I/O-2 | I/O-3 |
+-------+------------+-----------------+------------+
| AD0 | ADC VIN0* | GPX_port0_bit2 | - |
+-------+------------+-----------------+------------+
| AD1 | ADC VIN1* | GPX_port0_bit3 | - |
+-------+------------+-----------------+------------+
| AD2 | ADC VIN2* | GPX_port0_bit4 | - |
+-------+------------+-----------------+------------+
| AD3 | ADC VIN3* | GPX_port0_bit5 | - |
+-------+------------+-----------------+------------+
| AD4 | ADC VIN4* | gpio[18] | i2c2_sda |
+-------+------------+-----------------+------------+
| AD5 | ADC VIN5* | gpio[19] | i2c2_scl |
+-------+------------+-----------------+------------+
| IO0 | gpio[23] | uart2_rxd | - |
+-------+------------+-----------------+------------+
| IO1 | gpio[22] | uart2_txd | - |
+-------+------------+-----------------+------------+
| IO2 | gpio[16] | - | - |
+-------+------------+-----------------+------------+
| IO3 | gpio[17] | pwm_ch[5] | - |
+-------+------------+-----------------+------------+
| IO4 | gpio[11] | - | |
+-------+------------+-----------------+------------+
| IO5 | gpio[9] | pwm_ch[4] | - |
+-------+------------+-----------------+------------+
| IO6 | gpio[21] | pwm_ch[3] | - |
+-------+------------+-----------------+------------+
| IO7 | gpio[20] | - | - |
+-------+------------+-----------------+------------+
| IO8 | gpio[10] | - | - |
+-------+------------+-----------------+------------+
| IO9 | gpio[8] | pwm_ch[2] | - |
+-------+------------+-----------------+------------+
| IO10 | gpio[12] | pwm_ch[0] | spi2_cs[1] |
+-------+------------+-----------------+------------+
| IO11 | gpio[13] | pwm_ch[6] | spi2_mosi |
+-------+------------+-----------------+------------+
| IO12 | gpio[14] | - | spi2_miso |
+-------+------------+-----------------+------------+
| IO13 | gpio[15] | - | spi2_clk |
+-------+------------+-----------------+------------+
For hardware feature details, refer to : `Designware HS Development Kit website
<https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__.
Programming and Debugging
*************************
@ -201,8 +474,9 @@ References
.. _embARC website: https://www.embarc.org
.. _Designware HS Development Kit website: <https://www.synopsys.com/dw/ipdir.php?ds=arc_hs_development_kit>`_
.. _Designware HS Development Kit website: https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit
.. _Digilent Pmod Modules: http://store.digilentinc.com/pmod-modules
.. _Putty website: http://www.putty.org

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boards/arc/hsdk/hsdk_defconfig
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@ -13,3 +13,5 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_PINMUX=y
CONFIG_PINMUX_HSDK=y

37
boards/arc/hsdk/pinmux.c Normal file
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@ -0,0 +1,37 @@
/*
* Copyright (c) 2019 Synopsys
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <init.h>
#include <drivers/pinmux.h>
static int board_pinmux_init(struct device *device)
{
ARG_UNUSED(device);
struct device *pinmux = device_get_binding(CONFIG_PINMUX_NAME);
if (pinmux == NULL) {
return -ENXIO;
}
/*
* to do configuration for each sel,
* please refer the doc for hsdk board.
*/
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL0, HSDK_PINMUX_FUN0);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL1, HSDK_PINMUX_FUN0);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL2, HSDK_PINMUX_FUN0);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL3, HSDK_PINMUX_FUN2);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL4, HSDK_PINMUX_FUN0);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL5, HSDK_PINMUX_FUN0);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL6, HSDK_PINMUX_FUN0);
pinmux_pin_set(pinmux, HSDK_PINMUX_SEL7, HSDK_PINMUX_FUN0);
return 0;
}
SYS_INIT(board_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);

1
drivers/pinmux/CMakeLists.txt
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@ -13,3 +13,4 @@ zephyr_sources_ifdef(CONFIG_PINMUX_STM32 stm32/pinmux_stm32.c)
zephyr_sources_ifdef(CONFIG_PINMUX_SAM0 pinmux_sam0.c)
zephyr_sources_ifdef(CONFIG_PINMUX_INTEL_S1000 pinmux_intel_s1000.c)
zephyr_sources_ifdef(CONFIG_PINMUX_RV32M1 pinmux_rv32m1.c)
zephyr_sources_ifdef(CONFIG_PINMUX_HSDK pinmux_hsdk.c)

2
drivers/pinmux/Kconfig
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@ -63,4 +63,6 @@ source "drivers/pinmux/Kconfig.rv32m1"
source "drivers/pinmux/Kconfig.xec"
source "drivers/pinmux/Kconfig.hsdk"
endif # PINMUX

11
drivers/pinmux/Kconfig.hsdk Normal file
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@ -0,0 +1,11 @@
#
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: Apache-2.0
#
menuconfig PINMUX_HSDK
bool "ARC HSDK I/O pin mux driver"
depends on SOC_ARC_HSDK
help
Enable driver for ARC HSDK I/O pin mux.

70
drivers/pinmux/pinmux_hsdk.c Normal file
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@ -0,0 +1,70 @@
/*
* Copyright (c) 2019 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <device.h>
#include <drivers/pinmux.h>
#include <soc.h>
#define creg_gpio_mux_reg (*(volatile u32_t *)CREG_GPIO_MUX_BASE_ADDR)
void _arc_sync(void)
{
__asm__ volatile("sync");
}
static int pinmux_hsdk_set(struct device *dev, u32_t pin, u32_t func)
{
if (func >= HSDK_PINMUX_FUNS || pin >= HSDK_PINMUX_SELS)
return -EINVAL;
creg_gpio_mux_reg &= ~(0x07U << (pin * 3));
creg_gpio_mux_reg |= (func << (pin * 3));
_arc_sync();
return 0;
}
static int pinmux_hsdk_get(struct device *dev, u32_t pin, u32_t *func)
{
if (pin >= HSDK_PINMUX_SELS || func == NULL)
return -EINVAL;
*func = (creg_gpio_mux_reg >> (pin * 3)) & 0x07U;
return 0;
}
static int pinmux_hsdk_pullup(struct device *dev, u32_t pin, u8_t func)
{
return -ENOTSUP;
}
static int pinmux_hsdk_input(struct device *dev, u32_t pin, u8_t func)
{
return -ENOTSUP;
}
static int pinmux_hsdk_init(struct device *dev)
{
ARG_UNUSED(dev);
return 0;
}
static const struct pinmux_driver_api pinmux_hsdk_driver_api = {
.set = pinmux_hsdk_set,
.get = pinmux_hsdk_get,
.pullup = pinmux_hsdk_pullup,
.input = pinmux_hsdk_input,
};
DEVICE_AND_API_INIT(pinmux_hsdk, CONFIG_PINMUX_NAME,
&pinmux_hsdk_init, NULL, NULL,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
&pinmux_hsdk_driver_api);

28
soc/arc/snps_arc_hsdk/soc.h
View file

@ -22,7 +22,9 @@
#define IRQ_TIMER1 17
#define IRQ_ICI 19
#define BASE_ADDR_SYSCONFIG 0xF000A000
#define BASE_ADDR_SYSCONFIG 0xF0000000
#define CREG_GPIO_MUX_BASE_ADDR (BASE_ADDR_SYSCONFIG + 0x1484)
#ifndef _ASMLANGUAGE
@ -37,6 +39,30 @@
#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */
#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */
/* PINMUX IO Hardware Functions */
#define HSDK_PINMUX_FUNS 8
#define HSDK_PINMUX_FUN0 0
#define HSDK_PINMUX_FUN1 1
#define HSDK_PINMUX_FUN2 2
#define HSDK_PINMUX_FUN3 3
#define HSDK_PINMUX_FUN4 4
#define HSDK_PINMUX_FUN5 5
#define HSDK_PINMUX_FUN6 6
#define HSDK_PINMUX_FUN7 7
/* PINMUX MAX SELS */
#define HSDK_PINMUX_SELS 8
#define HSDK_PINMUX_SEL0 0
#define HSDK_PINMUX_SEL1 1
#define HSDK_PINMUX_SEL2 2
#define HSDK_PINMUX_SEL3 3
#define HSDK_PINMUX_SEL4 4
#define HSDK_PINMUX_SEL5 5
#define HSDK_PINMUX_SEL6 6
#define HSDK_PINMUX_SEL7 7
#endif /* !_ASMLANGUAGE */