boards: arm: nucleo_g071rb: enable ARM MPU
We enable Memory Protection on stm32 nucleo_g071rb board, since the respective SoC series implements the ARM MPU. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
parent
3674d3343f
commit
0f7fe2406c
3 changed files with 6 additions and 0 deletions
|
@ -4,6 +4,9 @@ CONFIG_SOC_SERIES_STM32G0X=y
|
|||
CONFIG_SOC_STM32G071XX=y
|
||||
CONFIG_BOARD_NUCLEO_G071RB=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# 64MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=64000000
|
||||
|
||||
|
|
|
@ -46,6 +46,8 @@
|
|||
#define REGION_SRAM_1_SIZE REGION_4K
|
||||
#elif CONFIG_SRAM_SIZE == 32
|
||||
#define REGION_SRAM_0_SIZE REGION_32K
|
||||
#elif CONFIG_SRAM_SIZE == 36
|
||||
#define REGION_SRAM_0_SIZE REGION_64K
|
||||
#elif CONFIG_SRAM_SIZE == 40
|
||||
#define REGION_SRAM_0_SIZE REGION_32K
|
||||
#define REGION_SRAM_1_START 0x8000
|
||||
|
|
|
@ -10,6 +10,7 @@ config SOC_SERIES_STM32G0X
|
|||
bool "STM32G0x Series MCU"
|
||||
select CPU_CORTEX_M0PLUS
|
||||
select CPU_CORTEX_M_HAS_VTOR
|
||||
select CPU_HAS_ARM_MPU
|
||||
select SOC_FAMILY_STM32
|
||||
select HAS_STM32CUBE
|
||||
select CPU_CORTEX_M_HAS_SYSTICK
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue