soc: stm32: Enable cortex-m systick timer by default
Move systick activation in soc/ as a Kconfig.defconfig file and remove activation in boards _defconfig files. This will allow to deactivate it in a more flexible way with upcoming LPTIMER as tick source when power management features are enabled. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
parent
cb6097d283
commit
5881f118c0
63 changed files with 4 additions and 62 deletions
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@ -3,7 +3,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F412CG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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@ -2,7 +2,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_96B_AVENGER96=y
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CONFIG_SOC_SERIES_STM32MP1X=y
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CONFIG_SOC_STM32MP15_M4=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 209 MHz system clock (mlhclk_ck)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000
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@ -3,7 +3,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F401XE=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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@ -3,7 +3,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F411XE=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_96B_STM32_SENSOR_MEZ=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F446XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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@ -1,7 +1,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32L1X=y
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CONFIG_SOC_STM32L151XB=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 32MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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@ -10,7 +10,6 @@ CONFIG_SOC_STM32L072XX=y
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CONFIG_BOARD_B_L072Z_LRWAN1=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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# Clock configuration
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_DISCO_L475_IOT1=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L475XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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@ -10,7 +10,6 @@ CONFIG_SOC_STM32L072XX=y
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CONFIG_BOARD_DRAGINO_LSN50=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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# Serial Drivers
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@ -3,7 +3,6 @@ CONFIG_BOARD_MIKROE_MINI_M4_FOR_STM32=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F415XX=y
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# 168MHz system clock
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
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# Enable MPU
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32F030X8=y
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CONFIG_BOARD_NUCLEO_F030R8=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Kernel Options due to Low Memory (8k)
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32F070XB=y
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CONFIG_BOARD_NUCLEO_F070RB=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Serial Drivers
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32F091XC=y
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CONFIG_BOARD_NUCLEO_F091RC=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Serial Drivers
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F103RB=y
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CONFIG_SOC_SERIES_STM32F1X=y
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CONFIG_SOC_STM32F103XB=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F207ZG=y
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CONFIG_SOC_SERIES_STM32F2X=y
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CONFIG_SOC_STM32F207XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
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CONFIG_SERIAL=y
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@ -3,7 +3,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F3X=y
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CONFIG_SOC_STM32F302X8=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72 MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32F334X8=y
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CONFIG_BOARD_NUCLEO_F334R8=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# Serial Drivers
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F401RE=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F401XE=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F411RE=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F411XE=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F412ZG=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F412ZG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F413ZH=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F413XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F429XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 168MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F446RE=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F446XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F746ZG=y
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CONFIG_SOC_SERIES_STM32F7X=y
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CONFIG_SOC_STM32F746XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock (CubeMX Defaults)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_BOARD_NUCLEO_F756ZG=y
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CONFIG_SOC_SERIES_STM32F7X=y
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CONFIG_SOC_STM32F756XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock (CubeMX Defaults)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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@ -2,7 +2,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32G0X=y
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CONFIG_SOC_STM32G071XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_BOARD_NUCLEO_G071RB=y
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# 64MHz system clock
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32G4X=y
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CONFIG_SOC_STM32G431XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 170MHz system clock only in 'boost power' mode. RM0440, section
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# 5.1.5 states that the R1MODE bit must be cleared before system can
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CONFIG_BOARD_NUCLEO_L053R8=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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# Kernel Options due to Low Memory (8k)
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32L073XX=y
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CONFIG_BOARD_NUCLEO_L073RZ=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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# Serial Drivers
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L432XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L476XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L496XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L4R5XX=y
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CONFIG_BOARD_NUCLEO_L4R5ZI=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 120MHz system clock only in 'boost power' mode. DM00310109, section
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# 5.1.7 states that the R1MODE bit must be cleared before system can
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@ -1,7 +1,6 @@
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32WBX=y
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CONFIG_SOC_STM32WB55XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 32MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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CONFIG_BOARD_OLIMEX_STM32_E407=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F407XG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 168MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_OLIMEX_STM32_H407=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F407XG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 168MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
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CONFIG_BOARD_OLIMEX_STM32_P405=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F405XG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 168MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
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CONFIG_BOARD_OLIMEXINO_STM32=y
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CONFIG_SOC_SERIES_STM32F1X=y
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CONFIG_SOC_STM32F103XB=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L4R9XX=y
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CONFIG_BOARD_SENSORTILE_BOX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 120MHz system clock only in 'boost power' mode. DM00310109, section
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# 5.1.7 states that the R1MODE bit must be cleared before system can
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@ -4,7 +4,6 @@ CONFIG_ARM=y
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CONFIG_BOARD_STEVAL_FCU001V1=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F401XC=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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CONFIG_BOARD_STM3210C_EVAL=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_FLOAT=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# Serial Drivers
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CONFIG_BOARD_STM32_MIN_DEV_BLACK=y
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CONFIG_SOC_SERIES_STM32F1X=y
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CONFIG_SOC_STM32F103X8=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_BOARD_STM32_MIN_DEV_BLUE=y
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CONFIG_SOC_SERIES_STM32F1X=y
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CONFIG_SOC_STM32F103X8=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_BOARD_STM32F030_DEMO=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Kernel Options due to Low Memory (4k)
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@ -10,7 +10,6 @@ CONFIG_SOC_STM32F072XB=y
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CONFIG_BOARD_STM32F072_EVAL=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Serial Drivers
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32F072XB=y
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CONFIG_BOARD_STM32F072B_DISCO=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Serial Drivers
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@ -9,7 +9,6 @@ CONFIG_SOC_STM32F051X8=y
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CONFIG_BOARD_STM32F0_DISCO=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Kernel Options due to Low Memory (8k)
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CONFIG_BOARD_STM32F3_DISCO=y
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CONFIG_SOC_SERIES_STM32F3X=y
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CONFIG_SOC_STM32F303XC=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 72MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F411E_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F4X=y
|
||||
CONFIG_SOC_STM32F411XE=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F412G_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F4X=y
|
||||
CONFIG_SOC_STM32F412ZG=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F429I_DISC1=y
|
||||
CONFIG_SOC_SERIES_STM32F4X=y
|
||||
CONFIG_SOC_STM32F429XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 168MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F469I_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F4X=y
|
||||
CONFIG_SOC_STM32F469XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 180MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F4_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F4X=y
|
||||
CONFIG_SOC_STM32F407XG=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 168MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F723E_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F7X=y
|
||||
CONFIG_SOC_STM32F723XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 216MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F746G_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F7X=y
|
||||
CONFIG_SOC_STM32F746XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 216MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32F769I_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32F7X=y
|
||||
CONFIG_SOC_STM32F769XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 216MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32H747I_DISCO_M4=y
|
||||
CONFIG_SOC_SERIES_STM32H7X=y
|
||||
CONFIG_SOC_STM32H747XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
|
||||
# enable pinmux
|
||||
CONFIG_PINMUX=y
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32H747I_DISCO_M7=y
|
||||
CONFIG_SOC_SERIES_STM32H7X=y
|
||||
CONFIG_SOC_STM32H747XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
|
||||
# enable pinmux
|
||||
CONFIG_PINMUX=y
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32L476G_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32L4X=y
|
||||
CONFIG_SOC_STM32L476XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 80MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
|
||||
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32L496G_DISCO=y
|
||||
CONFIG_SOC_SERIES_STM32L4X=y
|
||||
CONFIG_SOC_STM32L496XX=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 80MHz system clock
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
|
||||
|
||||
|
|
|
@ -2,7 +2,6 @@ CONFIG_ARM=y
|
|||
CONFIG_BOARD_STM32MP157C_DK2=y
|
||||
CONFIG_SOC_SERIES_STM32MP1X=y
|
||||
CONFIG_SOC_STM32MP15_M4=y
|
||||
CONFIG_CORTEX_M_SYSTICK=y
|
||||
# 209 MHz system clock (mlhclk_ck)
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000
|
||||
|
||||
|
|
|
@ -9,6 +9,10 @@
|
|||
|
||||
if SOC_FAMILY_STM32
|
||||
|
||||
# SYSTICK is the default tick source on STM32 Socs
|
||||
config CORTEX_M_SYSTICK
|
||||
default y
|
||||
|
||||
if CLOCK_CONTROL
|
||||
|
||||
config CLOCK_CONTROL_STM32_CUBE
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue