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soc: stm32: Enable cortex-m systick timer by default

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Move systick activation in soc/ as a Kconfig.defconfig file and
remove activation in boards _defconfig files.
This will allow to deactivate it in a more flexible way
with upcoming LPTIMER as tick source when power management
features are enabled.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2019-10-10 13:53:52 +02:00 • committed by Anas Nashif
commit 5881f118c0
63 changed files with 4 additions and 62 deletions
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1
boards/arm/96b_argonkey/96b_argonkey_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F412CG=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

1
boards/arm/96b_avenger96/96b_avenger96_defconfig
View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_BOARD_96B_AVENGER96=y
CONFIG_SOC_SERIES_STM32MP1X=y
CONFIG_SOC_STM32MP15_M4=y
CONFIG_CORTEX_M_SYSTICK=y
# 209 MHz system clock (mlhclk_ck)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000

1
boards/arm/96b_carbon/96b_carbon_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

1
boards/arm/96b_neonkey/96b_neonkey_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

1
boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_96B_STM32_SENSOR_MEZ=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F446XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

1
boards/arm/96b_wistrio/96b_wistrio_defconfig
View file

@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L1X=y
CONFIG_SOC_STM32L151XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 32MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000

1
boards/arm/b_l072z_lrwan1/b_l072z_lrwan1_defconfig
View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32L072XX=y
CONFIG_BOARD_B_L072Z_LRWAN1=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Clock configuration

1
boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_DISCO_L475_IOT1=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L475XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

1
boards/arm/dragino_lsn50/dragino_lsn50_defconfig
View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32L072XX=y
CONFIG_BOARD_DRAGINO_LSN50=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Serial Drivers

1
boards/arm/mikroe_mini_m4_for_stm32/mikroe_mini_m4_for_stm32_defconfig
View file

@ -3,7 +3,6 @@ CONFIG_BOARD_MIKROE_MINI_M4_FOR_STM32=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F415XX=y
# 168MHz system clock
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
# Enable MPU

1
boards/arm/nucleo_f030r8/nucleo_f030r8_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F030X8=y
CONFIG_BOARD_NUCLEO_F030R8=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (8k)

1
boards/arm/nucleo_f070rb/nucleo_f070rb_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F070XB=y
CONFIG_BOARD_NUCLEO_F070RB=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers

1
boards/arm/nucleo_f091rc/nucleo_f091rc_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F091XC=y
CONFIG_BOARD_NUCLEO_F091RC=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers

1
boards/arm/nucleo_f103rb/nucleo_f103rb_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F103RB=y
CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/nucleo_f207zg/nucleo_f207zg_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F207ZG=y
CONFIG_SOC_SERIES_STM32F2X=y
CONFIG_SOC_STM32F207XX=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
CONFIG_SERIAL=y

1
boards/arm/nucleo_f302r8/nucleo_f302r8_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F302X8=y
CONFIG_CORTEX_M_SYSTICK=y
# 72 MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/nucleo_f334r8/nucleo_f334r8_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F334X8=y
CONFIG_BOARD_NUCLEO_F334R8=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Serial Drivers

1
boards/arm/nucleo_f401re/nucleo_f401re_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F401RE=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

1
boards/arm/nucleo_f411re/nucleo_f411re_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F411RE=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

1
boards/arm/nucleo_f412zg/nucleo_f412zg_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F412ZG=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F412ZG=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

1
boards/arm/nucleo_f413zh/nucleo_f413zh_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F413ZH=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F413XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

1
boards/arm/nucleo_f429zi/nucleo_f429zi_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F429XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

1
boards/arm/nucleo_f446re/nucleo_f446re_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F446RE=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F446XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000

1
boards/arm/nucleo_f746zg/nucleo_f746zg_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F746ZG=y
CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F746XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock (CubeMX Defaults)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/nucleo_f756zg/nucleo_f756zg_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F756ZG=y
CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F756XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock (CubeMX Defaults)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/nucleo_g071rb/nucleo_g071rb_defconfig
View file

@ -2,7 +2,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32G0X=y
CONFIG_SOC_STM32G071XX=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_BOARD_NUCLEO_G071RB=y
# 64MHz system clock

1
boards/arm/nucleo_g431rb/nucleo_g431rb_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32G4X=y
CONFIG_SOC_STM32G431XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 170MHz system clock only in 'boost power' mode. RM0440, section
# 5.1.5 states that the R1MODE bit must be cleared before system can

1
boards/arm/nucleo_l053r8/nucleo_l053r8_defconfig
View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32L053XX=y
CONFIG_BOARD_NUCLEO_L053R8=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Kernel Options due to Low Memory (8k)

1
boards/arm/nucleo_l073rz/nucleo_l073rz_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32L073XX=y
CONFIG_BOARD_NUCLEO_L073RZ=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Serial Drivers

1
boards/arm/nucleo_l432kc/nucleo_l432kc_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L432XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

1
boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L476XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

1
boards/arm/nucleo_l496zg/nucleo_l496zg_defconfig
View file

@ -3,7 +3,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L496XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

1
boards/arm/nucleo_l4r5zi/nucleo_l4r5zi_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L4R5XX=y
CONFIG_BOARD_NUCLEO_L4R5ZI=y
CONFIG_CORTEX_M_SYSTICK=y
# 120MHz system clock only in 'boost power' mode. DM00310109, section
# 5.1.7 states that the R1MODE bit must be cleared before system can

1
boards/arm/nucleo_wb55rg/nucleo_wb55rg_defconfig
View file

@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32WBX=y
CONFIG_SOC_STM32WB55XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 32MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000

1
boards/arm/olimex_stm32_e407/olimex_stm32_e407_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEX_STM32_E407=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F407XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

1
boards/arm/olimex_stm32_h407/olimex_stm32_h407_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEX_STM32_H407=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F407XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

1
boards/arm/olimex_stm32_p405/olimex_stm32_p405_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEX_STM32_P405=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F405XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

1
boards/arm/olimexino_stm32/olimexino_stm32_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_OLIMEXINO_STM32=y
CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/sensortile_box/sensortile_box_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L4R9XX=y
CONFIG_BOARD_SENSORTILE_BOX=y
CONFIG_CORTEX_M_SYSTICK=y
# 120MHz system clock only in 'boost power' mode. DM00310109, section
# 5.1.7 states that the R1MODE bit must be cleared before system can

1
boards/arm/steval_fcu001v1/steval_fcu001v1_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STEVAL_FCU001V1=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XC=y
CONFIG_CORTEX_M_SYSTICK=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000

1
boards/arm/stm3210c_eval/stm3210c_eval_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F107XC=y
CONFIG_BOARD_STM3210C_EVAL=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/stm32373c_eval/stm32373c_eval_defconfig
View file

@ -15,7 +15,6 @@ CONFIG_CPU_HAS_FPU=y
CONFIG_FLOAT=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Serial Drivers

1
boards/arm/stm32_min_dev/stm32_min_dev_black_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32_MIN_DEV_BLACK=y
CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103X8=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/stm32_min_dev/stm32_min_dev_blue_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32_MIN_DEV_BLUE=y
CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103X8=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/stm32f030_demo/stm32f030_demo_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F030X4=y
CONFIG_BOARD_STM32F030_DEMO=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (4k)

1
boards/arm/stm32f072_eval/stm32f072_eval_defconfig
View file

@ -10,7 +10,6 @@ CONFIG_SOC_STM32F072XB=y
CONFIG_BOARD_STM32F072_EVAL=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers

1
boards/arm/stm32f072b_disco/stm32f072b_disco_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F072XB=y
CONFIG_BOARD_STM32F072B_DISCO=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Serial Drivers

1
boards/arm/stm32f0_disco/stm32f0_disco_defconfig
View file

@ -9,7 +9,6 @@ CONFIG_SOC_STM32F051X8=y
CONFIG_BOARD_STM32F0_DISCO=y
# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (8k)

1
boards/arm/stm32f3_disco/stm32f3_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F3_DISCO=y
CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F303XC=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000

1
boards/arm/stm32f411e_disco/stm32f411e_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F411E_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y
CONFIG_CORTEX_M_SYSTICK=y
# 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000

1
boards/arm/stm32f412g_disco/stm32f412g_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F412G_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F412ZG=y
CONFIG_CORTEX_M_SYSTICK=y
# 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000

1
boards/arm/stm32f429i_disc1/stm32f429i_disc1_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F429I_DISC1=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F429XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

1
boards/arm/stm32f469i_disco/stm32f469i_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F469I_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F469XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 180MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000

1
boards/arm/stm32f4_disco/stm32f4_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F4_DISCO=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F407XG=y
CONFIG_CORTEX_M_SYSTICK=y
# 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

1
boards/arm/stm32f723e_disco/stm32f723e_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F723E_DISCO=y
CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F723XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 216MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000

1
boards/arm/stm32f746g_disco/stm32f746g_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F746G_DISCO=y
CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F746XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 216MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000

1
boards/arm/stm32f769i_disco/stm32f769i_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32F769I_DISCO=y
CONFIG_SOC_SERIES_STM32F7X=y
CONFIG_SOC_STM32F769XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 216MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=216000000

1
boards/arm/stm32h747i_disco/stm32h747i_disco_m4_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32H747I_DISCO_M4=y
CONFIG_SOC_SERIES_STM32H7X=y
CONFIG_SOC_STM32H747XX=y
CONFIG_CORTEX_M_SYSTICK=y
# enable pinmux
CONFIG_PINMUX=y

1
boards/arm/stm32h747i_disco/stm32h747i_disco_m7_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32H747I_DISCO_M7=y
CONFIG_SOC_SERIES_STM32H7X=y
CONFIG_SOC_STM32H747XX=y
CONFIG_CORTEX_M_SYSTICK=y
# enable pinmux
CONFIG_PINMUX=y

1
boards/arm/stm32l476g_disco/stm32l476g_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32L476G_DISCO=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L476XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

1
boards/arm/stm32l496g_disco/stm32l496g_disco_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32L496G_DISCO=y
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L496XX=y
CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

1
boards/arm/stm32mp157c_dk2/stm32mp157c_dk2_defconfig
View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_BOARD_STM32MP157C_DK2=y
CONFIG_SOC_SERIES_STM32MP1X=y
CONFIG_SOC_STM32MP15_M4=y
CONFIG_CORTEX_M_SYSTICK=y
# 209 MHz system clock (mlhclk_ck)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000

4
soc/arm/st_stm32/common/Kconfig.defconfig.series
View file

@ -9,6 +9,10 @@
if SOC_FAMILY_STM32
# SYSTICK is the default tick source on STM32 Socs
config CORTEX_M_SYSTICK
default y
if CLOCK_CONTROL
config CLOCK_CONTROL_STM32_CUBE