arm: v2m_musca_b1: Enable GPIO support

Enable CMSDK GPIO driver on v2m_musca_b1 SoC/Board.  Add LEDs that are
on the board and init the pinmux for those LEDs to work.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-09-24 14:42:20 -05:00 committed by Kumar Gala
commit 15724c6cdc
6 changed files with 68 additions and 6 deletions

View file

@ -20,6 +20,15 @@ config BOARD
endif
if GPIO
config GPIO_CMSDK_AHB
default y
config GPIO_CMSDK_AHB_PORT0
default y
endif
if SERIAL

View file

@ -22,11 +22,19 @@
#define IOMUX_ALTF1_OUTSEL (0x90 >> 2)
#define IOMUX_ALTF1_OENSEL (0x98 >> 2)
#define IOMUX_ALTF1_DEFAULT_IN (0xA0 >> 2)
#define IOMUX_ALTF2_INSEL (0xA8 >> 2)
#define IOMUX_ALTF2_OUTSEL (0xB0 >> 2)
#define IOMUX_ALTF2_OENSEL (0xB8 >> 2)
#define IOMUX_ALTF2_DEFAULT_IN (0xC0 >> 2)
#ifdef CONFIG_TRUSTED_EXECUTION_SECURE
#ifdef CONFIG_TRUSTED_EXECUTION_NONSECURE
static void arm_musca_b1_pinmux_defaults(void)
{
}
#else
/*
* Only configure pins if we are secure. Otherwise secure violation will occur
*/
*/
static void arm_musca_b1_pinmux_defaults(void)
{
volatile u32_t *scc = (u32_t *)DT_ARM_SCC_BASE_ADDRESS;
@ -42,11 +50,12 @@ static void arm_musca_b1_pinmux_defaults(void)
scc[IOMUX_MAIN_OUTSEL] &= ~(BIT(0) | BIT(1));
scc[IOMUX_MAIN_OENSEL] &= ~(BIT(0) | BIT(1));
#endif
/* Enable PINs for LEDS */
scc[IOMUX_ALTF1_OUTSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
scc[IOMUX_ALTF1_OENSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
scc[IOMUX_ALTF2_OUTSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
scc[IOMUX_ALTF2_OENSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
}
#else
static void arm_musca_b1_pinmux_defaults(void)
{
}
#endif

View file

@ -44,3 +44,16 @@ uart1: uart@106000 {
current-speed = <115200>;
label = "UART_1";
};
gpio: gpio@1000000 {
compatible = "arm,cmsdk-gpio";
reg = <0x1000000 0x1000>;
interrupts = <67 3 /* combined */
51 3 52 3 53 3 54 3 /* PINS 0:3 */
55 3 56 3 57 3 58 3 /* PINS 4:7 */
59 3 60 3 61 3 62 3 /* PINS 8:11 */
63 3 64 3 65 3 66 3>; /* PINS 12:15 */
gpio-controller;
#gpio-cells = <2>;
label = "GPIO_0";
};

View file

@ -13,6 +13,12 @@
#address-cells = <1>;
#size-cells = <1>;
aliases {
led0 = &green_led;
led1 = &blue_led;
led2 = &red_led;
};
chosen {
zephyr,console = &uart1;
zephyr,sram = &sram0;
@ -20,6 +26,22 @@
zephyr,shell-uart = &uart1;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpio 2 0>;
label = "User LED1";
};
green_led: led_1 {
gpios = <&gpio 3 0>;
label = "User LED2";
};
blue_led: led_2 {
gpios = <&gpio 4 0>;
label = "User LED3";
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

View file

@ -6,3 +6,5 @@ toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- gpio

View file

@ -36,6 +36,9 @@
/* SCC */
#define DT_ARM_SCC_BASE_ADDRESS DT_ARM_SCC_4010B000_BASE_ADDRESS
/* CMSDK AHB General Purpose Input/Output (GPIO) */
#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_41000000_BASE_ADDRESS
#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_41000000_IRQ_0
#else
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
@ -62,6 +65,10 @@
/* SCC */
#define DT_ARM_SCC_BASE_ADDRESS DT_ARM_SCC_5010B000_BASE_ADDRESS
/* CMSDK AHB General Purpose Input/Output (GPIO) */
#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_51000000_BASE_ADDRESS
#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_51000000_IRQ_0
#endif
/* End of SoC Level DTS fixup file */