riscv: freedom: rename RISCV32 to RISCV

This code is common to 32- and 64-bit builds.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit is contained in:
Nicolas Pitre 2019-07-18 23:05:53 -04:00 committed by Kumar Gala
commit 75bf3c5368
16 changed files with 25 additions and 25 deletions

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@ -2,4 +2,4 @@
config BOARD_HIFIVE1
bool "HiFive1 target"
depends on SOC_RISCV32_SIFIVE_FREEDOM
depends on SOC_RISCV_SIFIVE_FREEDOM

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@ -1,8 +1,8 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_RISCV=y
CONFIG_SOC_SERIES_RISCV32_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV32_SIFIVE_FREEDOM=y
CONFIG_SOC_SERIES_RISCV_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV_SIFIVE_FREEDOM=y
CONFIG_BOARD_HIFIVE1=y
CONFIG_CONSOLE=y
CONFIG_PRINTK=y

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@ -2,4 +2,4 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_HIFIVE1_REVB
bool "HiFive1 Rev B target"
depends on SOC_RISCV32_SIFIVE_FREEDOM
depends on SOC_RISCV_SIFIVE_FREEDOM

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@ -1,6 +1,6 @@
CONFIG_RISCV=y
CONFIG_SOC_SERIES_RISCV32_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV32_SIFIVE_FREEDOM=y
CONFIG_SOC_SERIES_RISCV_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV_SIFIVE_FREEDOM=y
CONFIG_BOARD_HIFIVE1_REVB=y
CONFIG_RISCV_MACHINE_TIMER=y
CONFIG_PLIC=y

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@ -2,5 +2,5 @@
config BOARD_QEMU_RISCV32
bool "QEMU RISCV32 target"
depends on SOC_RISCV32_SIFIVE_FREEDOM
depends on SOC_RISCV_SIFIVE_FREEDOM
select QEMU_TARGET

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@ -1,8 +1,8 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_RISCV=y
CONFIG_SOC_SERIES_RISCV32_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV32_SIFIVE_FREEDOM=y
CONFIG_SOC_SERIES_RISCV_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV_SIFIVE_FREEDOM=y
CONFIG_BOARD_QEMU_RISCV32=y
CONFIG_CONSOLE=y
CONFIG_PRINTK=y

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@ -7,7 +7,7 @@
menuconfig GPIO_SIFIVE
bool "SiFive Freedom Processor GPIO driver"
depends on SOC_RISCV32_SIFIVE_FREEDOM
depends on SOC_RISCV_SIFIVE_FREEDOM
select HAS_DTS_GPIO
help
Enable driver for the SiFive Freedom GPIO controller.

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@ -6,7 +6,7 @@
menuconfig I2C_SIFIVE
bool "Sifive I2C driver"
depends on SOC_SERIES_RISCV32_SIFIVE_FREEDOM
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
depends on HAS_DTS_I2C
help
Enable I2C support on SiFive Freedom

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@ -7,7 +7,7 @@
menuconfig PINMUX_SIFIVE
bool "SiFive Freedom SOC pinmux driver"
depends on SOC_SERIES_RISCV32_SIFIVE_FREEDOM
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
help
Enable driver for the SiFive Freedom SOC pinmux driver

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@ -8,7 +8,7 @@
menuconfig PWM_SIFIVE
bool "SiFive Freedom PWM driver"
depends on SOC_SERIES_RISCV32_SIFIVE_FREEDOM
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
depends on HAS_DTS
help
Enable the PWM driver for the SiFive Freedom platform

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@ -7,7 +7,7 @@
menuconfig UART_SIFIVE
bool "SiFive Freedom serial driver"
depends on SOC_RISCV32_SIFIVE_FREEDOM
depends on SOC_RISCV_SIFIVE_FREEDOM
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
help

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@ -8,7 +8,7 @@
menuconfig SPI_SIFIVE
bool "SiFive SPI controller driver"
depends on SOC_SERIES_RISCV32_SIFIVE_FREEDOM
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
help
Enable the SPI peripherals on SiFive Freedom processors

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@ -1,6 +1,6 @@
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_RISCV32_SIFIVE_FREEDOM
if SOC_SERIES_RISCV_SIFIVE_FREEDOM
config SOC_SERIES
string
@ -30,4 +30,4 @@ config XIP
bool
default y
endif # SOC_SERIES_RISCV32_SIFIVE_FREEDOM
endif # SOC_SERIES_RISCV_SIFIVE_FREEDOM

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@ -1,11 +1,11 @@
# Kconfig - RISCV32_SIFIVE_FREEDOM SOC implementation
# Kconfig - RISCV_SIFIVE_FREEDOM SOC implementation
#
# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
#
# SPDX-License-Identifier: Apache-2.0
#
config SOC_SERIES_RISCV32_SIFIVE_FREEDOM
config SOC_SERIES_RISCV_SIFIVE_FREEDOM
bool "SiFive Freedom SOC implementation"
depends on RISCV
select SOC_FAMILY_RISCV_PRIVILEGE

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@ -1,4 +1,4 @@
# Kconfig - RISCV32_SIFIVE_FREEDOM SOC configuration options
# Kconfig - RISCV_SIFIVE_FREEDOM SOC configuration options
#
# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
#
@ -7,9 +7,9 @@
choice
prompt "SiFive Freedom SOC implementation"
depends on SOC_SERIES_RISCV32_SIFIVE_FREEDOM
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
config SOC_RISCV32_SIFIVE_FREEDOM
config SOC_RISCV_SIFIVE_FREEDOM
bool "SiFive Freedom SOC implementation"
select ATOMIC_OPERATIONS_C

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@ -8,8 +8,8 @@
* @file SoC configuration macros for the SiFive Freedom processor
*/
#ifndef __RISCV32_SIFIVE_FREEDOM_SOC_H_
#define __RISCV32_SIFIVE_FREEDOM_SOC_H_
#ifndef __RISCV_SIFIVE_FREEDOM_SOC_H_
#define __RISCV_SIFIVE_FREEDOM_SOC_H_
#include <soc_common.h>
#include <generated_dts_board.h>
@ -44,4 +44,4 @@
#define RISCV_RAM_BASE DT_SRAM_BASE_ADDRESS
#define RISCV_RAM_SIZE KB(DT_SRAM_SIZE)
#endif /* __RISCV32_SIFIVE_FREEDOM_SOC_H_ */
#endif /* __RISCV_SIFIVE_FREEDOM_SOC_H_ */