i2c: Rename CONFIG_I2C_[0..5]_NAME -> DT_I2C_[0..5]_NAME
Now that everything is DT based for I2C drivers we can rename the CONFIG_I2C_[0..5]_NAME define to DT_I2C_[0..5]_NAME. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
parent
669e0f3b32
commit
9784f800a6
30 changed files with 69 additions and 69 deletions
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@ -9,4 +9,4 @@
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* generated data matches the driver definitions.
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*/
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#define CONFIG_I2C_0_NAME DT_NIOS2_I2C_100200_LABEL
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#define DT_I2C_0_NAME DT_NIOS2_I2C_100200_LABEL
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@ -297,7 +297,7 @@ static const struct i2c_stm32_config i2c_stm32_cfg_##name = { \
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\
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static struct i2c_stm32_data i2c_stm32_dev_data_##name; \
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\
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DEVICE_AND_API_INIT(i2c_stm32_##name, CONFIG_##name##_NAME, \
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DEVICE_AND_API_INIT(i2c_stm32_##name, DT_##name##_NAME, \
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&i2c_stm32_init, &i2c_stm32_dev_data_##name, \
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&i2c_stm32_cfg_##name, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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@ -210,7 +210,7 @@ static const struct i2c_driver_api i2c_mcux_driver_api = {
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\
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static struct i2c_mcux_data i2c_mcux_data_ ## n; \
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\
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DEVICE_AND_API_INIT(i2c_mcux_ ## n, CONFIG_I2C_ ## n ## _NAME, \
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DEVICE_AND_API_INIT(i2c_mcux_ ## n, DT_I2C_ ## n ## _NAME, \
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&i2c_mcux_init, &i2c_mcux_data_ ## n, \
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&i2c_mcux_config_ ## n, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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@ -228,7 +228,7 @@ static const struct mcux_lpi2c_config mcux_lpi2c_config_0 = {
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static struct mcux_lpi2c_data mcux_lpi2c_data_0;
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DEVICE_AND_API_INIT(mcux_lpi2c_0, CONFIG_I2C_0_NAME, &mcux_lpi2c_init,
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DEVICE_AND_API_INIT(mcux_lpi2c_0, DT_I2C_0_NAME, &mcux_lpi2c_init,
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&mcux_lpi2c_data_0, &mcux_lpi2c_config_0,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_lpi2c_driver_api);
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@ -256,7 +256,7 @@ static const struct mcux_lpi2c_config mcux_lpi2c_config_1 = {
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static struct mcux_lpi2c_data mcux_lpi2c_data_1;
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DEVICE_AND_API_INIT(mcux_lpi2c_1, CONFIG_I2C_1_NAME, &mcux_lpi2c_init,
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DEVICE_AND_API_INIT(mcux_lpi2c_1, DT_I2C_1_NAME, &mcux_lpi2c_init,
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&mcux_lpi2c_data_1, &mcux_lpi2c_config_1,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_lpi2c_driver_api);
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@ -284,7 +284,7 @@ static const struct mcux_lpi2c_config mcux_lpi2c_config_2 = {
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static struct mcux_lpi2c_data mcux_lpi2c_data_2;
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DEVICE_AND_API_INIT(mcux_lpi2c_2, CONFIG_I2C_2_NAME, &mcux_lpi2c_init,
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DEVICE_AND_API_INIT(mcux_lpi2c_2, DT_I2C_2_NAME, &mcux_lpi2c_init,
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&mcux_lpi2c_data_2, &mcux_lpi2c_config_2,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_lpi2c_driver_api);
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@ -312,7 +312,7 @@ static const struct mcux_lpi2c_config mcux_lpi2c_config_3 = {
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static struct mcux_lpi2c_data mcux_lpi2c_data_3;
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DEVICE_AND_API_INIT(mcux_lpi2c_3, CONFIG_I2C_3_NAME, &mcux_lpi2c_init,
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DEVICE_AND_API_INIT(mcux_lpi2c_3, DT_I2C_3_NAME, &mcux_lpi2c_init,
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&mcux_lpi2c_data_3, &mcux_lpi2c_config_3,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_lpi2c_driver_api);
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@ -340,7 +340,7 @@ static const struct mcux_lpi2c_config mcux_lpi2c_config_4 = {
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static struct mcux_lpi2c_data mcux_lpi2c_data_4;
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DEVICE_AND_API_INIT(mcux_lpi2c_4, CONFIG_I2C_4_NAME, &mcux_lpi2c_init,
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DEVICE_AND_API_INIT(mcux_lpi2c_4, DT_I2C_4_NAME, &mcux_lpi2c_init,
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&mcux_lpi2c_data_4, &mcux_lpi2c_config_4,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_lpi2c_driver_api);
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@ -361,7 +361,7 @@ static const struct i2c_sam_twi_dev_cfg i2c0_sam_config = {
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static struct i2c_sam_twi_dev_data i2c0_sam_data;
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DEVICE_AND_API_INIT(i2c0_sam, CONFIG_I2C_0_NAME, &i2c_sam_twi_initialize,
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DEVICE_AND_API_INIT(i2c0_sam, DT_I2C_0_NAME, &i2c_sam_twi_initialize,
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&i2c0_sam_data, &i2c0_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &i2c_sam_twi_driver_api);
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#endif
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@ -391,7 +391,7 @@ static const struct i2c_sam_twi_dev_cfg i2c1_sam_config = {
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static struct i2c_sam_twi_dev_data i2c1_sam_data;
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DEVICE_AND_API_INIT(i2c1_sam, CONFIG_I2C_1_NAME, &i2c_sam_twi_initialize,
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DEVICE_AND_API_INIT(i2c1_sam, DT_I2C_1_NAME, &i2c_sam_twi_initialize,
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&i2c1_sam_data, &i2c1_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &i2c_sam_twi_driver_api);
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#endif
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@ -348,7 +348,7 @@ static const struct i2c_sam_twihs_dev_cfg i2c0_sam_config = {
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static struct i2c_sam_twihs_dev_data i2c0_sam_data;
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DEVICE_AND_API_INIT(i2c0_sam, CONFIG_I2C_0_NAME, &i2c_sam_twihs_initialize,
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DEVICE_AND_API_INIT(i2c0_sam, DT_I2C_0_NAME, &i2c_sam_twihs_initialize,
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&i2c0_sam_data, &i2c0_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &i2c_sam_twihs_driver_api);
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#endif
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@ -378,7 +378,7 @@ static const struct i2c_sam_twihs_dev_cfg i2c1_sam_config = {
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static struct i2c_sam_twihs_dev_data i2c1_sam_data;
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DEVICE_AND_API_INIT(i2c1_sam, CONFIG_I2C_1_NAME, &i2c_sam_twihs_initialize,
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DEVICE_AND_API_INIT(i2c1_sam, DT_I2C_1_NAME, &i2c_sam_twihs_initialize,
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&i2c1_sam_data, &i2c1_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &i2c_sam_twihs_driver_api);
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#endif
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@ -408,7 +408,7 @@ static const struct i2c_sam_twihs_dev_cfg i2c2_sam_config = {
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static struct i2c_sam_twihs_dev_data i2c2_sam_data;
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DEVICE_AND_API_INIT(i2c2_sam, CONFIG_I2C_2_NAME, &i2c_sam_twihs_initialize,
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DEVICE_AND_API_INIT(i2c2_sam, DT_I2C_2_NAME, &i2c_sam_twihs_initialize,
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&i2c2_sam_data, &i2c2_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &i2c_sam_twihs_driver_api);
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#endif
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@ -37,13 +37,13 @@
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#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
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#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4008C000_BASE_ADDRESS
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#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL
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#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL
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#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY
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#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0
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#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0_PRIORITY
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#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_4008C000_PERIPHERAL_ID
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#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40090000_BASE_ADDRESS
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#define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_40090000_LABEL
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#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_40090000_LABEL
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#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_40090000_CLOCK_FREQUENCY
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#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0
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#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0_PRIORITY
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@ -27,13 +27,13 @@
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#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID
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#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40018000_BASE_ADDRESS
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#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_40018000_LABEL
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#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_40018000_LABEL
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#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_40018000_CLOCK_FREQUENCY
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#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0
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#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0_PRIORITY
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#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_40018000_PERIPHERAL_ID
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#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4001C000_BASE_ADDRESS
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#define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_4001C000_LABEL
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#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_4001C000_LABEL
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#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_4001C000_CLOCK_FREQUENCY
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#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0
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#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0_PRIORITY
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@ -40,21 +40,21 @@
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#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
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#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40018000_BASE_ADDRESS
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#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWIHS_40018000_LABEL
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#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWIHS_40018000_LABEL
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#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY
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#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0
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#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
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#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID
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#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS
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#define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
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#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
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#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY
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#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0
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#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
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#define DT_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID
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#define DT_I2C_2_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS
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#define CONFIG_I2C_2_NAME DT_ATMEL_SAM_I2C_TWIHS_40060000_LABEL
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#define DT_I2C_2_NAME DT_ATMEL_SAM_I2C_TWIHS_40060000_LABEL
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#define DT_I2C_2_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY
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#define DT_I2C_2_IRQ DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0
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#define DT_I2C_2_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
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@ -6,7 +6,7 @@
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#define CONFIG_WDT_0_NAME DT_INST_0_ATMEL_SAM0_WATCHDOG_LABEL
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#define CONFIG_I2C_0_NAME DT_INST_0_ATMEL_SAM0_I2C_LABEL
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#define DT_I2C_0_NAME DT_INST_0_ATMEL_SAM0_I2C_LABEL
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_WDT_0_NAME DT_INST_0_ATMEL_SAM0_WATCHDOG_LABEL
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#define CONFIG_I2C_0_NAME DT_INST_0_ATMEL_SAM0_I2C_LABEL
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#define DT_I2C_0_NAME DT_INST_0_ATMEL_SAM0_I2C_LABEL
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_WDT_0_NAME DT_INST_0_ATMEL_SAM0_WATCHDOG_LABEL
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#define CONFIG_I2C_0_NAME DT_INST_0_ATMEL_SAM0_I2C_LABEL
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#define DT_I2C_0_NAME DT_INST_0_ATMEL_SAM0_I2C_LABEL
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_MCUX_IGPIO_5_IRQ_1 DT_NXP_IMX_GPIO_400C0000_IRQ_1
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#define DT_MCUX_IGPIO_5_IRQ_1_PRI DT_NXP_IMX_GPIO_400C0000_IRQ_1_PRIORITY
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#define CONFIG_I2C_1_NAME DT_NXP_IMX_LPI2C_403F0000_LABEL
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#define DT_I2C_1_NAME DT_NXP_IMX_LPI2C_403F0000_LABEL
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#define DT_I2C_MCUX_LPI2C_1_BASE_ADDRESS DT_NXP_IMX_LPI2C_403F0000_BASE_ADDRESS
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#define DT_I2C_MCUX_LPI2C_1_IRQ DT_NXP_IMX_LPI2C_403F0000_IRQ_0
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#define DT_I2C_MCUX_LPI2C_1_IRQ_PRI DT_NXP_IMX_LPI2C_403F0000_IRQ_0_PRIORITY
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#define DT_I2C_MCUX_LPI2C_1_CLOCK_NAME DT_NXP_IMX_LPI2C_403F0000_CLOCK_CONTROLLER
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#define DT_I2C_MCUX_LPI2C_1_CLOCK_SUBSYS DT_NXP_IMX_LPI2C_403F0000_CLOCK_NAME
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#define CONFIG_I2C_2_NAME DT_NXP_IMX_LPI2C_403F4000_LABEL
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#define DT_I2C_2_NAME DT_NXP_IMX_LPI2C_403F4000_LABEL
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#define DT_I2C_MCUX_LPI2C_2_BASE_ADDRESS DT_NXP_IMX_LPI2C_403F4000_BASE_ADDRESS
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#define DT_I2C_MCUX_LPI2C_2_IRQ DT_NXP_IMX_LPI2C_403F4000_IRQ_0
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#define DT_I2C_MCUX_LPI2C_2_IRQ_PRI DT_NXP_IMX_LPI2C_403F4000_IRQ_0_PRIORITY
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#define DT_I2C_MCUX_LPI2C_2_CLOCK_NAME DT_NXP_IMX_LPI2C_403F4000_CLOCK_CONTROLLER
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#define DT_I2C_MCUX_LPI2C_2_CLOCK_SUBSYS DT_NXP_IMX_LPI2C_403F4000_CLOCK_NAME
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#define CONFIG_I2C_3_NAME DT_NXP_IMX_LPI2C_403F8000_LABEL
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#define DT_I2C_3_NAME DT_NXP_IMX_LPI2C_403F8000_LABEL
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#define DT_I2C_MCUX_LPI2C_3_BASE_ADDRESS DT_NXP_IMX_LPI2C_403F8000_BASE_ADDRESS
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#define DT_I2C_MCUX_LPI2C_3_IRQ DT_NXP_IMX_LPI2C_403F8000_IRQ_0
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#define DT_I2C_MCUX_LPI2C_3_IRQ_PRI DT_NXP_IMX_LPI2C_403F8000_IRQ_0_PRIORITY
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#define DT_I2C_MCUX_LPI2C_3_CLOCK_NAME DT_NXP_IMX_LPI2C_403F8000_CLOCK_CONTROLLER
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#define DT_I2C_MCUX_LPI2C_3_CLOCK_SUBSYS DT_NXP_IMX_LPI2C_403F8000_CLOCK_NAME
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#define CONFIG_I2C_4_NAME DT_NXP_IMX_LPI2C_403FC000_LABEL
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#define DT_I2C_4_NAME DT_NXP_IMX_LPI2C_403FC000_LABEL
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#define DT_I2C_MCUX_LPI2C_4_BASE_ADDRESS DT_NXP_IMX_LPI2C_403FC000_BASE_ADDRESS
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#define DT_I2C_MCUX_LPI2C_4_IRQ DT_NXP_IMX_LPI2C_403FC000_IRQ_0
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#define DT_I2C_MCUX_LPI2C_4_IRQ_PRI DT_NXP_IMX_LPI2C_403FC000_IRQ_0_PRIORITY
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#define DT_SIM_BASE_ADDRESS DT_NXP_KINETIS_SIM_40047000_BASE_ADDRESS
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#define DT_SIM_NAME DT_NXP_KINETIS_SIM_40047000_LABEL
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#define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
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#define DT_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
|
||||
#define DT_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
|
||||
|
||||
#define CONFIG_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_MCUX_1_BASE_ADDRESS DT_NXP_KINETIS_I2C_40067000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_1_IRQ DT_NXP_KINETIS_I2C_40067000_IRQ_0
|
||||
#define DT_I2C_MCUX_1_IRQ_PRI DT_NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -85,13 +85,13 @@
|
|||
|
||||
#define DT_MCG_NAME DT_NXP_KINETIS_MCG_40064000_LABEL
|
||||
|
||||
#define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
|
||||
#define DT_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
|
||||
|
||||
#define CONFIG_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_MCUX_1_BASE_ADDRESS DT_NXP_KINETIS_I2C_40067000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_1_IRQ DT_NXP_KINETIS_I2C_40067000_IRQ_0
|
||||
#define DT_I2C_MCUX_1_IRQ_PRI DT_NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -59,25 +59,25 @@
|
|||
#define DT_FTM_3_CLOCK_NAME DT_NXP_KINETIS_FTM_400B9000_CLOCK_CONTROLLER
|
||||
#define DT_FTM_3_CLOCK_SUBSYS DT_NXP_KINETIS_FTM_400B9000_CLOCK_NAME
|
||||
|
||||
#define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
|
||||
#define DT_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
|
||||
|
||||
#define CONFIG_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_MCUX_1_BASE_ADDRESS DT_NXP_KINETIS_I2C_40067000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_1_IRQ DT_NXP_KINETIS_I2C_40067000_IRQ_0
|
||||
#define DT_I2C_MCUX_1_IRQ_PRI DT_NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_MCUX_1_BITRATE DT_NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY
|
||||
|
||||
#define CONFIG_I2C_2_NAME DT_NXP_KINETIS_I2C_400E6000_LABEL
|
||||
#define DT_I2C_2_NAME DT_NXP_KINETIS_I2C_400E6000_LABEL
|
||||
#define DT_I2C_MCUX_2_BASE_ADDRESS DT_NXP_KINETIS_I2C_400E6000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_2_IRQ DT_NXP_KINETIS_I2C_400E6000_IRQ_0
|
||||
#define DT_I2C_MCUX_2_IRQ_PRI DT_NXP_KINETIS_I2C_400E6000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_MCUX_2_BITRATE DT_NXP_KINETIS_I2C_400E6000_CLOCK_FREQUENCY
|
||||
|
||||
#define CONFIG_I2C_3_NAME DT_NXP_KINETIS_I2C_400E7000_LABEL
|
||||
#define DT_I2C_3_NAME DT_NXP_KINETIS_I2C_400E7000_LABEL
|
||||
#define DT_I2C_MCUX_3_BASE_ADDRESS DT_NXP_KINETIS_I2C_400E7000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_3_IRQ DT_NXP_KINETIS_I2C_400E7000_IRQ_0
|
||||
#define DT_I2C_MCUX_3_IRQ_PRI DT_NXP_KINETIS_I2C_400E7000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -60,7 +60,7 @@
|
|||
#define DT_UART_MCUX_LPUART_2_CLOCK_NAME DT_NXP_KINETIS_LPUART_4006C000_CLOCK_CONTROLLER
|
||||
#define DT_UART_MCUX_LPUART_2_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_4006C000_CLOCK_NAME
|
||||
|
||||
#define CONFIG_I2C_0_NAME DT_NXP_IMX_LPI2C_40066000_LABEL
|
||||
#define DT_I2C_0_NAME DT_NXP_IMX_LPI2C_40066000_LABEL
|
||||
#define DT_I2C_MCUX_LPI2C_0_BASE_ADDRESS DT_NXP_IMX_LPI2C_40066000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_LPI2C_0_IRQ DT_NXP_IMX_LPI2C_40066000_IRQ_0
|
||||
#define DT_I2C_MCUX_LPI2C_0_IRQ_PRI DT_NXP_IMX_LPI2C_40066000_IRQ_0_PRIORITY
|
||||
|
@ -68,7 +68,7 @@
|
|||
#define DT_I2C_MCUX_LPI2C_0_CLOCK_NAME DT_NXP_IMX_LPI2C_40066000_CLOCK_CONTROLLER
|
||||
#define DT_I2C_MCUX_LPI2C_0_CLOCK_SUBSYS DT_NXP_IMX_LPI2C_40066000_CLOCK_NAME
|
||||
|
||||
#define CONFIG_I2C_1_NAME DT_NXP_IMX_LPI2C_40067000_LABEL
|
||||
#define DT_I2C_1_NAME DT_NXP_IMX_LPI2C_40067000_LABEL
|
||||
#define DT_I2C_MCUX_LPI2C_1_BASE_ADDRESS DT_NXP_IMX_LPI2C_40067000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_LPI2C_1_IRQ DT_NXP_IMX_LPI2C_40067000_IRQ_0
|
||||
#define DT_I2C_MCUX_LPI2C_1_IRQ_PRI DT_NXP_IMX_LPI2C_40067000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#define DT_SIM_BASE_ADDRESS DT_NXP_KINETIS_SIM_40047000_BASE_ADDRESS
|
||||
#define DT_SIM_NAME DT_NXP_KINETIS_SIM_40047000_LABEL
|
||||
|
||||
#define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
|
||||
#define DT_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -7,13 +7,13 @@
|
|||
#define DT_ADC_0_IRQ_PRI DT_NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
|
||||
#define DT_ADC_0_NAME DT_NXP_KINETIS_ADC16_4003B000_LABEL
|
||||
|
||||
#define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
|
||||
#define DT_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
|
||||
#define DT_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
|
||||
|
||||
#define CONFIG_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
|
||||
#define DT_I2C_MCUX_1_BASE_ADDRESS DT_NXP_KINETIS_I2C_40067000_BASE_ADDRESS
|
||||
#define DT_I2C_MCUX_1_IRQ DT_NXP_KINETIS_I2C_40067000_IRQ_0
|
||||
#define DT_I2C_MCUX_1_IRQ_PRI DT_NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -78,7 +78,7 @@
|
|||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
|
||||
|
@ -86,7 +86,7 @@
|
|||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
|
||||
|
|
|
@ -115,7 +115,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
|
||||
|
@ -125,7 +125,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -88,7 +88,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -98,7 +98,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -108,7 +108,7 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -169,7 +169,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
|
||||
|
@ -179,7 +179,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
|
||||
|
@ -189,7 +189,7 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V1_40005C00_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V1_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V1_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V1_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V1_40005C00_CLOCK_FREQUENCY
|
||||
|
|
|
@ -180,7 +180,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -190,7 +190,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -200,7 +200,7 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
@ -210,7 +210,7 @@
|
|||
#define DT_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_40006000_BASE_ADDRESS
|
||||
#define DT_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_4_NAME DT_ST_STM32_I2C_V2_40006000_LABEL
|
||||
#define DT_I2C_4_NAME DT_ST_STM32_I2C_V2_40006000_LABEL
|
||||
#define DT_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT
|
||||
#define DT_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR
|
||||
#define DT_I2C_4_BITRATE DT_ST_STM32_I2C_V2_40006000_CLOCK_FREQUENCY
|
||||
|
|
|
@ -122,7 +122,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -132,7 +132,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -142,7 +142,7 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -89,7 +89,7 @@
|
|||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
|
||||
|
@ -97,7 +97,7 @@
|
|||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
|
||||
|
@ -105,7 +105,7 @@
|
|||
|
||||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
|
||||
#define DT_I2C_3_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_COMBINED_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_COMBINED_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_COMBINED
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40007800_CLOCK_BITS
|
||||
|
|
|
@ -92,7 +92,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
|
||||
|
@ -102,7 +102,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -142,7 +142,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -152,7 +152,7 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -162,7 +162,7 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
@ -172,7 +172,7 @@
|
|||
#define DT_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_40008400_BASE_ADDRESS
|
||||
#define DT_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40008400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40008400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_4_NAME DT_ST_STM32_I2C_V2_40008400_LABEL
|
||||
#define DT_I2C_4_NAME DT_ST_STM32_I2C_V2_40008400_LABEL
|
||||
#define DT_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_40008400_IRQ_EVENT
|
||||
#define DT_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_40008400_IRQ_ERROR
|
||||
#define DT_I2C_4_BITRATE DT_ST_STM32_I2C_V2_40008400_CLOCK_FREQUENCY
|
||||
|
|
|
@ -382,7 +382,7 @@
|
|||
#define DT_I2C_5_BASE_ADDRESS DT_ST_STM32_I2C_V2_40015000_BASE_ADDRESS
|
||||
#define DT_I2C_5_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40015000_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_5_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40015000_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_5_NAME DT_ST_STM32_I2C_V2_40015000_LABEL
|
||||
#define DT_I2C_5_NAME DT_ST_STM32_I2C_V2_40015000_LABEL
|
||||
#define DT_I2C_5_EVENT_IRQ DT_ST_STM32_I2C_V2_40015000_IRQ_EVENT
|
||||
#define DT_I2C_5_ERROR_IRQ DT_ST_STM32_I2C_V2_40015000_IRQ_ERROR
|
||||
#define DT_I2C_5_BITRATE DT_ST_STM32_I2C_V2_40015000_CLOCK_FREQUENCY
|
||||
|
|
|
@ -93,7 +93,7 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -103,7 +103,7 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue