soc: nxp_imx: mimxrt1064_evk: Enable ethernet support
The i.MX RT1064 evk has one ethernet (10/100M) connector via KSZ8081RNB phy. Enable related dts nodes and config flags Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
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7 changed files with 120 additions and 1 deletions
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@ -27,4 +27,14 @@ config UART_MCUX_LPUART_1
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endif # UART_MCUX_LPUART
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if NETWORKING
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config NET_L2_ETHERNET
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def_bool y
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config ETH_MCUX_0
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def_bool y if NET_L2_ETHERNET
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endif # NETWORKING
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endif # BOARD_MIMXRT1064_EVK
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@ -99,6 +99,8 @@ features:
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| ENET | on-chip | ethernet |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1064_evk/mimxrt1064_evk_defconfig``
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@ -113,7 +115,10 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers.
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+---------------+-----------------+---------------------------+
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| Name | Function | Usage |
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+===============+=================+===========================+
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| GPIO_AD_B0_09 | GPIO | LED |
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B0_09 | GPIO/ENET_RST | LED/Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B0_10 | GPIO/ENET_INT | GPIO/Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B0_12 | LPUART1_TX | UART Console |
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+---------------+-----------------+---------------------------+
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@ -121,6 +126,30 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers.
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+---------------+-----------------+---------------------------+
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| WAKEUP | GPIO | SW0 |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_04 | ENET_RX_DATA00 | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_05 | ENET_RX_DATA01 | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_06 | ENET_RX_EN | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_07 | ENET_TX_DATA00 | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_08 | ENET_TX_DATA01 | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_09 | ENET_TX_EN | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_10 | ENET_REF_CLK | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_B1_11 | ENET_RX_ER | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_EMC_40 | ENET_MDC | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_EMC_41 | ENET_MDIO | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B0_09 | ENET_RST | Ethernet |
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B0_10 | ENET_INT | Ethernet |
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+---------------+-----------------+---------------------------+
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System Clock
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============
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@ -21,6 +21,7 @@
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uart-1 = &uart1;
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led0 = &green_led;
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sw0 = &user_button;
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eth = ð
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};
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chosen {
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@ -66,3 +67,10 @@
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status = "ok";
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current-speed = <115200>;
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};
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ð {
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status = "ok";
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ptp {
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status = "ok";
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};
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};
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@ -16,3 +16,4 @@ ram: 128
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flash: 128
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supported:
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- hwinfo
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- netif:eth
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@ -6,6 +6,15 @@
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#include <init.h>
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#include <fsl_iomuxc.h>
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#include <fsl_gpio.h>
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#ifdef CONFIG_ETH_MCUX_0
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static gpio_pin_config_t enet_gpio_config = {
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.direction = kGPIO_DigitalOutput,
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.outputLogic = 0,
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.interruptMode = kGPIO_NoIntmode
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};
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#endif
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static int mimxrt1064_evk_init(struct device *dev)
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{
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@ -14,6 +23,7 @@ static int mimxrt1064_evk_init(struct device *dev)
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
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#ifndef CONFIG_ETH_MCUX_0
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/* LED */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0);
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@ -24,6 +34,7 @@ static int mimxrt1064_evk_init(struct device *dev)
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/* SW0 */
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IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
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#endif
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#ifdef CONFIG_UART_MCUX_LPUART_1
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/* LPUART1 TX/RX */
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@ -41,7 +52,59 @@ static int mimxrt1064_evk_init(struct device *dev)
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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#endif
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#ifdef CONFIG_ETH_MCUX_0
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_06_ENET_RX_EN, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_07_ENET_TX_DATA00, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_08_ENET_TX_DATA01, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_09_ENET_TX_EN, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_10_ENET_REF_CLK, 1);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_11_ENET_RX_ER, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_40_ENET_MDC, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_41_ENET_MDIO, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0xB0A9u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0xB0A9u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_06_ENET_RX_EN, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_07_ENET_TX_DATA00, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_08_ENET_TX_DATA01, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_09_ENET_TX_EN, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_10_ENET_REF_CLK, 0x31);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_11_ENET_RX_ER, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_40_ENET_MDC, 0xB0E9);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_41_ENET_MDIO, 0xB829);
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IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);
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/* Intialize ENET_INT GPIO */
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GPIO_PinInit(GPIO1, 9, &enet_gpio_config);
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GPIO_PinInit(GPIO1, 10, &enet_gpio_config);
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/* pull up the ENET_INT before RESET. */
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GPIO_WritePinOutput(GPIO1, 10, 1);
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GPIO_WritePinOutput(GPIO1, 9, 0);
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#endif
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return 0;
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}
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#ifdef CONFIG_ETH_MCUX_0
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static int mimxrt1064_evk_phy_reset(struct device *dev)
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{
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/* RESET PHY chip. */
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k_busy_wait(10*USEC_PER_MSEC);
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GPIO_WritePinOutput(GPIO1, 9, 1);
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return 0;
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}
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#endif
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SYS_INIT(mimxrt1064_evk_init, PRE_KERNEL_1, 0);
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#ifdef CONFIG_ETH_MCUX_0
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SYS_INIT(mimxrt1064_evk_phy_reset, PRE_KERNEL_2, 0);
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#endif
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@ -23,4 +23,11 @@ config IPG_DIV
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config GPIO
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def_bool y
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if NET_L2_ETHERNET
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config INIT_ENET_PLL
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def_bool y
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endif # NET_L2_ETHERNET
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endif # SOC_MIMXRT1064
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@ -99,6 +99,7 @@ config SOC_MIMXRT1062
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config SOC_MIMXRT1064
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bool "SOC_MIMXRT1064"
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select HAS_MCUX
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select HAS_MCUX_CACHE
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select HAS_MCUX_CCM
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select HAS_MCUX_ELCDIF
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select HAS_MCUX_ENET
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