boards: mchp: Add option to switch GPIO bank voltage

Add KConfig board support to match board jumper settings
Failing to update bank selection will affect GPIOs tied to VTR3

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This commit is contained in:
Jose Alberto Meza 2019-09-25 11:05:03 -07:00 committed by Andrew Boie
commit 7c32bfa645
4 changed files with 20 additions and 0 deletions

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@ -7,6 +7,7 @@
CONFIG_ARM=y
CONFIG_SOC_MEC1501_HSZ=y
CONFIG_SOC_SERIES_MEC1501X=y
CONFIG_SOC_MEC1501_VTR3_1_8V=y
CONFIG_BOARD_MEC1501MODULAR_ASSY6885=y
CONFIG_RTOS_TIMER=n

View file

@ -40,6 +40,13 @@ static int board_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_XEC_GPIO240_276_NAME);
#endif
/* Configure GPIO bank before usage
* VTR1 is not configurable
* VTR2 doesn't need configuration if setting VTR2_STRAP
*/
#ifdef CONFIG_SOC_MEC1501_VTR3_1_8V
ECS_REGS->GPIO_BANK_PWR |= MCHP_ECS_VTR3_LVL_18;
#endif
/* Release JTAG TDI and JTAG TDO pins so they can be
* controlled by their respective PCR register (UART2).
* For more details see table 44-1

View file

@ -40,6 +40,13 @@ static int board_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_XEC_GPIO240_276_NAME);
#endif
/* Configure GPIO bank before usage
* VTR1 is not configurable
* VTR2 doesn't need configuration if setting VTR2_STRAP
*/
#ifdef CONFIG_SOC_MEC1501_VTR3_1_8V
ECS_REGS->GPIO_BANK_PWR |= MCHP_ECS_VTR3_LVL_18;
#endif
/* Release JTAG TDI and JTAG TDO pins so they can be
* controlled by their respective PCR register (UART2).
* For more details see table 44-1

View file

@ -66,3 +66,8 @@ config SOC_MEC1501_EXT_32K_PARALLEL_CRYSTAL
Say n if the crystal is connected single ended to
the XTAL2 pin or a 32KHz square wave is on XTAL2.
config SOC_MEC1501_VTR3_1_8V
bool "VTR3 power rail is tied to 1.8V"
help
Set this is if VTR3 power sourcejumper in the board is changed.