board: arm: mec15modular_assy6885: Enable RTOS, PS2, PWM and ADC drivers

Enable RTOS, PS2, PWM and ADC for modular MEC15xx Add extra step to build flashable image. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-10-02 18:38:35 -07:00 · 2019-10-02 18:38:35 -07:00 · 3a98d71fdf
commit 3a98d71fdf
parent 5881f118c0
7 changed files with 213 additions and 9 deletions
--- a/boards/arm/mec1501modular_assy6885/CMakeLists.txt
+++ b/boards/arm/mec1501modular_assy6885/CMakeLists.txt
@ -6,3 +6,50 @@

 zephyr_library()
 zephyr_library_sources(pinmux.c)
+
+if(DEFINED ENV{EVERGLADES_SPI_GEN})
+  # Check if location for MCHP tool is defined.
+  # This tool generates a binary image to flash the SPI chip.
+  # See board documentation for further details on this.
+  set(EVERGLADES_SPI_GEN $ENV{EVERGLADES_SPI_GEN})
+else()
+  # Else find the tool in PATH
+
+  if(CMAKE_HOST_APPLE)
+    # CMAKE_HOST_UNIX is also true for Apple,
+    # but there is no tool for Apple. So
+    # we need to skip it.
+    message(NOTICE "There is no SPI image generation tool for MacOS.")
+  elseif(CMAKE_HOST_UNIX)
+    set(EVERGLADES_SPI_GEN_FILENAME everglades_spi_gen_lin64)
+  elseif(CMAKE_HOST_WIN32)
+    set(EVERGLADES_SPI_GEN_FILENAME everglades_spi_gen.exe)
+  endif()
+
+  find_file(EVERGLADES_SPI_GEN_FINDFILE ${EVERGLADES_SPI_GEN_FILENAME})
+  if(EVERGLADES_SPI_GEN_FINDFILE STREQUAL EVERGLADES_SPI_GEN_FINDFILE-NOTFOUND)
+    message(WARNING "Microchip SPI Image Generation tool (${EVERGLADES_SPI_GEN_FILENAME}) is not available. SPI Image will not be generated.")
+  else()
+    set(EVERGLADES_SPI_GEN ${EVERGLADES_SPI_GEN_FINDFILE})
+  endif()
+
+  unset(EVERGLADES_SPI_GEN_FINDFILE)
+  unset(EVERGLADES_SPI_GEN_FILENAME)
+endif()
+
+if(DEFINED EVERGLADES_SPI_GEN)
+  if(DEFINED ENV{EVERGLADES_SPI_CFG})
+    set(EVERGLADES_SPI_CFG $ENV{EVERGLADES_SPI_CFG})
+  else()
+    set(EVERGLADES_SPI_CFG ${BOARD_DIR}/support/spi_cfg.txt)
+  endif()
+
+  set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
+    COMMAND ${EVERGLADES_SPI_GEN}
+    -i ${EVERGLADES_SPI_CFG}
+    -o ${PROJECT_BINARY_DIR}/spi_image.bin
+  )
+
+  unset(EVERGLADES_SPI_GEN)
+  unset(EVERGLADES_SPI_CFG)
+endif()
--- a/boards/arm/mec1501modular_assy6885/Kconfig.defconfig
+++ b/boards/arm/mec1501modular_assy6885/Kconfig.defconfig
@ -30,6 +30,7 @@ config PINMUX_XEC_GPIO140_176
 	default y

 config PINMUX_XEC_GPIO200_236
+	default y if ADC_XEC
 	default n

 config PINMUX_XEC_GPIO240_276
@ -81,10 +82,6 @@ endif # ESPI

 if RTOS_TIMER

-config MCHP_XEC_RTOS_TIMER
-	bool
-	default y
-
 # XEC RTOS timer HW frequency is fixed at 32768
 # The driver requires tickless mode and ticks per
 # second to be 32768 for accurate operation.
@ -99,8 +96,10 @@ endif # RTOS_TIMER

 if !RTOS_TIMER

-config CORTEX_M_SYSTICK
-	default y
+# If RTOS timer is not enabled we use ARM Cortex-M
+# SYSTICK. SYSTICK frequency is 48MHz divided by
+# SOC_MEC1501_PROC_CLK_DIV.
+#

 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 48000000
@ -110,4 +109,14 @@ config SYS_CLOCK_TICKS_PER_SEC

 endif # RTOS_TIMER

+if PS2
+
+config PS2_XEC_0
+	default y
+
+config PS2_XEC_1
+	default y
+
+endif #PS2
 endif # BOARD_MEC1501MODULAR_ASSY6885
+
--- a/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts
+++ b/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts
@ -18,6 +18,10 @@
 		zephyr,console = &uart1;
 		zephyr,flash = &flash0;
 	};
+
+	aliases {
+		pwm-0 = &pwm0;
+	};
 };

 &uart1 {
@ -25,6 +29,10 @@
 	current-speed = <115200>;
 };

+&adc0 {
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 	port_sel = <0>;
@ -46,3 +54,15 @@
 	vw_girq = <24>;
 	pc_girq = <15>;
 };
+
+&ps2_0 {
+	status = "okay";
+};
+
+&ps2_1 {
+	status = "okay";
+};
+
+&pwm0 {
+	status = "okay";
+};
--- a/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.yaml
+++ b/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.yaml
@ -14,7 +14,11 @@ toolchain:
 ram: 32
 flash: 224
 supported:
+  - adc
+  - counter
+  - espi
  - gpio
  - i2c
  - pinmux
-  - espi
+  - pwm
+  - watchdog
--- a/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885_defconfig
+++ b/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885_defconfig
@ -9,14 +9,15 @@ CONFIG_SOC_MEC1501_HSZ=y
 CONFIG_SOC_SERIES_MEC1501X=y
 CONFIG_SOC_MEC1501_VTR3_1_8V=y
 CONFIG_BOARD_MEC1501MODULAR_ASSY6885=y
-CONFIG_RTOS_TIMER=n
+CONFIG_RTOS_TIMER=y

 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_PINMUX=y
 CONFIG_GPIO=y
+CONFIG_PS2=y
 CONFIG_I2C=y
 CONFIG_I2C_INIT_PRIORITY=60
 CONFIG_ESPI=y
-CONFIG_ESPI_PERIPHERAL_UART_SOC_MAPPING=1
+CONFIG_ESPI_PERIPHERAL_UART_SOC_MAPPING=1
--- a/boards/arm/mec1501modular_assy6885/pinmux.c
+++ b/boards/arm/mec1501modular_assy6885/pinmux.c
@ -67,6 +67,24 @@ static int board_pinmux_init(struct device *dev)
 	pinmux_pin_set(portd, MCHP_GPIO_171, MCHP_GPIO_CTRL_MUX_F1);
 #endif

+#ifdef CONFIG_ADC_XEC
+	/* Disable sleep for ADC block */
+	mchp_pcr_periph_slp_ctrl(PCR_ADC, MCHP_PCR_SLEEP_DIS);
+
+	/* ADC pin muxes, ADC00 - ADC07 */
+	pinmux_pin_set(porte, MCHP_GPIO_200, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_201, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_202, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_203, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_204, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_205, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_206, MCHP_GPIO_CTRL_MUX_F1);
+	pinmux_pin_set(porte, MCHP_GPIO_207, MCHP_GPIO_CTRL_MUX_F1);
+
+	/* VREF2_ADC */
+	pinmux_pin_set(portb, MCHP_GPIO_067, MCHP_GPIO_CTRL_MUX_F1);
+#endif /* CONFIG_ADC_XEC */
+
 #ifdef CONFIG_I2C_XEC_0
 	/* Set muxing, for I2C0 - SMB00 */
 	pinmux_pin_set(porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1);
@ -101,6 +119,72 @@ static int board_pinmux_init(struct device *dev)
 	pinmux_pin_set(portb, MCHP_GPIO_072, MCHP_GPIO_CTRL_MUX_F1);
 	pinmux_pin_set(portb, MCHP_GPIO_073, MCHP_GPIO_CTRL_MUX_F1);
 #endif
+
+#ifdef CONFIG_PS2_XEC_0
+	/* Set muxing for PS20B*/
+	mchp_pcr_periph_slp_ctrl(PCR_PS2_0, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(porta, MCHP_GPIO_007, MCHP_GPIO_CTRL_MUX_F2 |
+		       MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
+	pinmux_pin_set(porta, MCHP_GPIO_010, MCHP_GPIO_CTRL_MUX_F2 |
+		       MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
+#endif
+
+#ifdef CONFIG_PS2_XEC_1
+	/* Set muxing for PS21B*/
+	mchp_pcr_periph_slp_ctrl(PCR_PS2_1, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(portd, MCHP_GPIO_154, MCHP_GPIO_CTRL_MUX_F2 |
+		       MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
+	pinmux_pin_set(portd, MCHP_GPIO_155, MCHP_GPIO_CTRL_MUX_F2 |
+		       MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
+#endif
+
+#ifdef CONFIG_PWM_XEC
+#if defined(DT_INST_0_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM0, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(portb, MCHP_GPIO_053, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_1_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM1, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(portb, MCHP_GPIO_054, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_2_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM2, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_3_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM3, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_4_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM4, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(porta, MCHP_GPIO_011, MCHP_GPIO_CTRL_MUX_F2);
+#endif
+
+#if defined(DT_INST_5_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM5, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_6_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM6, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(porta, MCHP_GPIO_014, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_7_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM7, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(porta, MCHP_GPIO_015, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+
+#if defined(DT_INST_8_MICROCHIP_XEC_PWM)
+	mchp_pcr_periph_slp_ctrl(PCR_PWM8, MCHP_PCR_SLEEP_DIS);
+	pinmux_pin_set(porta, MCHP_GPIO_035, MCHP_GPIO_CTRL_MUX_F1);
+#endif
+#endif /* CONFIG_PWM_XEC  */
+
 	return 0;
 }

--- a/boards/arm/mec1501modular_assy6885/support/spi_cfg.txt
+++ b/boards/arm/mec1501modular_assy6885/support/spi_cfg.txt
@ -0,0 +1,39 @@
+[SPI]
+SPISizeMegabits = 4
+Flashmap = true
+FlshmapAddr = 0
+
+[IMAGE "0"]
+ImageLocation = 0x100
+SpiFreqMHz = 24
+SpiReadCommand = Dual
+SpiDriveStrength = 1
+SpiSlewFast = false
+SpiSignalControl = 0x00
+FwBinFile = zephyr.bin
+FwOffset = 0
+FwLoadAddress = 0xE0000
+FwEntryAddress = 0
+UseECDSA = false
+ECDSAPrivKeyFile = ecprivkey001.pem
+ECDSAPrivKeyPassword = ECPRIVKEY001
+FwEncrypt = false
+AesGenECPubKeyFile = ecpubkey002_crt.pem
+
+[IMAGE "1"]
+ImageLocation = 0x40000
+SpiFreqMHz = 24
+SpiReadCommand = Dual
+SpiDriveStrength = 1
+SpiSlewFast = false
+SpiSignalControl = 0x00
+FwBinFile = zephyr.bin
+FwOffset = 0
+FwLoadAddress = 0xE0000
+FwEntryAddress = 0
+UseECDSA = false
+ECDSAPrivKeyFile = ecprivkey001.pem
+ECDSAPrivKeyPassword = ECPRIVKEY001
+ECDSAPubKeyFile = ecpubkey001_crt.pem
+FwEncrypt = false
+AesGenECPubKeyFile = ecpubkey002_crt.pem