board: arm: mec15modular_assy6885: Enable RTOS, PS2, PWM and ADC drivers
Enable RTOS, PS2, PWM and ADC for modular MEC15xx Add extra step to build flashable image. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
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7 changed files with 213 additions and 9 deletions
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@ -6,3 +6,50 @@
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zephyr_library()
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zephyr_library_sources(pinmux.c)
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if(DEFINED ENV{EVERGLADES_SPI_GEN})
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# Check if location for MCHP tool is defined.
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# This tool generates a binary image to flash the SPI chip.
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# See board documentation for further details on this.
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set(EVERGLADES_SPI_GEN $ENV{EVERGLADES_SPI_GEN})
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else()
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# Else find the tool in PATH
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if(CMAKE_HOST_APPLE)
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# CMAKE_HOST_UNIX is also true for Apple,
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# but there is no tool for Apple. So
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# we need to skip it.
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message(NOTICE "There is no SPI image generation tool for MacOS.")
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elseif(CMAKE_HOST_UNIX)
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set(EVERGLADES_SPI_GEN_FILENAME everglades_spi_gen_lin64)
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elseif(CMAKE_HOST_WIN32)
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set(EVERGLADES_SPI_GEN_FILENAME everglades_spi_gen.exe)
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endif()
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find_file(EVERGLADES_SPI_GEN_FINDFILE ${EVERGLADES_SPI_GEN_FILENAME})
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if(EVERGLADES_SPI_GEN_FINDFILE STREQUAL EVERGLADES_SPI_GEN_FINDFILE-NOTFOUND)
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message(WARNING "Microchip SPI Image Generation tool (${EVERGLADES_SPI_GEN_FILENAME}) is not available. SPI Image will not be generated.")
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else()
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set(EVERGLADES_SPI_GEN ${EVERGLADES_SPI_GEN_FINDFILE})
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endif()
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unset(EVERGLADES_SPI_GEN_FINDFILE)
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unset(EVERGLADES_SPI_GEN_FILENAME)
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endif()
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if(DEFINED EVERGLADES_SPI_GEN)
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if(DEFINED ENV{EVERGLADES_SPI_CFG})
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set(EVERGLADES_SPI_CFG $ENV{EVERGLADES_SPI_CFG})
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else()
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set(EVERGLADES_SPI_CFG ${BOARD_DIR}/support/spi_cfg.txt)
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endif()
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set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
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COMMAND ${EVERGLADES_SPI_GEN}
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-i ${EVERGLADES_SPI_CFG}
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-o ${PROJECT_BINARY_DIR}/spi_image.bin
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)
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unset(EVERGLADES_SPI_GEN)
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unset(EVERGLADES_SPI_CFG)
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endif()
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@ -30,6 +30,7 @@ config PINMUX_XEC_GPIO140_176
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default y
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config PINMUX_XEC_GPIO200_236
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default y if ADC_XEC
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default n
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config PINMUX_XEC_GPIO240_276
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@ -81,10 +82,6 @@ endif # ESPI
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if RTOS_TIMER
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config MCHP_XEC_RTOS_TIMER
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bool
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default y
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# XEC RTOS timer HW frequency is fixed at 32768
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# The driver requires tickless mode and ticks per
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# second to be 32768 for accurate operation.
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@ -99,8 +96,10 @@ endif # RTOS_TIMER
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if !RTOS_TIMER
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config CORTEX_M_SYSTICK
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default y
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# If RTOS timer is not enabled we use ARM Cortex-M
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# SYSTICK. SYSTICK frequency is 48MHz divided by
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# SOC_MEC1501_PROC_CLK_DIV.
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#
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 48000000
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@ -110,4 +109,14 @@ config SYS_CLOCK_TICKS_PER_SEC
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endif # RTOS_TIMER
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if PS2
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config PS2_XEC_0
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default y
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config PS2_XEC_1
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default y
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endif #PS2
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endif # BOARD_MEC1501MODULAR_ASSY6885
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@ -18,6 +18,10 @@
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zephyr,console = &uart1;
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zephyr,flash = &flash0;
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};
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aliases {
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pwm-0 = &pwm0;
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};
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};
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&uart1 {
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@ -25,6 +29,10 @@
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current-speed = <115200>;
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};
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&adc0 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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port_sel = <0>;
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@ -46,3 +54,15 @@
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vw_girq = <24>;
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pc_girq = <15>;
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};
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&ps2_0 {
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status = "okay";
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};
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&ps2_1 {
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status = "okay";
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};
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&pwm0 {
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status = "okay";
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};
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@ -14,7 +14,11 @@ toolchain:
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ram: 32
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flash: 224
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supported:
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- adc
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- counter
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- espi
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- gpio
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- i2c
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- pinmux
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- espi
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- pwm
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- watchdog
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@ -9,14 +9,15 @@ CONFIG_SOC_MEC1501_HSZ=y
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CONFIG_SOC_SERIES_MEC1501X=y
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CONFIG_SOC_MEC1501_VTR3_1_8V=y
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CONFIG_BOARD_MEC1501MODULAR_ASSY6885=y
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CONFIG_RTOS_TIMER=n
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CONFIG_RTOS_TIMER=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_PINMUX=y
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CONFIG_GPIO=y
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CONFIG_PS2=y
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CONFIG_I2C=y
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CONFIG_I2C_INIT_PRIORITY=60
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CONFIG_ESPI=y
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CONFIG_ESPI_PERIPHERAL_UART_SOC_MAPPING=1
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CONFIG_ESPI_PERIPHERAL_UART_SOC_MAPPING=1
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@ -67,6 +67,24 @@ static int board_pinmux_init(struct device *dev)
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pinmux_pin_set(portd, MCHP_GPIO_171, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#ifdef CONFIG_ADC_XEC
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/* Disable sleep for ADC block */
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mchp_pcr_periph_slp_ctrl(PCR_ADC, MCHP_PCR_SLEEP_DIS);
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/* ADC pin muxes, ADC00 - ADC07 */
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pinmux_pin_set(porte, MCHP_GPIO_200, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_201, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_202, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_203, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_204, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_205, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_206, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porte, MCHP_GPIO_207, MCHP_GPIO_CTRL_MUX_F1);
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/* VREF2_ADC */
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pinmux_pin_set(portb, MCHP_GPIO_067, MCHP_GPIO_CTRL_MUX_F1);
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#endif /* CONFIG_ADC_XEC */
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#ifdef CONFIG_I2C_XEC_0
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/* Set muxing, for I2C0 - SMB00 */
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pinmux_pin_set(porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1);
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@ -101,6 +119,72 @@ static int board_pinmux_init(struct device *dev)
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pinmux_pin_set(portb, MCHP_GPIO_072, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(portb, MCHP_GPIO_073, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#ifdef CONFIG_PS2_XEC_0
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/* Set muxing for PS20B*/
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mchp_pcr_periph_slp_ctrl(PCR_PS2_0, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(porta, MCHP_GPIO_007, MCHP_GPIO_CTRL_MUX_F2 |
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MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
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pinmux_pin_set(porta, MCHP_GPIO_010, MCHP_GPIO_CTRL_MUX_F2 |
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MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
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#endif
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#ifdef CONFIG_PS2_XEC_1
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/* Set muxing for PS21B*/
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mchp_pcr_periph_slp_ctrl(PCR_PS2_1, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(portd, MCHP_GPIO_154, MCHP_GPIO_CTRL_MUX_F2 |
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MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
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pinmux_pin_set(portd, MCHP_GPIO_155, MCHP_GPIO_CTRL_MUX_F2 |
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MCHP_GPIO_CTRL_BUFT_OPENDRAIN);
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#endif
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#ifdef CONFIG_PWM_XEC
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#if defined(DT_INST_0_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM0, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(portb, MCHP_GPIO_053, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_1_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM1, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(portb, MCHP_GPIO_054, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_2_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM2, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_3_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM3, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_4_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM4, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(porta, MCHP_GPIO_011, MCHP_GPIO_CTRL_MUX_F2);
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#endif
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#if defined(DT_INST_5_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM5, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_6_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM6, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(porta, MCHP_GPIO_014, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_7_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM7, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(porta, MCHP_GPIO_015, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#if defined(DT_INST_8_MICROCHIP_XEC_PWM)
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mchp_pcr_periph_slp_ctrl(PCR_PWM8, MCHP_PCR_SLEEP_DIS);
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pinmux_pin_set(porta, MCHP_GPIO_035, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#endif /* CONFIG_PWM_XEC */
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return 0;
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}
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39
boards/arm/mec1501modular_assy6885/support/spi_cfg.txt
Normal file
39
boards/arm/mec1501modular_assy6885/support/spi_cfg.txt
Normal file
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@ -0,0 +1,39 @@
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[SPI]
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SPISizeMegabits = 4
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Flashmap = true
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FlshmapAddr = 0
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[IMAGE "0"]
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ImageLocation = 0x100
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SpiFreqMHz = 24
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SpiReadCommand = Dual
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SpiDriveStrength = 1
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SpiSlewFast = false
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SpiSignalControl = 0x00
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FwBinFile = zephyr.bin
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FwOffset = 0
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FwLoadAddress = 0xE0000
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FwEntryAddress = 0
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UseECDSA = false
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ECDSAPrivKeyFile = ecprivkey001.pem
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ECDSAPrivKeyPassword = ECPRIVKEY001
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FwEncrypt = false
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AesGenECPubKeyFile = ecpubkey002_crt.pem
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[IMAGE "1"]
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ImageLocation = 0x40000
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SpiFreqMHz = 24
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SpiReadCommand = Dual
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SpiDriveStrength = 1
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SpiSlewFast = false
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SpiSignalControl = 0x00
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FwBinFile = zephyr.bin
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FwOffset = 0
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FwLoadAddress = 0xE0000
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FwEntryAddress = 0
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UseECDSA = false
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ECDSAPrivKeyFile = ecprivkey001.pem
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ECDSAPrivKeyPassword = ECPRIVKEY001
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ECDSAPubKeyFile = ecpubkey001_crt.pem
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FwEncrypt = false
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AesGenECPubKeyFile = ecpubkey002_crt.pem
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