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soc: nxp_imx: Move code/data location configs to soc level

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The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:

warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice

The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.

The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2019-02-12 15:46:31 -06:00 • committed by Anas Nashif
commit 0540b1a699
11 changed files with 74 additions and 307 deletions
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36
boards/arm/mimxrt1020_evk/Kconfig
View file

@ -1,36 +0,0 @@
#
# Copyright (c) 2018, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
if BOARD_MIMXRT1020_EVK
choice
prompt "Code location selection"
default CODE_QSPI
config CODE_ITCM
bool "Link code into internal instruction tightly coupled memory (ITCM)"
config CODE_QSPI
depends on BOARD_MIMXRT1020_EVK
select NXP_IMX_RT_BOOT_HEADER
bool "Link code into external QSPI memory"
endchoice
choice
prompt "Data location selection"
default DATA_SDRAM
config DATA_DTCM
bool "Link data into internal data tightly coupled memory (DTCM)"
config DATA_SDRAM
select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
bool "Link data into external SDRAM memory"
endchoice
endif # BOARD_MIMXRT1020_EVK

38
boards/arm/mimxrt1020_evk/Kconfig.defconfig
View file

@ -50,42 +50,4 @@ config ETH_MCUX_0
endif # NETWORKING
if CODE_ITCM
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
endif # CODE_ITCM
if CODE_QSPI
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
endif
if DATA_DTCM
config SRAM_SIZE
default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
endif
if DATA_SDRAM
config SRAM_SIZE
default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
endif
endif # BOARD_MIMXRT1020_EVK

42
boards/arm/mimxrt1050_evk/Kconfig
View file

@ -1,42 +0,0 @@
#
# Copyright (c) 2018, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
if BOARD_MIMXRT1050_EVK || BOARD_MIMXRT1050_EVK_QSPI
choice
prompt "Code location selection"
default CODE_HYPERFLASH if BOARD_MIMXRT1050_EVK
default CODE_QSPI if BOARD_MIMXRT1050_EVK_QSPI
config CODE_ITCM
bool "Link code into internal instruction tightly coupled memory (ITCM)"
config CODE_HYPERFLASH
depends on BOARD_MIMXRT1050_EVK
select NXP_IMX_RT_BOOT_HEADER
bool "Link code into external HyperFlash memory"
config CODE_QSPI
depends on BOARD_MIMXRT1050_EVK_QSPI
select NXP_IMX_RT_BOOT_HEADER
bool "Link code into external QSPI memory"
endchoice
choice
prompt "Data location selection"
default DATA_SDRAM
config DATA_DTCM
bool "Link data into internal data tightly coupled memory (DTCM)"
config DATA_SDRAM
select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
bool "Link data into external SDRAM memory"
endchoice
endif # BOARD_MIMXRT1050_EVK || BOARD_MIMXRT1050_EVK_QSPI

38
boards/arm/mimxrt1050_evk/Kconfig.defconfig
View file

@ -53,44 +53,6 @@ config UART_MCUX_LPUART_3
endif # UART_MCUX_LPUART
if CODE_ITCM
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
endif # CODE_ITCM
if CODE_HYPERFLASH || CODE_QSPI
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
endif
if DATA_DTCM
config SRAM_SIZE
default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
endif
if DATA_SDRAM
config SRAM_SIZE
default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
endif
if NETWORKING
config NET_L2_ETHERNET

42
boards/arm/mimxrt1060_evk/Kconfig
View file

@ -1,42 +0,0 @@
#
# Copyright (c) 2018, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
if BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH
choice
prompt "Code location selection"
default CODE_HYPERFLASH if BOARD_MIMXRT1060_EVK_HYPERFLASH
default CODE_QSPI if BOARD_MIMXRT1060_EVK
config CODE_ITCM
bool "Link code into internal instruction tightly coupled memory (ITCM)"
config CODE_HYPERFLASH
depends on BOARD_MIMXRT1060_EVK_HYPERFLASH
select NXP_IMX_RT_BOOT_HEADER
bool "Link code into external HyperFlash memory"
config CODE_QSPI
depends on BOARD_MIMXRT1060_EVK
select NXP_IMX_RT_BOOT_HEADER
bool "Link code into external QSPI memory"
endchoice
choice
prompt "Data location selection"
default DATA_SDRAM
config DATA_DTCM
bool "Link data into internal data tightly coupled memory (DTCM)"
config DATA_SDRAM
select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
bool "Link data into external SDRAM memory"
endchoice
endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH

38
boards/arm/mimxrt1060_evk/Kconfig.defconfig
View file

@ -31,42 +31,4 @@ config UART_MCUX_LPUART_3
endif # UART_MCUX_LPUART
if CODE_ITCM
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
endif # CODE_ITCM
if CODE_HYPERFLASH || CODE_QSPI
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
endif
if DATA_DTCM
config SRAM_SIZE
default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
endif
if DATA_SDRAM
config SRAM_SIZE
default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
endif
endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH

35
boards/arm/mimxrt1064_evk/Kconfig
View file

@ -1,35 +0,0 @@
#
# Copyright (c) 2018, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
if BOARD_MIMXRT1064_EVK
choice
prompt "Code location selection"
default CODE_ITCM
config CODE_ITCM
bool "Link code into internal instruction tightly coupled memory (ITCM)"
config CODE_INTERNAL_QSPI
select NXP_IMX_RT_BOOT_HEADER
bool "Link code into internal QSPI memory"
endchoice
choice
prompt "Data location selection"
default DATA_DTCM
config DATA_DTCM
bool "Link data into internal data tightly coupled memory (DTCM)"
config DATA_SDRAM
select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
bool "Link data into external SDRAM memory"
endchoice
endif # BOARD_MIMXRT1064_EVK

38
boards/arm/mimxrt1064_evk/Kconfig.defconfig
View file

@ -10,44 +10,6 @@ if BOARD_MIMXRT1064_EVK
config BOARD
default "mimxrt1064_evk"
if CODE_ITCM
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
endif # CODE_ITCM
if CODE_INTERNAL_QSPI
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
endif
if DATA_DTCM
config SRAM_SIZE
default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
endif
if DATA_SDRAM
config SRAM_SIZE
default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
endif
if GPIO_MCUX_IGPIO
config GPIO_MCUX_IGPIO_1

8
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064
View file

@ -23,4 +23,12 @@ config IPG_DIV
config GPIO
def_bool y
choice CODE_LOCATION
default CODE_ITCM
endchoice
choice DATA_LOCATION
default DATA_DTCM
endchoice
endif # SOC_MIMXRT1064

40
soc/arm/nxp_imx/rt/Kconfig.defconfig.series
View file

@ -76,6 +76,46 @@ config SPI_MCUX_LPSPI
endif # SPI
if CODE_ITCM
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
endif # CODE_ITCM
if CODE_FLEXSPI
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
endif # CODE_FLEXSPI
if DATA_DTCM
config SRAM_SIZE
default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
endif # DATA_DTCM
if DATA_SEMC
config SRAM_SIZE
default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
endif # DATA_SEMC
source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*"
endif # SOC_SERIES_IMX_RT

26
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -246,4 +246,30 @@ config DEVICE_CONFIGURATION_DATA
endif # NXP_IMX_RT_BOOT_HEADER
choice CODE_LOCATION
prompt "Code location selection"
default CODE_FLEXSPI
config CODE_ITCM
bool "Link code into internal instruction tightly coupled memory (ITCM)"
config CODE_FLEXSPI
bool "Link code into external FlexSPI-controlled memory"
select NXP_IMX_RT_BOOT_HEADER
endchoice
choice DATA_LOCATION
prompt "Data location selection"
default DATA_SEMC
config DATA_DTCM
bool "Link data into internal data tightly coupled memory (DTCM)"
config DATA_SEMC
bool "Link data into external SEMC-controlled memory"
select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
endchoice
endif # SOC_SERIES_IMX_RT