soc: nxp_imx: Move code/data location configs to soc level
The imx rt family of socs has several options for linking code and data into internal or external memories, and up until now we have handled these options at the board level. This has resulted in several Kconfig symbols being defined in multiple places and triggering warnings in documentation builds: warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice The number of warnings increased as we added more imx rt boards. Fix the warnings by moving code and data location configs from the board level to the soc level. The default memories for all imx rt boards are unchanged. The mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code and sdram for data. The mimxrt1064_evk board still defaults to ITCM for code and DTCM for data because jlink does not yet support programming internal flash. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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11 changed files with 74 additions and 307 deletions
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#
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# Copyright (c) 2018, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_MIMXRT1020_EVK
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choice
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prompt "Code location selection"
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default CODE_QSPI
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config CODE_ITCM
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bool "Link code into internal instruction tightly coupled memory (ITCM)"
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config CODE_QSPI
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depends on BOARD_MIMXRT1020_EVK
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select NXP_IMX_RT_BOOT_HEADER
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bool "Link code into external QSPI memory"
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endchoice
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choice
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prompt "Data location selection"
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default DATA_SDRAM
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config DATA_DTCM
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bool "Link data into internal data tightly coupled memory (DTCM)"
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config DATA_SDRAM
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select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
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bool "Link data into external SDRAM memory"
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endchoice
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endif # BOARD_MIMXRT1020_EVK
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@ -50,42 +50,4 @@ config ETH_MCUX_0
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endif # NETWORKING
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if CODE_ITCM
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
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endif # CODE_ITCM
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if CODE_QSPI
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
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endif
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if DATA_DTCM
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config SRAM_SIZE
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default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
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endif
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if DATA_SDRAM
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config SRAM_SIZE
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default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
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endif
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endif # BOARD_MIMXRT1020_EVK
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@ -1,42 +0,0 @@
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#
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# Copyright (c) 2018, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_MIMXRT1050_EVK || BOARD_MIMXRT1050_EVK_QSPI
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choice
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prompt "Code location selection"
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default CODE_HYPERFLASH if BOARD_MIMXRT1050_EVK
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default CODE_QSPI if BOARD_MIMXRT1050_EVK_QSPI
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config CODE_ITCM
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bool "Link code into internal instruction tightly coupled memory (ITCM)"
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config CODE_HYPERFLASH
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depends on BOARD_MIMXRT1050_EVK
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select NXP_IMX_RT_BOOT_HEADER
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bool "Link code into external HyperFlash memory"
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config CODE_QSPI
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depends on BOARD_MIMXRT1050_EVK_QSPI
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select NXP_IMX_RT_BOOT_HEADER
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bool "Link code into external QSPI memory"
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endchoice
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choice
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prompt "Data location selection"
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default DATA_SDRAM
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config DATA_DTCM
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bool "Link data into internal data tightly coupled memory (DTCM)"
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config DATA_SDRAM
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select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
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bool "Link data into external SDRAM memory"
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endchoice
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endif # BOARD_MIMXRT1050_EVK || BOARD_MIMXRT1050_EVK_QSPI
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@ -53,44 +53,6 @@ config UART_MCUX_LPUART_3
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endif # UART_MCUX_LPUART
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if CODE_ITCM
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
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endif # CODE_ITCM
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if CODE_HYPERFLASH || CODE_QSPI
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
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endif
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if DATA_DTCM
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config SRAM_SIZE
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default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
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endif
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if DATA_SDRAM
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config SRAM_SIZE
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default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
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endif
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if NETWORKING
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config NET_L2_ETHERNET
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@ -1,42 +0,0 @@
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#
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# Copyright (c) 2018, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH
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choice
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prompt "Code location selection"
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default CODE_HYPERFLASH if BOARD_MIMXRT1060_EVK_HYPERFLASH
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default CODE_QSPI if BOARD_MIMXRT1060_EVK
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config CODE_ITCM
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bool "Link code into internal instruction tightly coupled memory (ITCM)"
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config CODE_HYPERFLASH
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depends on BOARD_MIMXRT1060_EVK_HYPERFLASH
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select NXP_IMX_RT_BOOT_HEADER
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bool "Link code into external HyperFlash memory"
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config CODE_QSPI
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depends on BOARD_MIMXRT1060_EVK
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select NXP_IMX_RT_BOOT_HEADER
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bool "Link code into external QSPI memory"
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endchoice
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choice
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prompt "Data location selection"
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default DATA_SDRAM
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config DATA_DTCM
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bool "Link data into internal data tightly coupled memory (DTCM)"
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config DATA_SDRAM
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select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
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bool "Link data into external SDRAM memory"
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endchoice
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endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH
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@ -31,42 +31,4 @@ config UART_MCUX_LPUART_3
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endif # UART_MCUX_LPUART
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if CODE_ITCM
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
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endif # CODE_ITCM
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if CODE_HYPERFLASH || CODE_QSPI
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
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endif
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if DATA_DTCM
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config SRAM_SIZE
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default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
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endif
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if DATA_SDRAM
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config SRAM_SIZE
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default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
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endif
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endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH
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#
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# Copyright (c) 2018, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_MIMXRT1064_EVK
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choice
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prompt "Code location selection"
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default CODE_ITCM
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config CODE_ITCM
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bool "Link code into internal instruction tightly coupled memory (ITCM)"
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config CODE_INTERNAL_QSPI
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select NXP_IMX_RT_BOOT_HEADER
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bool "Link code into internal QSPI memory"
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endchoice
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choice
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prompt "Data location selection"
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default DATA_DTCM
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config DATA_DTCM
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bool "Link data into internal data tightly coupled memory (DTCM)"
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config DATA_SDRAM
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select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
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bool "Link data into external SDRAM memory"
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endchoice
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endif # BOARD_MIMXRT1064_EVK
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@ -10,44 +10,6 @@ if BOARD_MIMXRT1064_EVK
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config BOARD
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default "mimxrt1064_evk"
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if CODE_ITCM
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
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endif # CODE_ITCM
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if CODE_INTERNAL_QSPI
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
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endif
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if DATA_DTCM
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config SRAM_SIZE
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default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
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endif
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if DATA_SDRAM
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config SRAM_SIZE
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default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
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endif
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if GPIO_MCUX_IGPIO
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config GPIO_MCUX_IGPIO_1
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@ -23,4 +23,12 @@ config IPG_DIV
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config GPIO
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def_bool y
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choice CODE_LOCATION
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default CODE_ITCM
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endchoice
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choice DATA_LOCATION
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default DATA_DTCM
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endchoice
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endif # SOC_MIMXRT1064
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@ -76,6 +76,46 @@ config SPI_MCUX_LPSPI
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endif # SPI
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if CODE_ITCM
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
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endif # CODE_ITCM
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if CODE_FLEXSPI
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config FLASH_SIZE
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default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
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config FLASH_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
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endif # CODE_FLEXSPI
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if DATA_DTCM
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config SRAM_SIZE
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default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
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endif # DATA_DTCM
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if DATA_SEMC
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config SRAM_SIZE
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default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
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config SRAM_BASE_ADDRESS
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default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
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endif # DATA_SEMC
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source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*"
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endif # SOC_SERIES_IMX_RT
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@ -246,4 +246,30 @@ config DEVICE_CONFIGURATION_DATA
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endif # NXP_IMX_RT_BOOT_HEADER
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choice CODE_LOCATION
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prompt "Code location selection"
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default CODE_FLEXSPI
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config CODE_ITCM
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bool "Link code into internal instruction tightly coupled memory (ITCM)"
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config CODE_FLEXSPI
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bool "Link code into external FlexSPI-controlled memory"
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select NXP_IMX_RT_BOOT_HEADER
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endchoice
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choice DATA_LOCATION
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prompt "Data location selection"
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default DATA_SEMC
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config DATA_DTCM
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bool "Link data into internal data tightly coupled memory (DTCM)"
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config DATA_SEMC
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bool "Link data into external SEMC-controlled memory"
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select DEVICE_CONFIGURATION_DATA if NXP_IMX_RT_BOOT_HEADER
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endchoice
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endif # SOC_SERIES_IMX_RT
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