Due to copy paste issue, doc file for board nucleo_f030r8
had wrong file name.
Fix it with correct doc name
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
I2C_1 is enabled in board's DT file but we need to enable
it also in boards default config.
I2C_0 doesn't exist in STM32L475 SOC.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Provide default settings in disco_l475_iot board for following
sensors: LSM6DSL, LIS3MDL, LPS22HB, HTS221.
Sensors are disabled by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware. Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Add board configuration, dts and pinmux, based on
arm/stm32f4_disco and arm/nucleo_f411re boards.
Error free tests are executed on eval board with the following
sample applications:
- hello_world
- blinky-sample
- button-sample
- console_echo_sample
- console_getchar_sample
Signed-off-by: Jose F. Fernandez <jffernandez@fenix-es.com>
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.
JIRA:ZEP-2511
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
We shouldn't select BOARD_DEPRECATED but set a string with the release
version that the board will get removed in.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.
JIRA:ZEP-2511
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Page Address Extension(PAE) page tables make use of NXE bit in
EFER register.
This patch enables the capability needed to set this bit.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
nucleo_f030r8 fails in CI because applications need
more RAM.
Reduce kernel memory used by stacks and ISR vector table.
Fixes#3923
Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The original developer no longer has a working board and isn't
interested in maintaining support for the board. Mark the board
deprecated for now and see if anyone wants to pick it up, otherwise will
remove it in a future release.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added I2C bus (TWI) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Arduino Due board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Match change we made to how I2C is enabled for other stm32 platforms:
Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it. When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled. While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The IAMCU variant does not need to be the default, this calling
convention was to support the discontinued Quark platforms.
qemu_x86 and qemu_x86_nommu now are set as default.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This will run all tests with the memory management unit disabled.
This means no hardware-based stack protection or user threads.
qemu_x86_iamcu now runs with all MMU features enabled.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch adds support for TI Simplelink MSP-EXP432P401R-LAUNCHXL
development board based on Cortex M4 family
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Set Vendor and Product ID originally present in the firmware.
Implemented USB function is the same: CDC ACM serial port.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Clean up & rework JTAG documentation for ESP-32 boards to provide full
commands and clarify gotchas.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This requires openocd version 0.10 or later.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@linaro.org>
The EFM32 Wonder Gecko Starter Kit contains sensors and
peripherals demonstarting the usage of the EFM32WG MCU
family. This patch add basic support for this board.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Supports both master and slave mode, standard and fast modes,
configurable timeouts, and a few other tunable settings.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
ESP-IDF is in constant development and it's likely that files Zephyr
depends on will be moved, removed, or renamed. Make a note that an
older version of ESP-IDF should be used instead.
Closes#1538.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Instead of having a board-specific config for this adc test, enable the
required battery-sense circuit by default at the board level when the
adc driver is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some our Zephyr tools don't like seeing UTF-8 characters, as reported in
issue #4131) so a quick scan and replace for UTF-8 characters in .rst,
.h, and Kconfig files using "file --mime-encoding" (excluding the /ext
folders) finds these files to tweak.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Move all QEMU related defines to the boards and cleanup xtensa platforms
which were marked to be QEMU capable by mistake.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
xtensa uses more stack than other arches, enable the sentinel since we
don't currently have HW-assisted stack checking on this arch.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable BlueNRJ chip on disco_l475_iot1 board.
Communication with SoC, is done over SPI(3). Hence this
commit enables SPI3 on SoC and configure BT_SPI IRQ,
RESET and CS pins.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board configuration, dts and pinmux based on both
stm32f469i_disco board and nucleo_f412zg board
Signed-off-by: Massimiliano Cialdi <massimiliano.cialdi@powersoft.it>
Move all STM32 based board pinmux files into the board dirs so we are
consistent across all the STM32 platforms/boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added some clarification on flashing instructions for CC3220SF, in
support of customer issue.
Jira: ZEP-2581
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The zedboard_pulpino has a small amount of flash so we should have that
in the yaml for any tests thats might filter on code size footprint.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch add device tree support for develoement board of
quark_se_c1000. Previously pushed patch was flashing binary
at wrong address because of which UART was not working
Jira:ZEP-2459
test
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
BLE is the only networking interface on 96b_carbon, so if
CONFIG_NETWORKING is set, automatically use 6lowpan/BLE link
layer. This will allow to make networking apps work "out of the
box" on 96b_carbon, similar to e.g. qemu_x86 (which automatically
uses SLIP) or frdm_k64f (which automatically uses Ethernet).
This also enables NET_L2_BT_ZEP1656, because most 6LoWPAN/BLE samples
in Zephyr currently use that option, and it is required to achieve
working 6LoWPAN/BLE with Linux kernels currently widely accessible
to the end users. E.g. the latest Ubuntu LTS release, 16.04, ships
with 4.4 kernel, and can be upgraded with a special effort to HWE
kernel which is currently at 4.10. NET_L2_BT_ZEP1656 is needed for
both these kernels.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
This reverts commit e1382cc7d6.
Due to restrictive simplelink host driver source licensing.
This also reverts commits based on the simplelink wifi host
driver:
Revert "ext: simplelink: host driver: depend on multithreading"
commit: 4d912b004b
Revert "ext: simplelink: Enable SimpleLink to use Zephyr __errno"
commit: 4e022f7b28
Revert "ext: simplelink: Add SimpleLink DPL porting layer to Zephyr"
commit: 4bc51e67d4
Revert "ext: simplelink: Enable build of the SimpleLink host driver."
commit: 2d2615a49a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
* add arc mpu driver
* modify the corresponding kconfig and kbuild
* currently only em_starterkit 2.2's em7d configuration
has mpu feature (mpu version 2)
* as the minimum region size of arc mpu version 2 is 2048 bytes and
region size should be power of 2, the stack size of threads
(including main thread and idle thread) should be at least
2048 bytes and power of 2
* for mpu stack guard feature, a stack guard region of 2048 bytes
is generated. This brings more memory footprint
* For arc mpu version 3, the minimum region size is 32 bytes.
* the codes are tested by the mpu_stack_guard_test and stackprot
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add cross-referenced information on the 96b_carbon and
96b_carbon_nrf51 pages which disambiguates between the two "boards".
Also describe how to flash 96b_carbon_nrf51 with
samples/bluetooth/hci_spi and 96b_carbon with samples/bluetooth/ipsp
to support a Bluetooth HCI stack on 96Boards Carbon (the physical
board).
While we're here, make the documentation page for 96b_carbon match the
format in doc/templates/board.tmpl.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
On 96Boards Carbon, Bluetooth is provided by a secondary nRF51 chip
connected to SPI_1, so enable this peripheral and its driver when BT
is selected.
Similarly, provide BT_SPI_* configs to integrate with the BT HCI SPI
driver. The files these config values apply to only get built when
CONFIG_BT=y, but this configuration can't be handled in the "if BT"
section in 96b_carbon's Kconfig.defconfig. This is because BT_SPI is
a choice value, and thus doesn't support a default setting.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Rename the BT_CONTROLLER prefix used in all of the Kconfig variables
related to the Bluetooth controller to BT_CTLR.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Some boards had HAS_DTS in the defconfig which is dropped if the Kconfig
variable does not have a prompt.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The SimpleLink host driver comes with its own definition of
__errno, which conflicts with Zephyr's definition, but has
a mechanism to enable use of the porting OS's __errno variable.
This patch enables SimpleLink to use Zephyr's __errno
via the DPL porting layer.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This patch enables and builds the SimpleLink host driver
for Zephyr introduced in a previous patch.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The ESP-WROOM-32 board exits the bootloader at 40 MHz, not 160 MHz as
suggested by documentation. The CCOUNT special register works as
advertised, but not at the expected rate. This was verified by
timestamping (at the host) the output of a dependency-free loop that
looks like:
int key = irq_lock();
while(1) {
u32_t i, count;
volatile int dummy;
for(i = 0; i < 5000000; i++) {
dummy++;
}
__asm__ volatile ("rsr.ccount %0" : "=a"(count));
printk("%d\n", count);
}
The SoC has a fairly robust set of possible CPU clocking modes, but we
don't have a driver for that yet. Until we do, set the single
configured CPU frequency to the one we get at runtime.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Now that we have an mcux shim driver, remove the old k64-specific
driver. Also remove include/drivers/k20_sim.h, since the old
k64-specific driver was the only thing left using it.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the ftm driver is enabled, use an instance routed to the Arduino
header and configure the pinmux accordingly. Unlike the hexiwear_k64,
the pins routed to the RGB led cannot be muxed as ftm channels.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the ftm driver is enabled, use the instance routed to the RGB led and
configure the pinmuxes as ftm channels instead of gpios.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The Xtensa port was the only one remaining to be converted to the new
way of connecting interrupts in Zephyr. Some things are still
unconverted, mainly the exception table, and this will be performed
another time.
Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since
IRQs can't change priority on Xtensa: while the architecture has the
concept of interrupt priority levels, each line has a fixed level and
can't be changed.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The random number generator from ESP32 uses noise from Wi-Fi and
Bluetooth radios. If these are off, a pseudo-random number is
generated instead; this is currently the case, but even though it's a
black box, it's arguably better than returning a timestamp as a
pseudo-random number generator.
According to the ESP32 Technical Reference manual, the RNG passed the
Dieharder Random Number Test suite (version 3.31.1)[1], but nothing has
been said about the quality of the PRNG.
The RNG register is read directly; no effort is made to use its
contents to feed an entropy pool in a way that's similar to /dev/random
on POSIX systems, as no such subsystem exists on Zephyr at the moment.
[1] http://webhome.phy.duke.edu/~rgb/General/dieharder.php
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.
Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This implements a driver for the pin multiplexer as present in the ESP32
SoCs.
All APIs are supported.
Jira: ZEP-2297
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
- board name olimex_stm32_p405
- CPU STM32F405RGT6 Cortex M4
- LED/BUTTON support
- Console on USART2 with 8n1 115200 baud
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The API name space for Bluetooth is bt_* and BT_* so it makes sense to
align the Kconfig name space with this. The additional benefit is that
this also makes the names shorter. It is also in line with what Linux
uses for Bluetooth Kconfig entries.
Some Bluetooth-related Networking Kconfig defines are renamed as well
in order to be consistent, such as NET_L2_BLUETOOTH.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
ReST defines interpreted text roles where text enclosed by single quotes
can be "intrepreted", for example :ref:`some name` becomes a link to
a label anywhere in the doc set named "some name", :c:func:`funcname()`
becomes a link to the API documentation for "funcname", and
:option:`CONFIG_NAME` becomes a link to, in our case, the documentation
for the generated Kconfig option.
This patch fixes uses of `some name` (without a role) by either adding
an explicit role, or changing to ``some name``, which indicates inline
code block formatting (most likely what was intended).
This is a precursor to changing the default behavior of interpreted
text to treat `some name` as :any:`some name` (as configured in
doc/conf.py), which would attempt to create a link to any available
definition of "some name".
We may not change this default role behavior, but it becomes an option
after the fixes in this patch. In any case, this patch fixes incorrect
uses of single-quoted text (possibly introduced because GitHub's
markdown language uses single-quoted text for inline code formatting).
Jira: ZEP-2414
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This change fixes the prescaler values in the defconfig. The prescaler
values shown in the technical reference manual (STM32F407xx, p.19)
differ from those in the defconfig which results in wrong timer delays.
This patch corrects those values according to the manual. I tested it by
toggling a GPIO pin with different timer frequencies and run the
sanitycheck.
Signed-off-by: Andreas Kölbl <andreas.koelbl@st.oth-regensburg.de>
The previously used default value of 4 for the PPL_Q_DIVISOR results
in a frequency of 84MHz which is outside the acceptable range
of 47.88MHz to 48.12MHz.
The new value of 7 results in exactly 48MHz.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The default boolean setting for QEMU_TARGET was incorrectly placed in
the prompt field, so it was showing up as a config option in 'make
menuconfig' when it should be hidden.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The documentation details how to install and configure all the
pre-requisites to build Zephyr for the ESP32 SoC, including using the
vendor SDK and toolchain, the flashing tool, and how to use JTAG.
Jira: ZEP-2109
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This will allow checking if we are building for QEMU globally, without
having to know the exact architecture and board name.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we generate BLUETOOTH_UART_ON_DEV_NAME, UART_PIPE_ON_DEV_NAME,
and BLUETOOTH_MONITOR_ON_DEV_NAME Kconfig defines for dts enabled
platforms add those into the appropriate dts files and remove from the
various board/Kconfig.defconfig files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since HAS_DTS is always defined for arduino_101 the board specific
Kconfig bits associated with !HAS_DTS are never used, so lets remove
them.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch fix problems in nrf52_vbluno52 document:
+ Delete `Segger RTT` from supported features
+ Add `5.0` version to Bluetooth Low Energy feature
Signed-off-by: Nam Do <robotden@gmail.com>
This will cause sanitycheck runs to finish more quickly
instead of sitting there waiting on a timeout. We already
do this with the Xtensa simulator.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to jlink since the flashing and debugging examples
in the board document were written to use jlink.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to daplink since the flashing and debugging examples in
the board document were written to use pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to daplink since the flashing and debugging examples in
the board document were written to use pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to daplink since the flashing and debugging examples in
the board document were written to use pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds the pyocd target name for the frdm_kw41z board, but does not change
the default flash/debug scripts from jlink to pyocd. pyocd has not yet
tagged a release with kw41z support, so to use it one must build pyocd
from source based on the current master branch (f21d43d).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Update the MCUX I2C driver and related platforms to get their I2C
information from the device tree. We also updated a few of the sensor
drivers found on the FRDM & Hexiwear boards to get their I2C bus name
from the device tree instead of directly from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enables a usable adc driver instance based on the board design. No
additional pinmux configuration is necessary because a dedicated adc pin
is routed to the board's battery sense circuit. Updates the board
documentation to reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable the SoC's PTB1 pin, which is routed to
the board's battery sense circuit. Updates the board documentation to
reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable the SoC's PTB10 pin, which is routed to
the Arduino header A2 pin. Updates the board documentation to reflect
that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable one adc channel on the SoC's PTB2 pin,
which is routed to the Arduino header A2 pin. Updates the board
documentation to reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable one adc channel on the SoC's PTB2 pin,
which is routed to the Arduino header A2 pin. Updates the board
documentation to reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
patch uses chosen property zephyr,bt-uart, zephyr,uart-pipe
and zephyr,bt-mon-uart to determine the uart instance to be
used for bluetooth,uart_pipe and bluetooth_monitor and generate
appropriate configs.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
+ The VBLUno52 board
nRF52832 ARM Cortex-M4F processor
Bluetooth Low Energy 5.0
DAPLink interface
UNO pinout
4 power
+ The following samples were tested:
hello_world
basic/button
basic/blinky
bluetooth/peripheral_hr
bluetooth/beacon
Signed-off-by: Nam Do <robotden@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can use the chosen property "zephyr,console" to determine what uart
should be used as the console and find its name to generate a define for
CONFIG_UART_CONSOLE_ON_DEV_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch add I2C to supported features and I2C section for
96b_carbon, nucleof401re and olimexino_stm32
It also adds serial port section to 96b_carbon and olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
We have lots of RAM, this helps catch bugs.
Enable XIP as well, this used to be turned on but was
shut off for some reason.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Previously we were instantiating QEMU with 32MB of RAM but
only enabling a small fraction of it.
Now we boot with 8MB of ram. We ignore the first 4K so we can
make that an unmapped paged to catch NULL pointer dereferences.
If XIP is enabled, the "ROM" region will be the first half of
memory, the "RAM" region the latter.
Move the IDT_LIST and MMU_LIST regions elsewhere so they don't
overlap the new memory arrangement.
Use !XIP to fix a problem where CONFIG_RAM_SIZE was set incorrectly
for XIP case.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Configure I2C using DT for the following STM32 boards:
disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The stm32f3_disco has 40k of ram and we have some tests that require
more than that so we need to specify it in the yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This should be a default option for this board which would allow us to
remove it from many sample configurations that can be then used for
other boards.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it. When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled. While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
+ VBLUno51 board
nRF51822
Bluetooth Low Energy
DAPLink interface
UNO pinout
4 power
+ Wiki: https://vngiotlab.github.io/vbluno/
+ The following samples were tested:
hello_world
basic/button
basic/blinky
bluetooth/peripheral_hr
bluetooth/beacon
Signed-off-by: Nam Do <robotden@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Sidebar navigation for supported boards is wonky: opens to show
all boards (making for lots of scrolling to see the sidebar) and
sidebar items aren't always clickable (as explained in the JIRA
issue).
Fix is to not use multiple toctree directives in boards.rst and
create intermediate architecture-specific supported board docs.
JIRA: INF-132
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Board port was done before the yaml transition, so was missing a
cc2650_sensortag.yaml. As such when we build all the test we get a few
build errors that we also fixed up.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Allow to use an external debug adapter such as J-Link or ULINK
connected to a 20-pin JTAG header to flash the image. SWD is
the actual protocol used by the debug interface.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
As there are multiple ways to flash or debug (pyOCD or openOCD) allow
the user to override the default.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch adds necessary files and does the modification
to the existing files to add device support for
arduino_101 board.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Add board metadata to be consumed by the sanitycheck script to provide
better matching with testcases and to test based on features declated in
the board files.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This flashes Zephyr at 0x1000: that's where the first stage bootloader,
part of the ESP32 ROM, expects to find an "image header".
The second-stage bootloader, part of ESP-IDF, isn't used by the Zephyr
port. However, the bootloader can be used if desired; please refer to
the ESP-IDF documentation on how to set up partitions tables and use
the bootloader.
The following environment variables will affect the ESP32 flashing
process:
Variable Default value
ESP_DEVICE /dev/ttyUSB0
ESP_BAUD_RATE 921600
ESP_FLASH_SIZE detect
ESP_FLASH_FREQ 40m
ESP_FLASH_MODE dio
ESP_TOOL espidf
It's impossible to determine which serial port the ESP32 board is
connected to, as it uses a generic RS232-USB converter. The default of
/dev/ttyUSB0 is provided as that's often the assigned name on a Linux
machine without any other such converters.
The baud rate of 921600bps is recommended. If experiencing issues when
flashing, try halving the value a few times (460800, 230400, 115200,
etc). It might be necessary to change the flash frequency or the flash
mode; please refer to the esptool documentation for guidance on these
settings.
If ${ESP_TOOL} is set to "espidf", the esptool.py script found within
ESP-IDF will be used. Otherwise, this variable is handled as a path to
the tool.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The first stage bootloader, part of the ESP32 ROM, already sets up
a stack that's sufficient to execute C programs. So, instead of
implementing __stack() in assembly, do it in C to simplify things
slightly.
This ESP32-specific initialization will perform the following:
- Disable the watchdog timer that's enabled by the bootloader
- Move exception handlers to IRAM
- Disable normal interrupts
- Disable the second CPU
- Zero out the BSS segment
Things that might be performed in the future include setting up the
CPU frequency, memory protection regions, and enabling the flash
cache.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Unconditionally use CONFIG_SIMULATOR_XTENSA to determine if XT_SIMULATOR
or XT_BOARD should be defined.
If CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, also define XT_CLOCK_FREQ. This
isn't ideal as the clock frequency might be changed in runtime and this
effectively makes it a constant.
Until we can control the clock frequency in runtime, this will suffice.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This is a minimal driver enabling console output during the port
bringup. While the driver works, only one of the three UART devices
are supported, and there isn't any way to change any parameters or
use interrupts. This will most likely be superceded by a proper
driver after the port has matured.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
A couple of docs were created in previous PRs with board support
information common to a few boards. Move these to a new section
for "Board Support Tools". (I debated about hiding them completely
but decided it would still be useful to have these tool docs appear
in the table of contents, just not embedded with the supported boards
docs.)
Moved these board tools docs over to the doc/ folder and out of
boards/ and removed these pages from the navigation index.
JIRA: ZEP-2285
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
- board name olimex_stm32_e407
- CPU STM32F407ZGT6 Cortex M4
- LED/BUTTON support
- Console on USART1 with 8n1 115200 baud
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Some files have moved from their original location, or are no longer
available. For the mbedtls samples, tweak the link to point to a page
where links for current and previous downloads can be found.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Board documentaion for altera_max10 referenced the nios2-configure-sof
tool in arch/nios2/soc/nios2f-zephyr/cpu/ when this tool is actually
part of the Altera Quartus SDK (the .sof FPGA configuration files are
in this folder)
jira: ZEP-2006
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The wiki directions indicate that this script should be used,
and openocd.sh doesn't even work. Switch to pyocd.sh by default.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following introduction of stm32cube LL based clock control driver
for stm32f1 series, update stm32f1xx based boards to support new
driver settings
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable the MPU on the Nucleo STM32F413 board.
Change-Id: I0f256a4c7231f9d3844e67a94d989c8d93b60e58
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
CONFIG_CLOCK_VDD_VOLTAGE does not exist. It was introduced by accident
with commit 614db02cc6 ("stm32f4: Add STM32F413 Nucleo board"), so
remove it!
Change-Id: I3363a92627708bf5ffb080c2238fc84c71caa8d9
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Atmel SAM3X series has been recently converted to use ASF
and should now use common SAM family drivers. The atmel_sam3
serial driver will be removed in the future.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Increase to 1024 to get more tests and sample running on this device
with only 8K of SRAM.
Change thread stack size in the mslab test to make it fit into this
board.
Jira: ZEP-2079
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We now have generic ARM M4 MPU support added to Zephyr.
Let's enable it for use with Nordic nRF52 chips.
Memory Layout was generated from Section 8.3 "Memory
Map" of nRF52 Product Specifications (for both nRF52832
and nRF52840):
0x00000000: Flash
0x10000000: Factory Information Config Registers
0x10001000: User Information Config Registers
0x20000000: SRAM
0x40000000: APB Peripherals
0x50000000: AHB Peripherals
0xE0000000: ARM M4 Private Peripheral Registers
NOT Configured:
0x60000000: External RAM
0x80000000: External RAM
0xA0000000: External Device
0xC0000000: External Device
NOTE: More work will be needed for future Nordic MWU (Memory
Watching Unit) support.
Signed-off-by: Michael Scott <michael.scott@linaro.org>
Neither ASF nor CMSIS provide defines that can be processed by
the assembler. Exclude those from soc.h. Before this was done
incorrectly in board.h file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Removed CONFIG_HAS_DTS from the stm32f4_disco_defconfig &
stm32l496g_disco_defconfig files as its automatically selected for all
ARM SoCs at this point.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We now get the baud rate for the serial port from the device tree so we
don't need to be setting it in the defconfig.
The baud rate changed from 38400 to 115200 when we introduced the device
tree for MPS2. The default baud rate was based on matching mbed, but we
use 115200 to match the standard default we have for most boards now.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that NXP boards support 'make flash' and 'make debug' via pyOCD and
Segger J-Link, update all the NXP board docs accordingly. Adds a new
generalized OpenSDA document so certain details don't have to be
repeated for every OpenSDA board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add configuration, pinmux, dts and documentation for the STM32L496G
Discovery board based on the STM32L496AG SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Since we now select HAS_DTS from the cortex-m Kconfig we don't need it
in 96b_carbon_nrf51_defconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* Change emsk to EM Starter Kit
* Fix some typos
* Add more statement for steps of using EM Starter Kit
Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
Due to support updated from 2.2 to 2.3, a debug script is provided
for emsk, so developer can directly debug the zephyr application
using commands such as follows.
+ make BOARD=em_starterkit debug
Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
Here are the main changes:
* board: Update EMSK onboard resources such as Button, Switch and LEDs
+ update soc.h for em7d, em9d, em11d
+ update board.h for em_starterkit board
* arc: Add floating point support and code density support
+ add kconfig configuration
+ add compiler options
+ add register definitions, marcos, assembly codes
+ fixes in existing codes and configurations.
* arc: Update detailed board configurations for cores of emsk 2.3
* script: Provide arc_debugger.sh for debugging em_starterkit board
+ make BOARD=em_starterkit debug
This will start openocd server for emsk, and arc gdb will connect
to this debug server, user can run `continue` command if user just
want to run the application, or other commands if debugging needed.
+ make BOARD=em_starterkit debugserver
This will start an openocd debugger server for emsk, and user can
connect to this debugserver using arc gdb and do what they want to.
+ make BOARD=em_starterkit flash
This will download the zephyr application elf file to emsk,
and run it.
Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
Now that we can specify what toolchain is intended for each
SOC, enable some more SOCs to be built.
A full sanitycheck run will require the installation of both
RF-2016.4 and RG-2016.4 releases.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch adds initial MPU support to NXP K6x family.
The boot configuration prevents the following security issues:
* Prevent to read at an address that is reserved in the memory map.
* Prevent to write into the boot Flash/ROM.
* Prevent from running code located in SRAM.
This driver has been tested on FRDM-K64F.
Change-Id: I907168fff0c6028f1c665f1d3c224cbeec31be32
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Link was pointing to wrong reference manual.
Fixed by this commit
Change-Id: I97c6748fcad27ad6f2541ed4cba6141fcbb2576a
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The xtensa simulator can in fact simulate a variety of Xtensa SOCs.
Fixes build for alternate xt-sim_* defconfigs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The xt-sim defconfigs were selecting CONFIG_SIMULATOR_XTENSA instead
of CONFIG_BOARD_SIMULATOR_XTENSA.
Fix defconfigs and rename to CONFIG_BOARD_XT_SIM to ease any future
confusion between these similarly named defconfigs.
CONFIG_SIMULATOR_XTENSA is automatically set by xt-sim's
Kconfig.defconfig, it doesn't need to be explicitly specified in the
defconfigs themselves.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Now that all ARM platforms have a device tree we can move selecting of
HAS_DTS up and remove any !HAS_DTS cases, as well as setting in all the
defconfigs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Adds a new debug support script using pyOCD and configures most NXP
boards so they can use it. frdm_kw41z is the one exception because pyOCD
doesn't yet support kw41z. Tested with pyOCD v0.8.0 and the latest
DAPLink firmware for each board.
Introduces two new environment variables, PYOCD_FLASHTOOL and
PYOCD_GDBSERVER, that allow you to set custom paths to the pyOCD tools.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new debug support script using Segger JLink and configures all
NXP boards so they can use it. Tested with Segger JLink GDB server
V6.14b and OpenSDA v2.1 firmware.
Change-Id: Ia1b297d9c93d21db61379e22f27ae54cda3ad461
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The xC tag in the SoC reference indicates the flash size, use it in the
configuration to permit selection of correct flash size for dts.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds support for the nRF51 chip on the board.
If you'd like to run Zephyr on the STM32F4 chip on Carbon, you need to
use the 96b_carbon board instead.
The current SPI Bluetooth protocol only uses 5 wires, so we use the
remaining pin as UART TX.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This core configuration was removed from the tree since it cannot
implement irq_offload().
Remove an orphaned block in xtesna.ini.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
More general spelling fixes, and cleaning up stray UTF-8 characters
such as curly-quotes, em- and en-dashes. Use replacement strings
for |reg| and |trade|.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add configuration, dts and documentation for the Nucleo L432KC board
based on the STM32L432KC SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The SimpleLink SDK actually encapsulates a family of devices,
of which cc32xx is just one device. Other devices can fit
under this SDK directory structure.
This expansion will also allow the import of the WiFi
host driver and its driver porting layer in the future,
inserted at the correct levels in the SimpleLink SDK
directory heirarchy.
Follow the URL (ending in "#directory-structure") referenced in
ext/hal/ti/simplelink/README which explains the SDK structure,
and where devices fit in.
Jira: ZEP-1958
Change-Id: I16515d3e3779de0d55d3b1b8e25029609d1f66c3
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Enable it by default now that the eth_dw driver has been ported to the
new IP stack.
Jira: ZEP-1652
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
I2C address could not be configured for HTS221.
Remove non existing configuration in disco_l475_iot1 board
Change-Id: Ib5ed8e0f770c16b124cf918bdf9ecd42cdd9b213
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The files for the Arduino Due needed to be updated to use the new
configuration when the SoC moved from the atmel_sam3 directory to
the atmel_sam/sam3x directory.
Jira: ZEP-2067
Signed-off-by: Justin Watson <jwatson5@gmail.com>
The FPGA on the MPS2 board implements 4 SBCon devices for I2C which are
connected to:
- a touchscreen controller
- the audio device (for configuration)
- both shield connectors
Change-Id: I55ca985e18b45d68f5e7421c4768dfc9bf2fcb3f
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Introduce a simple device tree for the TI lm3s6965 SoC and QEMU
Cortex-M3 board port. We get flash and memory base addresses and sizes
from the device tree as well as the ARM NVIC number of priority bits.
Change-Id: I4452b5543de7be55518997e54837ccbfd4f121df
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As disco_l475_iot1 is default board for HTS221 sample
application, provide default boards settings to get
application functional once it is delivered.
Change-Id: Ie4957538db679d076713550c1555954a6a20d3e2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add device tree support for nRF51822 SoCs and Arduino 101-BLE,
Curie-BLE, BLE Nano, PCA10028-DK, and Quark-SE BLE boards. This
is minimal support for memory, flash, and UART.
Change-Id: I7e572bea537e384b6d66e520462f023ace0c9b35
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF52840 SoC and PCA10056-DK board. This
is minimal support for memory, flash, and UART.
For the nRF52840 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: I1c377e0cb97ff4716ea5489fffaa7c0e2b34d18a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for Nitrogen 96board, BLE Nano 2, and
nRF52-PCA10040 DK boards. This is minimal support for memory, flash,
and UART.
For the nRF52832 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: Ia247b9b710a72416e9ab0de3ca1429bfab8917f8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to allow the use of such board, a very preliminar port was
developed. It consists of board files, as well as pinmux, uart, gpio,
spi drivers and device tree files.
Change-Id: I5753064e39e0b023cf4481744c176de26d8dbebb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commits align CONFIG_ factor names between stm32f4 and stm32l4
series to enable code factorization such as use of Q_DIVISOR.
Though, it does not concatenate kconfig sections as we might use
a bit of time to see what is needed in this regard
Change-Id: Ia603406d53949abf5675b801a5448397d5ab8462
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit provides CONFIG_ definitions to support
LL based clock driver on stm32f4 boards:
96b_carbon
nucleo_f401re
nucleo_f411re
This commit sticks to clock configurations previously defined.
Two changes to notice:
-HSE clock value should now be defined
-Prescaler values required as "1" should now be set to "1" instead
of "0".
Change-Id: I003bd226f198217d5e266e11fe37094773c1c62c
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added some review changes suggested by TI-er Bill Mills.
Jira: ZEP-1958
Change-Id: I892f22a5740ae7ae4dc949bc72de366e0e85d03c
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This board is being replaced by the CC3220SF LaunchXL,
which has essentially the same peripheral map, 256Kb
of SRAM, but in addition has 1Mb of on-chip secure flash.
Jira: ZEP-1958
Change-Id: I80629474cab9ce41bce3903213f5c9f148cc138a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
CC3220SF_LAUNCHXL effectively replaces the CC3200_LAUNCHXL,
with support for the CC3220SF SoC, which is an update for
the CC3200 SoC.
This is supported by the Texas Instruments CC3220 SDK.
Jira: ZEP-1958
Change-Id: I2484d3ee87b7f909c783597d95128f2b45db36f2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Adds event based scheduling logic to the kernel. Updates
management of timeouts, timers, idling etc. based on
time tracked at events rather than periodic ticks. Provides
interfaces for timers to announce and get next timer expiry
based on kernel scheduling decisions involving time slicing
of threads, timeouts and idling. Uses wall time units instead
of ticks in all scheduling activities.
The implementation involves changes in the following areas
1. Management of time in wall units like ms/us instead of ticks
The existing implementation already had an option to configure
number of ticks in a second. The new implementation builds on
top of that feature and provides option to set the size of the
scheduling granurality to mili seconds or micro seconds. This
allows most of the current implementation to be reused. Due to
this re-use and co-existence with tick based kernel, the names
of variables may contain the word "tick". However, in the
tickless kernel implementation, it represents the currently
configured time unit, which would be be mili seconds or
micro seconds. The APIs that take time as a parameter are not
impacted and they continue to pass time in mili seconds.
2. Timers would not be programmed in periodic mode
generating ticks. Instead they would be programmed in one
shot mode to generate events at the time the kernel scheduler
needs to gain control for its scheduling activities like
timers, timeouts, time slicing, idling etc.
3. The scheduler provides interfaces that the timer drivers
use to announce elapsed time and get the next time the scheduler
needs a timer event. It is possible that the scheduler may not
need another timer event, in which case the system would wait
for a non-timer event to wake it up if it is idling.
4. New APIs are defined to be implemented by timer drivers. Also
they need to handler timer events differently. These changes
have been done in the HPET timer driver. In future other timers
that support tickles kernel should implement these APIs as well.
These APIs are to re-program the timer, update and announce
elapsed time.
5. Philosopher and timer_api applications have been enabled to
test tickless kernel. Separate configuration files are created
which define the necessary CONFIG flags. Run these apps using
following command
make pristine && make BOARD=qemu_x86 CONF_FILE=prj_tickless.conf qemu
Jira: ZEP-339 ZEP-1946 ZEP-948
Change-Id: I7d950c31bf1ff929a9066fad42c2f0559a2e5983
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Typo in :ref:`hello_world` (regular quote vs. back tick)
Change-Id: I77853f85b9c71751307ef105b6babcb0cfbc9060
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This patch adds MPU support to the ST nucleo_f411re board based on
STM32F401XE.
Change-Id: I43aae0930ccabe234fcb34216518b568a855a1be
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the ST nucleo_f401re board based on
STM32F401XE.
Change-Id: I5e8042c1f964827980b974a565a4d4666eeccf3b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the 96 boards Carbon board based on
STM32F401XE.
Change-Id: I8444318099a665133488ccdd5ba129c805f9a20e
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables MPU by default into the V2M Beetle port of Zephyr.
Change-Id: Iab2dea748c68a6932eb31e746d1a9cdb07808683
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
The current PLL settings for the Carbon have two problems.
1. The VCO frequency (672MHz) is out of spec.
2. The 48MHz clock is being driven at 84MHz which breaks USB,
breaks SDIO and also risks biasing the RNG.
Fix this by bringing the VCO down to 336MHz (which also fixes
the 48MHz clock) and update the other dividers accordingly.
Change-Id: I394c476a8b27f027da5cdc31992613b376cf6aff
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I27d51c316144251939b20cfa6787ff7ab8035fe6
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix doxygen comment typos used to generate API docs
Change-Id: I248d53000d8e57b902b9a18fdcfc9e995142a8b3
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Added serial (UART) driver for Atmel SAM MCU family.
Note:
- Error handling is not implemented
- The driver works only in polling mode, interrupt mode is
not implemented.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1959
Change-Id: I3e770fd1feb2ddf92cf405a9aa17be92eb32e19b
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Added I2C bus (TWIHS) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1866
Change-Id: Ic5aa7b6b21295feccae883d580b38bbeaf2ce291
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
CONFIG_BOARD was set to arduino_101_ble instead of curie_ble. Fix this
so the BOARD_NAME, BOARD, board dir, all are in sync.
Change-Id: I5f2a4f1aeec7c20f042e11b96e1c87883ad4df4b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce SoC specific config options similar to what exists on NRF51,
this is mostly to help distinguish between SRAM & Flash sizes on
different variants.
Also deleted some unnecessary setting of CONFIG_SOC_NRF528{32,40} in the
board defconfig files.
Change-Id: I3aaedf0c15423ae12636f87b8e6a39070cbb2c6f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds initial support and documentation for the kw40z on the hexiwear
board.
Jira: ZEP-1391
Change-Id: Idb58bfb3c2951b1f737a8c547860bde4ef4d9a3e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converted over all STM32F3 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F3.
Boards that are now using devicetree:
* Nucleo f334r8
* STM32373C Eval
Change-Id: I081a1d83f86e417a98b6864c745354b6b32953b7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F1 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F1. Also
renamed the STM32F10{3,7} SoC dtsi to try and make it clear that the 'X'
is a place holder. Fixedup the top level compatiables in the boards to
be the specific 'X' instead of the generic one.
Boards that are now using devicetree:
* Nucleo f103rb
* STM3210C Eval
* STM32 MINI A15
Change-Id: I29b3634ec7451f974687d55980414efa655e2e96
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F4 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F4.
Boards that are now using devicetree:
* 96b_carbon
* nucleo f401re
* nucleo f411re
Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since all the L4 SoCs are using DTS we can remove the various Kconfig
bits that we now get from DTS.
Change-Id: Icdec49b478ff285dc3347b09412964a721f75bbf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
I2C_SHARED_IRQ, I2C_0_IRQ_SHARED, I2C_0_IRQ_DIRECT Kconfig options
are DW driver specific. Its presence is confusing for a user of any
other I2C driver than DW. This patch renames these options to include
DW string and makes it visible only for DW I2C driver. This is a
similar implementation to that used by ETH DW Ethernet driver.
Change-Id: I795506f9b103c028a22317df9ad632dce5cd1343
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default a factory new SAM E70 chip will boot SAM-BA boot loader located in
the ROM, not the flashed image. This is determined by the value of GPNVM1
(General-Purpose NVM bit 1). Updated flash procedure will ensure that GPNVM1
is set to 1 changing the default behavior to boot from Flash.
Change-Id: Ic6334c9d4743a7665fc944e8f49fc1467ecda40d
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add openocd.cfg to control flashing and debugging of the
olimexino-stm32 board
Change-Id: Ia40d964b737792864efd85076bc599b2de15ebb0
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The schematics of the BBC micro:bit are hard to find, and its official
web-site doesn't document the mapping of the edge connector pins
numbers the nRF51 GPIO pin numbers. Provide helpful defines for this
in the board.h file.
Change-Id: I52ce1d61558703b6aa5a5d073ccd222f27fa8760
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The core build in the SDK does not have a timer, making it impossible
to use this core with most of the sanity checks. We are working on
getting a special package of cores for Zephyr which meet our build
requirments; until then, remove this core as it doesn't build.
Change-Id: I3fa201f3c6b5724501e8cb1e1b8ba631436ebc23
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
* CONFIG_SOC is now properly set and we do not need a separate
XTENSA_CORE build variable
* Some unnecessary macro -D CFLAGS in the Xtensa Makefile removed
* There is no default SOC selection, it is now done explicitly in
the board's defconfig
* CONFIG_<board name> now renamed to CONFIG_SOC_<board name in
uppercase> to conform to established style.
Issue: ZEP-1711
Change-Id: I88997530db09970b7fdd1c3e3d355bfca9d0be1a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
update references to shell sample that was moved by
https://gerrit.zephyrproject.org/r/#/c/12442/
Change-Id: I61b527c9077b05b67fc9c43f2ecff50dc92dae9c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Adds fxas21002 and max30101 sensors to the list of supported features in
the hexiwear_k64 board document. Updates the pinmux table with the
sensor pins and sorts it by port name, then pin number.
Change-Id: I7d4c2c3b7b0e6e52b34e5675ce957c3bc5d18d46
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
These are fixed I/O registers for getting and setting the states of
LEDs, buttons, SPI chip-selects, and LCD control lines. It also contains
several free-running counters with no specific use.
Change-Id: Ib49306d5501574f7eb354165cdca6f29e3d4dad4
Signed-off-by: Jon Medhurst <tixy@linaro.org>
On stm32 family, IP instance numbering starts from 1.
Update i2c driver to this scheme to minimize user
confusion
Change-Id: I967d5975bbbad59cd8a3a7b6dfc665955d09cc9f
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
For the SoCs in which all the boards for that platform are using dts we
can remove the Kconfig bits that are now coming from device tree.
Change-Id: Iccf4c84beb83fa1c516b6166f94de37b4a0162ae
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Previously, cc3200_launchxl board was not able to show the
Zephyr Boot Banner, as that required early initialization
of the UART driver, which was done POST_KERNEL.
This patch moves the pinmux and UART driver initialization
to PRE_KERNEL_1, allowing early printk, and the Boot Banner
to show.
Change-Id: I84a7c20c1d5bdc3de150dc6bb0adebc9a2d9f5cb
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The LEDs on BBC micro:bit boards are red and not green. Since
mentioning the color doesn't really provide any value to the GPIO pin
definitions, just remove it.
Change-Id: I7f53e0d8a0733cda911a624d0b53c750eacfa685
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
OPENOCD_PRE_CMD, OPENOCD_POST_CMD variables require adding
'-c' in front of an actual OpenOCD command. This is in contrary
to other OPENOCD_*_CMD varialbles which specify OpenOCD commands
directly. This patch aligns usage of various OPENOCD_*_CMD variables.
It is no longer required to add '-c' in front of OPENOCD_PRE_CMD,
OPENOCD_POST_CMD variables.
Change-Id: I276fab00b099694c83c3bf74aa5dd59c8d6a308b
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now both flashing over DFU and JTAG are supported, however JTAG needs a
special connection, so DFU is the current out of the box supported
method for flashing.
Jira: ZEP-1785
Change-Id: I47ffce3b332b99ef6c6afdce2214709a4fa5b946
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds the necessary changes to enable use of DTS for
generating required build information.
Change-Id: I0d7aa15488339a425ffe57b6354992851212f7f3
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
At the moment CC2520 configuration options are selected inside "TI
CC2520 Driver RAW channe" submenu like:
[*] TI CC2520 Driver support ----
[ ] TI CC2520 Driver RAW channel --->
Make RAW channel depends on TI CC2520.
Change-Id: I92879b7f4391f1842c012b6c03c78956e90b9441
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Now that dfu-util is a supported flashing method, make it the
default flashing option for Carbon when used via 'make flash'.
Change-Id: I0d2fb9a8cbb4324ea77f1c94ca5df6f1a51e67f6
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
added the riscv-privilege SOC_FAMILY, under which all
riscv SOCs supporting the riscv privilege architecture
specifcation shall reside. These SOCs shall notably have
a common base for handling IRQs.
Moved riscv32-qemu under the riscv-privilege SOC_FAMILY
Change-Id: I5372cb38e3eaed78886f22b212ab4f881ef30b3f
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
Tested on nrf52_pca10040 and nrf51_pca10028 using hello_world sample.
Change-Id: I7cdf1d21e7f8232da737a06e5afbfb1eaec05cde
Signed-off-by: Michał Kruszewski <mkru1992@gmail.com>
This builds the zephyr OS image with the proper flash offsets for
slot 0.
After building, the image needs to be signed using the zep2newt.py
script included in the MCUBoot repo:
./scripts/zep2newt.py --vtoff 0x200 --word-size 4 --sig RSA \
--key root-rsa-2048.pem --bin <path to zephyr.bin> \
--out <path to zephyr.bin>
And then run 'make flash'.
Change-Id: I4739c0b7912c8066882208cb450a8224d433965b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
- Fix path to pinmux.c
- Fix note markup
- s/TTY-to-USB/TTL-to-USB/ ; s/adaptor/adapter/
- Recommend 3.3V TTL serial cable
- Consistent use of "Flyswatter2" official spelling
- s/UART0/UART1/
- Provide CONFIG_ARC_INIT relevant value
- s/for for/for/
- Consistent naming of JTAG 2x5 male pins as "micro JTAG header"
- s/orange/green/
- The Arduino 101 micro JTAG header connects to the Flyswatter2
via the ARM Micro JTAG Connector
- Consistent case
- $USERNAME is not set on Ubuntu, $LOGNAME is POSIX-compliant
- su requires root password, 'sudo su' only requires user password
- Exit root session when done creating udev rule
- Note: code-block above should be rewritten using 'sudo tee'
- s/X86/x86/
- Fix paths to i586-zephyr-elfiamcu-gdb and arc-zephyr-elf-gdb
- samples/hello_world does not set CONFIG_ARC_INIT=y, so suggest
using tests/booting/stub instead
- s/debugserver/debug server/
- s/BLUETOOTH_DEBUG_STDOUT/BLUETOOTH_DEBUG_LOG/
- s/bottle neck/bottleneck/
Change-Id: I4a76020f67d9672f59eae52f78c5caeb9e513aee
Signed-off-by: Patrice Buriez <patrice.buriez@intel.com>
Explain how to create the udev rules granting access to the
Arduino 101 board in DFU mode.
Explain the available methods to flash the Arduino 101 board:
either manually with dfu-util command line,
or automated with ZEPHYR_FLASH_OVER_DFU=y and 'make flash'.
Provide instructions for x86, ARC and BLE cores, using distinct
code-blocks for the manual and make-assisted methods.
Change-Id: I0f9fe3849dec3c2dc2249b77d31d4f2414c98331
Signed-off-by: Patrice Buriez <patrice.buriez@intel.com>
Let 'make flash' invoke the dfuutil.sh support script, and
export the relevant DFUUTIL_* environment variables, for all
3 cores of the Arduino 101 board: x86, ARC and BLE.
This is backward compatible with the current usage of OpenOCD
over JTAG, since this is only enabled when the environment
variable ZEPHYR_FLASH_OVER_DFU is set to y.
Change-Id: Ic5528cb87a180378d7120d150c27d1e24c9ebe75
Signed-off-by: Patrice Buriez <patrice.buriez@intel.com>
Basic Watchdog driver for Atmel SAM family MCUs. Currently only
disabling the watchdog is supported.
Tested on Atmel SAMV71 Xplained Ultra Evaluation Kit.
Origin: Original
Jira: ZEP-1684
Change-Id: I8f717c7f53aa290c944b7935e0570c2a6f53956e
Signed-off-by: Souvik K Chakravarty <souvik.k.chakravarty@intel.com>
Though the SPI_CS_GPIO Kconfig entry (in drivers/spi/Kconfig) has
"select GPIO" specified, we are observing that merely adding
the symbol(SPI_CS_GPIO) in the
defconfig (boards/x86/arduino_101/Kconfig.defconfig)
is triggering unmet direct dependency warnings
(though the build goes through).
Since the defconfig entry(SPI_CS_GPIO) is not selecting
the aforementioned 'select' rule, we add it manually here.
Jira: ZEP-1668
Change-Id: Ida6a0c851462d747e6559bd0c78fa52e1d0f24b5
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
With the default of 192, the x86 rom will span from
0x40010000 - 0x4004000. However the default starting
ROM address for the ARC side is configured to be
0x40034000. If the x86 image is large enough it will
clobber the ARC code. Shorten the x86 side such that
its last flash address is 0x40033FFF.
Change-Id: I23987c3db11f0e51c2405b8baee114aee39de571
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Provide BUT button and LED1, LED2 leds defines in order to get
basic samples "blinky" and "button" available on olimexino_stm32.
Defines have been named in order to match with board printing.
Aliases are provided to get compatibility with zephyr sample code.
Change-Id: I975dc6c043ea83935fb229cafc737cb3ed80fdc4
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch automates flashing process for arduino_due board. Just make flash will able
to flash binary file on the board.
Bossa tool(http://www.shumatech.com/web/products/bossa) manual flashing process is
automated through shell script and currently this binary is only available for
x86_64 architecture.
JIRA : ZEP-145
Change-Id: Ib7b525466239d0437e449c56827f8a9b3e5a96a1
Signed-off-by: Punit Vara <punit.vara@intel.com>
This reverts commit b3a2fc287b.
The firmware on production board will have a faster Baudrate.
Change-Id: Ifa1abd4c2f882b8ef6e7d9762fc592524177dc48
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The flash memory in arduino 101 pĺatform is connected to the
SPI MST 0 device and the CS is connected to the GPIO 0.
The arduino 101 sensor sub-system core maps the SPI MST 0 device
to the "SPI_2" name and the SPI SS 0 device to the "SPI_0" name.
In the same manner the GPIO 0 is mapped to the "GPIO_2" name and
the GPIO SS 0 is mapped to the "GPIO_0" name.
This commit fixes the SPI device name and the GPIO name used by
the W25QXXDV flash memory.
Jira: ZEP-1672
Change-Id: Ifdd5b664498d0eaa6ad073853b811951fe19ab09
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
This includes:
* Moving the Nordic nRF5x Segger J-Link page (temporarily placed inside
one of the board folders)
* Moving the nrf52_pca10040 doc
* Moving the nrf51_pca10028 doc
* Moving the nrf52840_pca10056 doc
Change-Id: I051eb51cee8166ae6472eb696ffeb0625a0424c7
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add basic PHY management sufficient to detect link up, link down and
auto negotiated link speed / duplex. The PHY driver is implemented as
a state machine that executed in the system work queue. The
implementation is non blocking, using the MII interrupt to capture the
completion of read and write events.
This PHY management should be fairly generic. In the future, it may be
beneficial to pull this code out as a standalone PHY driver for use
with other ethernet drivers.
JIRA: ZEP-1674
Change-Id: I3dcb5c14982ef4b40591fcf10d84840b8a2558e5
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Master branch changed requirements for license headers while this
branch has been in development.
Change-Id: I9bce16ff275057a4bb664019628fc9b6de7aef7c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This platform is not a real board but let user handle the xtensa
simulator just like a board.
This is needed until a qemu like simulaotr is added to Xtensa.
Change-Id: I54ab28e86eea956cf85af3ee9b4a10f0d531e54d
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
After introduction and activation of STM32Cube LL based driver on
F3 and L4 series, this commit removes the no more needed code for
native driver for these soc.
Change-Id: I266d1a3fc4b464cee34b1cc1a1a333c5bf923e41
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Activate support of LL Cube based Clock control driver
Note that prescaler should now use actual numerical value used
for calculation and not register value (hence 1 instead of 0)
Change-Id: Ia3a26bffbd470c6e958fd2ca82b8eb071beb6ca8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Activate support of LL Cube based Clock control driver
Note that prescaler should now use actual numerical value used
for calculation and not register value (hence 1 instead of 0)
Change-Id: Ic2566d26f1b82441575a94ddd8d632c88df669d9
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Activate support of LL Cube based Clock control driver
Note that prescaler should now use actual numerical value used
for calculation and not register value (hence 1 instead of 0)
Change-Id: I4becae974678970745f918fb05906f36cc4d62a7
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch adds the base DTS support for the KW41Z Freedom board. The
initial set of changes include SRAM, FLASH, IRQ controller and LPUART
support.
Change-Id: Ic68c4959ddad0c5cfe70d5576a0e58372b93ec9d
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
This patch adds the base DTS support for the V2M Beetle board. The
initial set of changes include SRAM, FLASH, and IRQ controller support.
Change-Id: I06685622b9c57ac358544c71350074ce06e3371e
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds all the necessary changes to enable use of DTS for
generating required build information.
Change-Id: Ia476fbb14c7d9d6b9db3340c73f599556a880da3
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch ifdef's out information that would be redefined by
information generated from DTS. This patch also fixes up the serial
drives to work properly with the DTS generated information.
Change-Id: I912ccf35be23c107705a4866e5a68b3b51154ffa
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds DTS support for the Hexiwear K64 platform. This
includes enabling the DTS config option and adding conditionals around
the options to be replaced.
In addition, a DTS file is provided that customizes the Kinetis
platform to match the hexiwear board. A fixup file is provided to map
the generated information to the current client driver usage. This
file is temporary.
Change-Id: I247d538c6e13e0d1d4141fee74046575a7d2972e
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds DTS support for the FRDM_K64F board. The defconfig
enables the DTS usage and the FRDM K64F specific DTS file provides the
differences from the base Kinetis DTS definitions.
A fixup file is provided to map the generated configuration information
to the driver consumers. The fixup file will be removed once the
drivers are modified to handle the newly generated information.
Change-Id: Ib0ada28faff6a30e8b40eba5c5853e9018ae5fcb
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds DTS support and related files for the NXP Kinetis
platform. The DTS files contain the base definitions for the hardware
nodes on Kinetis platforms. The YAML files provide the definitions of
the contents of the DTS nodes.
The Kconfig changes were put in place to allow for the conversion of
existing drivers. Once those drivers are modified, the Kconfig options
that are replaced by the DTS information will be removed.
Change-Id: If110fffa99c0b12471cf2df206da6687277e4756
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Use new device name for SPI device
Jira: ZEP-1704
Change-Id: Iec39468bbef54423af2b3a681dd4ae1eee866d1e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently the BLE modules on the Panther boards are configured to use
a 115200 baudrate.
Change-Id: I093db68c0fc172757b5878401b99ada7ae0c99d9
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Panther is a board based on Quark SE C1000 SoC.
Change-Id: I66653c40efcb7e04748a21ea622debee23d7d6c0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit changes Kconfig prefix for ieee802154 drivers to
IEEE802154_*. This is done for consistency with config prefixes
used in other subsystems.
Change-Id: Ibbb4d96d2b748f4f13135bde85304ec34c5a90a6
Signed-off-by: Wojciech Bober <wojciech.bober@nordicsemi.no>
Working Ethernet, and actually even successfully booting with Ethernet
enabled (and Ethernet is enabled by default on enabling networking)
so far requires a network cable attached.
Change-Id: I9c17e417f867942ddf085db9e8342e945aa07370
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Added a linker script that shall be common to most riscv SOCs.
Linker script also accounts for execution in place in ROM, when
CONFIG_XIP is set.
Nonetheless, riscv32 SOCs (like pulpino) requiring a different
system layout can still define their own linker script.
Change-Id: I3ad670446d439772c29a8204e307ac79643dc650
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
riscv defines the machine-mode timer registers that are implemented
by the all riscv SOCs that follow the riscv privileged architecture
specification.
The timer registers implemented in riscv-qemu follow this specification.
To account for future riscv SOCs, reimplement the riscv_qemu_driver by
the riscv_machine_driver.
Change-Id: I645b03c91b4e07d0f2609908decc27ba9b8240d4
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
These two docs have a long skinny list of items that displays
better as a multi-column list (using the hlist directive).
Change-Id: Ia1a1f8555bdefe0c9051944d9946299395258bfc
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Origin: Original
Jira: ZEP-979
Change-Id: I1af64364b5b3b4aadbee225ee8f89615fa292863
Signed-off-by: Piotr Mienkowski <Piotr.Mienkowski@schmid-telecom.ch>
Following comments on nucleo_f411re doc, update doc for
nucleof401re
Change-Id: I86b7a016b604a31e210e425718e835e15560a46a
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch updates the mps2_an385 documentation adding the information
of the CMSDK (Cortex-M System Design Kit) GPIOs Pinmuxing.
Change-Id: Icab0d47bf1a58be058f036fb3db346ef6390266a
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch updates the mps2_an385 documentation adding the information
of the new added CMSDK (Cortex-M System Design Kit) Drivers.
Change-Id: I5615ebec13e8831a0360fc32cfd8be0d3ebc85b5
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables the CMSDK (Cortex-M System Design Kit) Drivers on
mps2_an385 (Cortex M3).
Change-Id: Iff51141a183ac94ad6b905acf10389ca94a451d3
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Adds initial support and documentation for the frdm_kw41z board.
- Configures the kw41 to use the 32 MHz external oscillator on the board
to generate a 40 MHz system clock. The clock settings match the MCUX
SDK hello_world example project.
- Provides pinmux settings for the uart, i2c, LEDs, and switches
- Enables pinmux, gpio, uart, and i2c driver instances
- Configures the fxos8700 accelerometer/magnetometer driver
Jira: ZEP-1390
Change-Id: I025a0eae3d380eaf90b02683acf5c592e2204a2e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add a label in the arduino 101 document for the flashing
bluetooth instructions, and link to that instead of the
wiki page (deprecated).
Change-Id: Ie39240cdf4881356f634d21ead1d7ae93ccd60a1
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Remove dev driver and integrate it in the default pinmux driver.
Jira: ZEP-958
Change-Id: I55670240f8a21749d3a6ae22e300e16ba80a2fb6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
ARM's Cortex-M Prototyping System (MPS2) is a board with an FPGA that
can be programmed with different 'SoCs'. To use these in Zephyr we need
a set of board files for each variant.
This adds a board for a variant which implements a Cortex-M3 CPU; the
naming of this matches that used for the Zephyr SoC (which is itself
based on ARM's documentation nomenclature).
Change-Id: Ie02a67a03016b8aeee31e3694f0edbcc37f9ee64
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add the GPIO pin and port definitions for the LEDs available on the
board.
Change-Id: I586a0ebfbbe8fa6e50dd1f91c1437665dd8ec677
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Add the GPIO pin and port definitions for the button and LEDs available
on the board.
Change-Id: If74cf9d780227346c7c8816e6eadca00b16953b2
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
This patch updates the default defconfig in order to support the new
Timers implementation.
Jira: ZEP-1300
Change-Id: I749042bcf41c6b4cb11614315c3c2ce09cdb2aa8
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Since commit "build: use target 'debugserver' for Qemu debugging",
DEBUG_SCRIPT should be used to enable make debug option
This commit provide debug option to following boards:
nucleo_f334r8
nucleo_f401re
stm3210c_eval
stm32373c_eval
Change-Id: I92eb36257b6e05125440b0e83985d59bcda27aa8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Stop using the specific uart_k20 driver by default and start using the
more generic mcux uart driver instead.
Jira: ZEP-719
Change-Id: I7b107ea7118887591362159283ebb5413b45595a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This follows the board.rst template in the RFC
for board documentation:
https://gerrit.zephyrproject.org/r/#/c/9703/
This RST file was validated visually by rendering
using the online tool: http://rst.ninjs.org/
JIRA: ZEP-1541
Change-Id: Ibe6e1c7f8eb3c7862b4087a78b469693927280a2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The headings on some .rst files were not following the expected
heading order of using # for h1, * for h2, = for h3, and - for h4
This patch fixes that, and the doc/templates/*.tmpl files created
for folks to use as templates for creating board and sample docs.
Change-Id: I0263b005648558d5ea41a681ceaa4798c9594dd9
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
zedboard_pulpino
1) has a 16750 uart, which is compatible with the uart_ns16550 driver.
2) make use of the pulpino timer driver
Change-Id: Ifda710fc8dea547ada05bb42e604d7cfdff284d5
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
The qemu_riscv32 board makes use of:
1) the uart_riscv_qemu driver
2) the riscv_qemu_timer driver
Change-Id: I413e3990a66bc62a0d15d82ebca6940b381fed43
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
The k64 gpio driver quietly initializes the pinmux to force the pin to
be a gpio, regardless of the setting defined by the board's pinmux
table, or even if the pin was not in the pinmux table.
This behavior caused the accelerometer interrupt pin to be incorrectly
defined in the frdm_k64f and hexiwear_k64 pinmux tables.
Change-Id: If46df0e051452fef291d5ad5cdff56463d5f465e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The hexiwear_k64 i2c pinmux settings were copied over incorrectly when
the new mcux pinmux driver was created.
Change-Id: I72e5f8f7c06e2d9b08921109691edaf311f3811b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the uart console pins from the k64 soc init to the frdm_k64f and
hexiwear_k64 board pinmux tables. Not having these pins in the board
pinmux tables led one to believe that no pins in PORTB were being used
on the hexiwear_k64 board, and thus the port was incorrectly disabled by
default.
Also fixes PORTB to be enabled by default if the uart console is used.
Change-Id: Ide6b7b34dfba8a75a02a8f2bf37cce843afb92f1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Provide USER button and LD2 Led defines in order to get basic samples
"blinky" and "button" available on nucleo boards.
Defines have been named in order to match with board printing.
Aliases are provided to get compatibility with zephyr sample code.
Change-Id: Ie23a4f63c406def50b94a644d4e136d3bda1ceff
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Previously, CC3200 drivers had two options to use the peripheral
driver library APIs:
1) Build driverlib SDK files in Zephyr, in ext/hal/ti/cc3200/*
2) Link directly with the driverlib.a, from an externally installed
TI CC3200 SDK.
A new option is added to replace option 2), and is now the default:
3) Use the driverlib functions already provided in ROM.
This enables a savings in code size, which will depend on the
types of device drivers configured and the number of SDK
APIs actually used.
A rom_report build of the shell sample application showed
a savings of about 2kb in code space using this new config option.
Change-Id: Ie1ede6f7aacd23db20f5292e776f1dfeab5c7fe0
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Merges the ksdk pinmux dev driver into the regular ksdk pinmux driver,
which now exposes the public pinmux API. Removes the private ksdk pinmux
API and converts the frdm_k64f and hexiwear_k64 boards to use the public
pinmux API.
Jira: ZEP-958, ZEP-1432
Change-Id: Ie5f60b604133093050b9c596050cad776d7b7cb3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enable PORTD on the frdm_k64f only if SPI_0 is enabled. Otherwise, there
are no pins in the pinmux table for this port and it should be left
disabled.
Change-Id: I7f8a05552f6a320debfd11a780be1092da831101
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Disable PORTA and PORTB by default on the hexiwear_k64 since there are
no pins in the pinmux table for these ports. Enable PORTE only if UART4
is enabled.
Change-Id: Ifdb01cacf0c475a9478454eb61474a930e22a628
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds the documentation page for the ARM V2M Beetle board into
the Zephyr tree.
Jira: ZEP-1300
Change-Id: I4f2fd9a4e496c0a674272f94bedcadf3c71d9971
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We get odd warnings associated with Kconfig because of this:
warning: symbol value '0# empty for now, use this file for global kernel
configurations and overrides.' invalid for CLOCK_STM32F4X_APB2_PRESCALER
Change-Id: I77c2828ab29dfa179f345953cc490dbd67fd0b5a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes the following warning:
warning: override: reassigning to symbol UART_CONSOLE
Change-Id: I09805bdfa31146faf276ca4ec06487a5d71cdff5
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will replace the current goal of 'make qemu' with 'make run' and
moves Qemu handling into its own file and into the boards instead of
being architecture specific.
We should be able to add new boards that support some other type of
emulation (by adding scripts/Makefile.<emu type>) and allow the board to
define their own options for the use type of emulation.
'make qemu' will still work, however it will be deprecated, starting
with this commit it is recommended to use 'make run'.
Jira: ZEP-359
Change-Id: I1cacd56b4ec09421a58cf5d010e22e9035214df6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the existing debugserver target also for Qemu debugging. Qemu
should be maintained as one of many emulation/simulations platforms and
emulation should be abstracted in the Makefiles and not tied to Qemu.
qemugdb will still work, it is however being deprecated.
Change-Id: I0cd10fb66debb939b8f7f1304bf2ef4605da6a1d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Re-add board documentation and integrate into the project online
documentation.
Setup sphinx to pick any new board documentation added to boards/*.
Change-Id: Id208d5ef923f8806135879dd33a55ed527dc5f27
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Disk IO functions are used by both FS and USB Mass Storage.
This patch refactors those from FS directory to a separate one.
In addition existing, config options were modified to make
stuff meaningful.
Jira: ZEP-1276
Change-Id: Ia2a2e18f3dbbbdb964c3dc0427d8138ad86134cd
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable arc to access the spi controller on I/O fabric.
There are two spi controllers on quark se SoC. One is attached
to the I/O fabric and the other one is in the sensor system.
X86 cpu is only able to access the spi controller on the I/O
fabric and the access is supported by existing code. HW allows
arc to access both controllers. But, the existing code only
gives arc access to the controller in the sensor sub-system.
Let's grant arc the access to the controller on I/O fabric as
well by the following changes.
1. Add spi_qmsi.c into arc compilation.
2. Use the already defined macros to choose interrupt numbers
and do interrupt unmasking automatically based on the
compilation targets.
3. Add new symbols in Kconfig including driver names for both
controllers
Jira: ZEP-1190
Change-Id: I40a5d423d4b7986a897834d1a3831938005eda6f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
ZEP-1317 records a problem were em_starterkit appears to boot up
EM7d, sometimes, due to a misread of the dip-switches.
This could be a mechanical issue. I am seeing it on my board too,
and I often have to struggle with the dip-switch to get it to boot
EM9D. For automated-testing, perhaps it is better if the default is
EM7D, since this is the all-switches-up and contact in the switch
isn't needed. Meanwhile, I'll work with our board team to try to get
to the bottom of this.
ZEP-1317
Change-Id: I41095c1d8b07ce156cc3856a50196c064af2ee18
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The basic button sample expects SW0_GPIO_NAME and SW0_GPIO_PIN macros to
be defined by board.h. The frdm_64f doesn't have a physical switch with
this name, so create an alias to SW3 to make the sample work.
Change-Id: I61eb096582d9898dbcb9799e69078ad0c4b700cf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The basic blinky sample expects LED0_GPIO_PORT and LED0_GPIO_PIN macros
to be defined by board.h. The frdm_k64f and hexiwear_k64 boards don't
have a physical LED with this name, so create an alias to the green LED
to make the sample work.
Change-Id: I3426c571bb2e3165dbd9f4372d863b474c35fd5c
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Previously, UART clock enable was done in pinmux init.
This is now moved into soc initialization, along with other
power related initialization routines.
Change-Id: I1f9464655ad966e9caac2d238006f12a06b202ab
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Previously, running UART applications in Zephyr from sFlash would
not show consistent character output.
The PRCM clock enable for UART was missing the sleep mode while
enabling the UART clock.
This has been fixed, and verified with philosophers (polled output)
and shell (interrupt driven) zephyr examples running from sFlash.
Change-Id: I95a87996f252d82b0c1c13d3f77535971b5cf9c5
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
In this particular case the LEDs are actually arranged in a 3x9 matrix,
with the GPIOs wired to the rows and columns of said matrix. An upcoming
patch will provide utility functions to access the matrix.
Change-Id: Icce93ee6a08ae28445c6dc4a41529105ac80f14a
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
Change-Id: Ia0be30cecd8c0ceabb495258480eb6f3ce13d3e5
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
Change-Id: I2785441c286b95fd77e636e9bf3d68bc9f5a1acc
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to the
corresponding GPIOs they are wired into.
Change-Id: I60903eb834ef1b2618b0525896c120fca84db177
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
To make way for the upcoming blinky and GPIO support for nRF5x-based
boards, this change addresses the hardcoded dependencies in Kconfig
default configurations of the different boards, moving the common option
defaults to the SoC default configuration itself.
Change-Id: I8db0750311ad5a12b76237b39438376f20f6f496
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds generic definitions for GPIO pins for onboard LEDs and
switches to enable the basic blinky, button, and disco
Zephyr examples for the TI CC3200 LaunchXL.
Change-Id: Iac0ed2ad01285f9e84eea1fa7013771ddd8d3a78
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Leverages the configuration generated by the TI recommended PinMux
utility to enable pins for the 4 GPIO ports on the CC32xx LaunchXL
board, pre-configuring GPIOs for the onboard:
- 3 LEDs, and
- Two user push buttons (SW2, SW3).
The pinmux configuration is used in lieu of a Zephyr
pinmux driver, and is called during board initialization.
Change-Id: Id2403fc2ec3fcc0a62ee5149e1ac596e7e06ead4
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
With the appearance of the nRF52840 IC a new Preview Development Kit
(PDK) board has been introduced. This patch adds basic support for this
new board.
JIRA: ZEP-1418
Change-Id: If5845e75312ec756b968e595e5dc31c4c9624be2
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
In preparation for the new Nordic MDK and nRF52840 IC support this patch
adds the specific nRF52832 IC model in the pca10040 board default
config, so that future boards with different ICs from the same nRF52
series are supported correctly.
JIRA: ZEP-1418
Change-Id: Ic7c2076eeeb33fb729e4dbba2ff4702ab812a826
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
All pins from the existing pin init in
drivers/pinmux/k64/pinmux_board_hexiwear_k64.c were brought forward.
Jira: ZEP-1393
Change-Id: I3eb38dc435809cb7997d5884ff63bf8dd1e54720
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some pins were not brought forward from the existing pin init in
drivers/pinmux/k64/pinmux_board_frdm_64f.c because they do not appear to
be used anywhere and it increases power consumption to enable them. For
example, 6 pins were enabled as analog inputs, but there is not yet an
ADC driver for the k64. The pins that were not brought forward are:
* PTA 0-2
* PTB 2,3,9-11,23
* PTC 2-4,10,11
Jira: ZEP-1393
Change-Id: I7410f6d993bd0a4df8f80df72e84def73bcf74cc
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch updates defconfig file on V2M Beetle board in order to enable
clock_control and watchdog by default.
It defines also a dummy LED in order to maintain compliance with the
Zephyr test environment.
Jira: ZEP-1300
Change-Id: I40ae4cb19e79ff24e1e351a2185a7191f03664d1
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add board support for the Nucleo64 L476RG development board.
Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers
Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add defaults for the fxos8700 sensor, including which i2c instance, the
slave address, and interrupt pin.
Change-Id: Ib8a1e451ddfd84d2b2f19b0da846854acc969dcf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add defaults for the fxos8700 sensor, including which i2c instance, the
slave address, and interrupt pin.
Change-Id: I4b0255308fd5c9b7c43f0f22e8ce2fe86c5e7011
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch fixes the unused parameter warning found at the
Arduino 101 and Galileo pinmux code.
Change-Id: If67538e955ca1c2d12d4b8378f451bd88b4a52ff
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
I notice that many of the other boards here use 1msec for the tick.
I notice also that when switching to unified kernel, scheduling based
on time has a lot more jitter with a 5msec tick.
I think a better default is 1000 ticks per second for em_starterkit.
Change-Id: Icc93345762dbea7d71ca9f4735bcf73f75cde273
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Currently it's only possible to configure those GPIOs through
boards.<h/c> files and thus it's not relevant for board that do not
embed cc2520 but might get one wired to it, unlike
quark_se_c1000_devboard which directly embeds one cc2520.
Change-Id: I819bc1d2de707ea12eb70dc60a40b28f92666e51
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit removes the legacy Contiki based uIP stack.
The new native IP stack must be used after this commit.
The commit also removes following things:
- legacy cc2520 driver
- legacy ethernet drivers
- legacy IP stack samples
and changes these things:
- disabled tests that only work for legacy IP stack
- select new IP stack by default
- enable random number generator by default as it is needed
by the new IP stack
Change-Id: I1229f9960a4c6654e9ccc6dac14a7efb9394e45d
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add TI CC2520 driver allowing RAW access to radio interface similar
way Bluetooth user channel works. This makes possible to handle radio
channel inside external 802.15.4 stacks, for example export it over USB
and handle in Linux.
Change-Id: I61bb4c8b998ff1e47dc65427ac471f04ec8fea63
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Making sure we build cc2520 driver when native IP stack is used.
Change-Id: I25f3cb38a2da0c7a54ac4befcea217dc70b31028
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The current ARC GCC compiler used in Zephyr SDK v0.8.2 generates
incorrect code when using the "-fno-omit-frame-pointer" option. This bug
should have been fixed in the 2016.03 release of the compiler.
Jira: ZEP-1243, ZEP-1403
Change-Id: I0901f55973c1ea37491b07bf625d0d1918803f3e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If SPI 1 is selected and GPIO CS trick as well, then do not use
controller's CS but GPIO 0 instead as a CS.
Change-Id: Ifc17cdc44f47b9348f4c655d510349e3124dceea
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Make the blinky application work with this board.
Change-Id: Ibe8d310229e2ff79a2164b7c8f16e7ba3ee0b8c2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add board support for ARM V2M Beetle platform.
ARM V2M Beetle board is build around the ARM Beetle Cortex-M3
based processor.
The support has been tested in nanokernel mode with the bringup
application that will be pushed with a future patch.
Jira: ZEP-1245
Change-Id: Ib05a40c072f10149e692283177387cf2cfe32f66
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The right flag to enable GPIO as SPI CS is SPI_CS_GPIO.
Change-Id: I06fc5e7e44f9aa6bad5867462c6c069d545bb0b7
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The Quark SE C1000 BLE Core is a nRF51822-QFAA, with 16kB of RAM and
256kB of flash. The configuration is otherwise similar to the Arduino
101 BLE, except that the UART RTS pin is the same as that used by
nrf51_pca10028.
Change-Id: I88cb18876bdde65abcf9a499894f70802046c824
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The SPI_0_CS_GPIO and SPI_0_CS_GPIO_PIN values were defaulting to
something not very usable, because of which e.g. the file system
test app was having to explicitly set the right values in its sample
configuration. Having a proper defaults in the board defconfig means
this isn't needed anymore.
Change-Id: I1399914451c1616588322e25304d40d3dd1151e7
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
The UART has no hardware flow control pins.
Change-Id: I16ffeee15a1f5714c695dc8b38e77fb134ea7a0f
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Change the default Bluetooth UART device name to the UART connected to
the arduino header. This allows using the frdm_k64f with a frdm_kw40z
shield board.
Change-Id: Id22950f0a48a7c95bcddc6f1ec044f7a37cb9b72
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Change the default Bluetooth UART device name to the UART connected to
the on-board kw40.
Change-Id: I2ae981bce31a58aed4dc6d3c378fc6f6a0bec76f
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/hello_world
- samples/philosophers
- samples/drivers/uart
- samples/shell
UARTA0 is currently supported.
Change-Id: I85727c622d4d42183cc9f2f8b43d653e245dd17e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Leverages the pinmux.c file generated by the TI PinMux utility
to enable UART pins. The pinmux configuration is used in lieu of a Zephyr
pinmux driver, and is called during board initialization.
UARTA0 is currently supported.
Jira: ZEP-1109
Change-Id: Iddb01f79043af034886859b608b7b6aadf844e53
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Added Kconfig and makefiles to be able to build a Zephyr application
on Linux/gcc, and load via OpenOCD.
Validated by running the hello world, and philosophers microkernel
samples, and stepping through the code in gdb.
Jira: ZEP-1109
Change-Id: If5d3e7b1a8ecf5ecf6a00f147742b3bc5716190f
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The k64 SoC has multiple instances of many peripherals, but which
instances can actually be used depends upon the board design and pinmux
configuration.
Move all instance-specific default driver configurations from the SoC to
the boards (frdm_k64f and hexiwear_k64). Default driver selection
remains in the SoC (e.g., enable the KSDK I2C driver when I2C is
enabled).
This paves the way to support different driver defaults for the
frdm_k64f and hexiwear_k64 boards, but it does not yet change any of the
default values; it only changes where the default values get set.
Change-Id: Id9ed898762eb400ecefeac91ae4dce66da05622d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
STM32Cube uses SoC defines made to reflect HW heterogeneity that
should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f401re following define is used:
*STM32F401xE
Which means:
*Same SW could be used on STM32F401RE and STM32F401CE:
same CONFIG_SOC could be used
*Different SW should be used on STMF401RE and STM32F401RC:
different CONFIG_SOC should be used
This change focuses on stm32f4xx series.
Change-Id: I56ff4d1815d09747cf722385532eb2dcbdf37b44
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32Cube uses SoC defines made to reflect HW heterogeneity
that should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f103rb following define is used:
*STM32F103xB
Which means:
*Same SW could be used on STM32F103RB and STM32F103VB:
same CONFIG_SOC could be used
*Different SW should be used on STMF103RB and STM32F103R4:
different CONFIG_SOC should be used
This change focuses on stm32f1xx series.
Change-Id: I5ecfaa52952d04421b27b5e74fb71b4fc108b662
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
With the driver for AON GPIO available to the ARC side, the user
buttons in the board are usable by both cores.
Change-Id: Ib8e67fba1513caec2e89c31c16f7ed0458c4ed76
Signed-off-by: Iván Briano <ivan.briano@intel.com>
These options were only needed for a MyNewt-based nRF51 firmware on
these boards (the MyNewt BLE stack is called Nimble, hence the
prj_nimble.conf sample config files). With a Zephyr-based nRF51
firmware these options are no-longer needed, so it's not appropriate
to have them default to enabled. Instead, if they are needed, require
the app-specific configuration to enable them.
Change-Id: Iefbee4d97590af4e11bcedea05fe61f32a147b83
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
Change-Id: I92b543022ae6103683cc9e16b925508fb3cf7db1
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Move common config options one level up to try to simplify the per-board
defconfig
Change-Id: I3d80fa494050634d0f877af2015b01b85df20d1d
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Those defined will be used in sample applications that deal with
on-board LEDs.
Change-Id: Ia447adfd33547e01206a9fd7ceeae420ba806f31
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The BLE core on the Arduino 101 is an nRF51822 QFAA (256kB flash, 16kB
RAM).
Change-Id: Ia802b3eb634c0cd6775c4059c9569bccd915a578
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Removing options that are already set by the soc Kconfig files.
Change-Id: I603c7797a26e3afedfa5ee72fe989c614c080fe5
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
If a deprecated board is built, a warning is presented indicating
what future release the board will be removed.
Change-Id: Ib166198d8b71303b990a30f79429f51871591a97
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The value for CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC needs to be set
in the SOC, since each SOC will have a different frequency
on the EM Starterkit. The EM7D, for example, has a 30Mhz CPU clock.
It was already being defined in the SOC, but the board setting
would override the SOC.
Change-Id: I4daf3b94f15bad99c0f3c8674a15ad225aa3d274
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Introduce an architecture sorting of boards. This is to allow for
easier maintenance going forward as the number of boards grows. It
will be easier for any scripts to know the board/arch mapping without
having to maintain an explicit list of what boards are associated with
which arch. We can also do things like have architecture maintainers
cover reviews and branches for arch/${ARCH} and boards/${ARCH} going
forward.
Change-Id: I02e0a30292b31fad58fb5dfab2682ad1c5a7d5a7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The exact pin numbers for the nRF5 UART configuration is
board-specific, so the Kconfig default values should be in a
board-specific file.
Change-Id: Ibaacde292db191221e32b3626c68bf972dd26016
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add board support for the Nordic Semiconductor's nRF51822 (nRF51 series)
Development Kit.
Change-Id: Idc082c6930bdebf3726fd453fb1309df7fab3f46
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
The EM7D SOC is similar to EM11D, except it has different sized
iccm and dccm memories, and also has FIRQ with RGF_NUM_BANK==1.
To select this SOC on the board, all dip switches are in the up position.
See ZEP-966.
Change-Id: I864ffe0efdf367de0a8cd58e9c46efd7e401c671
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The hexiwear board pairs two Kinetis SoCs - k64 and kw40. The k64
already has SoC support in Zephyr, therefore we are adding support for
another board for the same SoC. Note, however, that hexiwear uses a
different SoC package than the Freedom board and therefore has a
different part number and pinout.
The second SoC on the hexiwear board, kw40, runs a BLE controller stack
with HCI; it does not run Zephyr (yet).
Jira: ZEP-716
Change-Id: I206f6ef58010d13075a00432040894392117e3ce
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Using AON for GPIO kconfigs is very specifc to quark se, there
is no need to make this special for this platform. Use the
existing scheme instead.
Change-Id: I946431490380dc0f537d6056277a94c9c9c80fed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Exposes the SPI 1 pins by default in the pinmux
only if the SPI 1 device is enabled in the Arduino 101 board.
Change-Id: I9a8ad0942bb1de7130013931e86144139f78c90e
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
Add PTB22, PTE26, and PTB21 to the frdm_k64f pinmux table, and helper
macros to board.h to map them to red, green, and blue LEDs respectively.
Change-Id: I257621467e71dfd9bdc5d97d6da444dfb5c58b2b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add PTC6 and PTA4 to the frdm_k64f pinmux table, and helper macros in
board.h to map them to SW2 and SW3 respectively.
Change-Id: Ia30df9015d6d3c09131b4fbb2f2009ee745f7268
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Point to a new wiki page for the documentation. The old page can be removed
once this patch is committed.
Change-Id: I2b031bfffe10ec24c41c58d0754f2b14d95f5e53
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
restoring of the original firmware is now possible using the
flashpack utility.
Change-Id: I32df4b5bb63fb5f6a318026e9f89b1504bd37f5e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board is not being used or tested and does not actually
run on any hardware, remove it in favor of well supported boards
for this CPU.
Jira: ZEP-850
Change-Id: I01c825c7eb44d6c321f2ffb88e8899da528921dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board is not being used or tested and does not actually
run on any hardware, remove it in favor of well supported boards
for this CPU.
Jira: ZEP-850
Change-Id: Ied681b6059ad74f9d019054292c919a9f938e7d3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Arduino 101 comes with a bootloader that supports DFU
and flashing of all cores using the dfu-util package.
This changes the memory layout of the image built for the
Arduino 101 and remove previous work-arounds to allow booting,
including the version-header section in the linker script.
The bootloader expects the text section at +0x30 from the physical
load address and thus requires special treatment in the linker
script.
Other changes by Andrew Boie:
The flash size parameters were both wrong. X86 side has 192K
of flash from 0x4003000 - 0x40060000, the entire span of
sys_flash1.
ARC side is now the span from 0x40010000 - 0x40030000, 128K.
Change-Id: Iecfa5d2b84a3f522d9eca06268d6b8b71a094aaa
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quark D2000 and SE based boards (but Arduino 101) use QMSI bootloader
by default. QMSI bootloader sets up GDT in the so-called 'basic flat
model' just like Zephyr does by default.
This patch changes Quark D2000 and SE boards default configuration
so they rely on QMSI bootloader and we don't sets up GDT twice.
Change-Id: Ic6e520148b732bd48c00657c6c8138a8d865faef
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Enable the new BLE controller by default in nRF52's Nitrogen board.
Change-Id: I1692fc8853c1971c22a6a62e052d6f04b881ffca
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Enable the new BLE controller by default in Nordic's nRF52 DK
(Development Kit) board.
Jira: ZEP-702
Origin: Original
Change-Id: I578d582536186e326c81f9274faa2c0f1ae851ff
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Treat the sensor subsystem as an independent board that can send
messages to UART and disable IPM and the messaging interface. IPM
can be enabled by applications that require such interface.
Fix all samples that are affected by this change to make sanitycheck
pass.
Jira: ZEP-451
Change-Id: I3df6af16adefaefec02b97778d6c68ffc920ac35
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Many Kinetis SoCs contain an Oscillator (OSC) module and a Multipurpose
Clock Generator (MCG) module to configure clocks. Adding options to
configure these modules for PLL operation with different external
oscillator frequencies, which can vary across boards. More options may
be added later to support other clocking modes such as FLL.
Jira: ZEP-715
Change-Id: Ia121cc5b464d7e681883507bd756d331a8abd6ef
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This will lead to conflicts and warning coming from Kconfig, so just
whitelist the board in the samples where this hardware is supported
Jira: ZEP-739
Change-Id: I4a2f3bdcfdb44fc75df0e272c237789ee16e0de1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Kconfig allows selecting NETWORKING_WITH_15_4_TI_CC2520 even if the
current board doesn't support it, and also selects it by default. This
breaks building the 15.4 sample with qemu_x86. Add a config option for
having CC2520 support and enable the choise only if it is available.
In addition, remove unused function from iee802154 code, as it now
fails the tests.
Jira: ZEP-697
Change-Id: Ib082f82acdd0f86d3306bbd3bb827f61b0fd0be1
Signed-off-by: Jaakko Hannikainen <jaakko.hannikainen@intel.com>
Contains an nRF52832 as the main SoC and a LPC11U35 that provides onboard
debugging capabilities and a USB-ISP interface.
Change-Id: Ie6457cc5586bda9bbc0c073f96d23cc2205332c5
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Flashing issues have been resolved. The build system support for
flashing and debugging has been changed back to UFM scenario.
XIP and reset vector no longer disabled. Wiki documentation updated.
Change-Id: Iffe326485c20808dabc1e19e0b18b7b60a83d797
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is not needed anyore since we don't have a binary rom available.
Change-Id: I35b1488753857a887b1fd2b011660a9d7734cc5a
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
There is no code in the board file so remove it.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I200a39970bba851e238d4c52070cc9e0ea362782
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no code in the board file so remove it.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I4e3d520a7a23b3ce853c4784e3a6401e824f25fc
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no code in the board file so remove it.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: If690a5b0758e7bf430e21a3c8b8fbe4d0bcb022c
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I6e5ce35bd7b9b4411820bc112a08dd0d809495d6
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I742bc695e8a1efb34003e651f57c8aba4fb798f6
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I54e94ff2cc2d2bfbfb8a016ae49b4b4d13f25dd2
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: Ifa824af1c5c7566ab1379b467cb9bef50f887729
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I1ed09f05ea2c2d08d11fc742d76f32c1f8f2fbbd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I71892fd950f422d77cb28c2a9fb5391ca151ff34
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: Ia29cbf53670e254202c3d8916a28a1ba2254107c
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I28f3ccc6e6c7c20c679fd0e4ab36aaa8b1e72d75
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I2e824e1baf582517e713cabe1850c9accd509a5a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I891f5130f5bfd7a07b644ee0223b18fd86061cfa
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_UART_NS16550_ACCESS_MMIO doesn't exist anywhere so remove it from
the defconfig.
Change-Id: I221cbb4a9fe5c4ee567e994f2c617b50b1228d13
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_SPI_INTEL_LEVEL_LOW doesn't exist anywhere so remove it from the
defconfig.
Change-Id: I5241101a1b4b2f74aaac3a59721e65f71f88cdfd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: Ia55a2614d3eea1920f1be7880be2bf82c6c3c7db
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For Arduino 101, users must use the original ROM FW provided for this
board. For Quark SE development boards (!Arduino 101), users should use
the QMSI bootloader.
Here we remove the old ROM binary we were shipping with Zephyr as these
are now provided as part of QMSI releases on github.
The arduino_101_load.sh script was also updated to avoid trying this
step since the binary is no longer available.
Change-Id: I822a9d005355cb69177bb1a1d0ddef087ea07309
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
CONFIG_UART_CONSOLE_BAUDRATE doesn't exist and we will get the buad rate
setup from the UART_STELLARIS config defaulting to 115200
Change-Id: I268051055689134c54c92f696a9a560ca5336844
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use Kconfig symbol CONFIG_SOC_NIOS2_QEMU instead of CONFIG_SOC_NIOS2F_QEMU
Change-Id: Ia04666830dc9d6f64467fae103418920c202af27
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is at the expense of code size. The QEMU and MAX10
targets have plenty of space so enable it for these boards,
but leave off by default for others.
Change-Id: I93fdb7db14232727e9953b22490d8869ff3b60e7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The 16550 will now be the default console device.
Change-Id: I92a6b49984b055e7d5f5c97e5192150be0d5c5c7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For both of these, we send the .elf binary over the JTAG and it gets
written directly into SRAM. The CPU boots the image from the entry
point (__start).
This does not provision the kernel onto device's User Flash Memory
(UFM). Implementation of this is still in progress see ZEP-273.
Change-Id: Iae8188a21e4a3eecfda0f4f0bb220c0607d719cb
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Remove unused defines and turn off debug options.
Change-Id: I21e6b54a81505783396991e165a8087372d4986b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
USB Device core layer is a hardware independent interface between USB
device controller driver and USB device class drivers or customer
applications. It's a port of the LPCUSB device stack.
Change-Id: I9371ffab7034d20953fec0525e72fbe9e094c931
Signed-off-by: Adrian Bradianu <adrian.bradianu@windriver.com>
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
The .elf files sent to QEMU boot from __start, the reset vector
is completely ignored.
Change-Id: Ib436547bcb1c0154b5c23638dfdaf59627b109ea
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Attached PCs can read these messages with the 'nios2-terminal'
application.
Change-Id: I44942c8feaf3901adb410269460787cf2a8b6a4a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Useful at this stage of the bring-up. Stack memory will be initialized
with 0xaa and we build with -O0.
Change-Id: Icd0e9ac49c0158f7b18e4e286a07ca281d20e7e6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Has extra debug capabilities and the board has sufficient space
for it.
Change-Id: I638c665e766f1a41dc5db89fcf8b8c0d44912789
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I0fb1105f19149b0e17c45455368ddf0ef75e5165
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The KSDK device header files require a preprocessor macro that defines
the part number string (e.g., MK64FN1M0VMD12). Create a hidden Kconfig
option to hold the part number string, and hidden Kconfig options that
the board Kconfig will use to select the specific part number.
Change-Id: I612e785026261e425b47b5b7fae0c65b4f94b30b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For the moment, NIOS2_CPU_SOF must be set with the path to the
CPU configuration. We are checking with Altera on whether we
can directly check in the binary to the source tree.
These scripts depend on tools provided by the Altera Quartus
Prime Lite Edition. This is available for free but requires
registration on Altera's website to obtain.
Change-Id: Ia6cb6c9e43c3e141807a887cb25c47b370a7d8e9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
I see in the TOP makefile that if FLASH_SCRIPT is undefined,
it outputs the message "Flashing not supported with this board".
This behavior is wanted currently as this board does not
have a memory mapped FLASH device. It has a SPI-FLASH and
there are different instructions for putting an image on to the board.
Change-Id: I07dcdd9a7fd8346b846ee0fe1312d22f9ffaa13e
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Do not redefine the the pinmux configuration for the board, just use
the data directly. No other board will be using those, just the galileo.
Change-Id: If774bc5c4335021ae58a682224f092db23bc9f1b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move pinmux defintions under board/<board> and have all board
configuration in one single place.
Change-Id: I055b024384fae2938881b1c57d8ce7426e732e92
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
the flow control and baudrate configuration is for BLE, so
make this dependent on BLE being configured.
Change-Id: I35f8e00ac31658fb1ad4a2751169c076f1e78532
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Board support for the ARC EM Starter Kit provides for a board
that can select one of two SOCs. The EM9D and EM11D commits
will be done separately to expidite review. Also submitted here
is doc/board/em_starterkit.rst to explain details about this
Zephyr board choice.
Change-Id: Icd9fac045c700ad8dcb95161fdd63c130f665778
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: I1776178ad6fb984d6e293dbfa8bb1d718e4c2566
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixed openocd configuration to accommodate new releases of the hardware
Change-Id: Ic87193c3980f4caf2fec1fdcf79d8bd30dbf4f8c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the same Kconfig infrastructure and options for all SPI drivers.
Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update openocd configuration file allowing to flash with make
flash for the majority of boards. Old versions still might be flashed
with zflash. This also helps debugging boards.
Change-Id: Ie9701c09e1806e0c4de39f95bd34bce9f66051cc
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.
This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.
Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The factory defconfigs should be used to generate images
compatible with the factory settings and the bootloader that
comes with the Arduino 101.
When using those images, you will be able to keep the original
bootloader and flash the images using dfu-utils and there will
be no need for a JTAG adapter.
Jira: ZEP-219
Change-Id: I34b5e9ef73314f46b31086a772d94d3ddcc6c436
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
To boot zephyr on the Arduino 101 running the original bootloader
which supports DFU, set the following in your application configuration
file:
CONFIG_SS_RESET_VECTOR=0x40034000
CONFIG_PHYS_LOAD_ADDR=0x40010000
CONFIG_VERSION_HEADER=y
Jira: ZEP-219
Change-Id: Ia015a7b6fce888b49ed22c558de992132d4713ea
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enabling individual I2C controller is done in the SoC kconfig defaults.
There is no need to do that in the board defaults.
Change-Id: I45a62d8bc96a5f42b3fd613f5890bcdf04c92032
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.
Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adding an openocd.cfg to control flashing of the Nucleo-F103RB board
Change-Id: Ia730244bdc2d31d074fe72c41d3e58e7830c8df0
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On current Curie-based boards UART 0 is wired to the nRF51 BLE
controller and requires HW flow control to be enabled in order to
function. This patch restores the same behavior that was present
before the "qmsi: uart: use built-in qmsi driver" patch.
Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Do not have priority per IP, use one config instead.
Change-Id: Ieb2923d4749a294e2a1c677d47d56a14cee3f36d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.
The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").
For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).
Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This UART config is needed to handle properly btp tester serial data
flow.
Change-Id: Id013a232e105247414d44148f5ccfe708b19c4a8
Signed-off-by: Grzegorz Kolodziejczyk <grzegorz.kolodziejczyk@tieto.com>
Change NBLE_UART_ON_DEV_NAME to BLUETOOTH_UART_ON_DEV_NAME for H:4
Change-Id: I4391b32c75c738478c964d4c79f6eb80d737b043
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable Power Management handling also for quark_se_devboard with
nimble HCI stack.
Change-Id: I6e5bb85c4f2370f52904be9dff14ce8e7fb1eb44
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable Power Management and enable logic for quark_se_devboard,
without the patch BLE Radio module might be enabled with JTAG tools
or right after boot.
Note that some boards do not have the GPIO pins connected to BLE
module but this should be still OK wrt to board functionality.
Change-Id: I9019e406afa36fe2dea52c07075c947e8c50a961
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add configuration for OLIMEXINO_STM32 board.
By default, the UART console is forwarded to USART1 available on
UEXT connector. All GPIO ports available on the connecot headers
are enabled.
Change-Id: I60b3ff20ea60b5294a3a6c31f4dba0802794f9d8
Origin: Based on nucleo_f103rb board
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some controllers will emit an initial "NOP" Command Complete event
during initialization and expect the host to only send commands once
this event has been received. This patch adds a new Kconfig option to
be used in the case of such controllers and defaults this to true on
Arduino 101 with the H:4 driver where this behavior is currently
observed.
Change-Id: I440f14a7c07ac27545febf9f85ebcc343e2a4558
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.
Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.
Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
GPIO is not needed for quark_se_devboard for now when dealing with
NBLE.
Change-Id: I0dedf2bee0af153e1d6e224d90f4662f5601b2b7
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
GPIO would be selected by BLUETOOTH_NRF51_PM
Change-Id: I5d920723a46c1455d34c90c9dc43b21b91569ce1
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Currently there's no support for the H:5 driver on Arduino 101, so the
defaults set in defconfig should only be limited to the H:4 UART
driver.
Change-Id: I805d81c33701d179ffe26f4aed3fe2fb70d60d7b
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
If an external PCIe card inserted into Galileo board, the
devices I/O addresses may differ from the preconfigured ones.
For this reason PCI enumeration needs to be enabled.
Change-Id: I54b5ef9149f9eda0a390909a433b0e13a3dd7ecd
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
When choosing Bluetooth UART driver on arduino_101 select also
BLUETOOTH_NRF51_PM which enables the Nordic chip.
Change-Id: I22dcb60a676bb0e4cdfe995590803dbfbf87f23a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
To avoid explicitly having to state this in every application's config
file simply set the defaults to the sanest values.
Change-Id: I2c2bbd2424a12ec9a36bbd6d0c9cd9a1d259e5e5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This is a complete new cc2520 driver for zephyr. Intention is to fit
better within Zephyr device driver model.
- It's (almost*) ready to be instanciated as many times as necessary
- It's fully interrupt based on SFD and FIFOP (no pin polling)
- It's nicer to other sub-systems (it sleeps, no busy-wait loop)
- It still loosely complies to old legacy radio device driver model
*: GPIO API needs to be fixed in order to accept multiple callbacks, as
well as enabling callbacks to retrieve private data.
Notes:
- Hardware filtering does not work yet as the net stack, above, needs to
provide the relevant information for it (src/dst ieee802154 extended
addresses, short addresses...)
- A embryo of generic functions (txpower, channel, addresses...)
have been implemented but don't belong yet to any radio device driver
model. Such new driver model will come afterwards (soon?)
- SPI API would need to be improved to avoid as much as possible memcpy
as well as spi_slave_select() call.
Change-Id: I1fd6dfff28fba3984f6006d394ea12f1e763ac18
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
UART0 is connected to Nordic BLE chip, copy the configuration from
arduino_101 where there is the same chip.
Change-Id: Ic9fe30f4562d261920c0cfd359ea34be4e7e2476
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable GPIO and select UART0 for Nordic BLE chip.
Change-Id: Ic1bf82a8b97fcc231eb857ee0bd05381a24a2d25
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Set the target to ARC to speed up flashing. the difference:
before
downloaded 27320 bytes in 50.685825s (0.526 KiB/s)
after
downloaded 27320 bytes in 3.396626s (7.855 KiB/s)
Change-Id: I53ca26f97eefd40e869662b137f5a659082aa478
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
SPI flash depends on SPI. Enable the SPI flash driver only when
SPI is enabled.
Change-Id: I902588b806a4a5773fddb58a7567a8e0d4ba9fe0
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On Galileo Gen2 board SPI uses GPIO pin for CS.
Thus spi_intel driver must be initialized after gpio_dw,
so it's init level must be more that gpio_dw's one.
Change-Id: If2e5fb1106afe01e5567cf3fe72063bdc94ad3d2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Remove those kconfig options that are SoC specific, and should not be
configurable via kconfig.
Change-Id: Ia62888838877da4627419bd36c261d5254761acd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
These interrupt settings are SOC specific. So, move them to the
SOC level of Kconfig.
As IRQ priority is fixed in D2000, changed the value to 0 to
make it consistent with what other shim drivers are using.
Change-Id: Id20bed46c478a7555ae976e3a3063ba2cb099788
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This will improve the speed when flashing an image to the board:
before:
downloaded 4936 bytes in 7.982860s (0.604 KiB/s)
after:
downloaded 4936 bytes in 4.486743s (1.074 KiB/s)
Change-Id: I0209d53ba15dbf8e3f16e2d3675a35b58342776a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.
The default is to be triggered on rising edge, just as the same
old kconfig did.
Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This file was misplaced here. Atom board is now available only
for minnowboard.
Change-Id: If5a0d723600f957e2b024848b8cb8aac2e7a7ff9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver doesn't provide any API, it only initializes the pinmux
controller to appropriate values depending on the board.
The first board to use this new infrastructure is the Arduino 101 board,
because it is alphabetically the first.
To better organize code for the different SoCs and boards, a "family"
level is created in the 'drivers/pinmux' directory. The Arduino 101
board is part of the Quark MCU "family".
The PINMUX_DEV configuration (and functionality) is removed for now, it
will be added back when the pinmux_dev drivers are (re)introduced, with
clearer semantics.
Change-Id: Idf5cc3caf6be620aa50828ae8fdc535df6caf458
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Enable 72MHz SYSCLK by default. The board does not have an on-board
quartz, however the STLink frontend produces a 8MHz clock signal that we
can use. Since the clock signal is not coming from an oscillator, HSE
bypass must be enabled. Make sure not to exceed 36MHz clock on APB1 bus.
Change-Id: I6b0b499a1cc4b0deccbfa374fc9ca3e3e8cc38c5
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Enable 72MHz SYSCLK by default. We use the fact that there is an
on-board 8MHz quartz oscillator available as HSE clock signal. Make sure
not to exceed 36MHz clock limit on APB1.
Change-Id: I9ebc2144910253e68cd8a9b078884852f01c2cab
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Before moving pinmux related code to 'drivers/pinmux' fix their return
codes to be consistent with the rest of the API.
Change-Id: Ie84f64e93745d44bef8b9d2119f6a05cdc8cb8c4
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Add configuration for Nucleo-64 F103RB board. By default, the UART
console is forwarded to USART2, available on STLink V2-1 USB
connector. All GPIO ports available on the connecot headers are
enabled.
Change-Id: I266170d1288ef27f668410c5737c46cdf716e137
Origin: Original
Signed-off-by: Maciek Borzecki <maciek.borzecki@gmail.com>
Introduce configuration for STM32 MINI A15 embedded development
board. The board has a STM32F103VET6 MCU on board. The MCU has 64KB of
SRAM and 512KB of flash.
The board has the following peripherals:
- RS232 port on DB9 connector, connecting to USART1, pin mapping:
- PA9-US1-TX
- PA10-US1-RX
- a LED diode (U2) connected to pin PB5
- micro SD card connector with pin mapping:
- PC8-SDIO-D0
- PC9-SDIO-D1
- PC10-SDIO-D2
- PC11-SDIO-D3
- PC12-SDIO-CK
- PD2-SDIO-CMD
- on board SPI flash AT45DB161D-SU, pin mapping;
- PA4-SPI1-NSS
- PA5-SPI1-SCK
- PA6-SPI1-MISO
- PA7-SPI1-MOSI
- button (K1), connecting PB15 to GND
- 40-pin header connector XS5
Change-Id: Ia378b105abb25fb589a100185ea96512a5f98cf3
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Quark AON counter and timer sub-drivers. They are based
on the QMSI drivers.
In order to enable this driver, the following options
must be set.
CONFIG_QMSI_DRIVERS
CONFIG_QMSI_INSTALL_PATH
CONFIG_COUNTER
Origin: Original
Change-Id: Idbeabfaef3408f4d645b0e64a337d7f5f0f357c7
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
All driver APIs (i2c, spi, gpio, etc.) return 'int' type, but pinmux
APIs. So this patch changes the returning type from 'uint32_t' to
'int' from include/pinmux.h and fixes all pinmux drivers according.
Besides keeping consistency between all drivers APIs, this patch is
also applicable for the errno.h code transition. Pinmux drivers will
return negative errno.h codes so returning 'int' is more suitable
than 'uint32_t'.
Change-Id: I2a6e92d567a0e21fec363226da6197df94657d4b
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This adds a menu to enclose all board Kconfig. So the board
configs do not appear on the top level out of context in
menuconfig. This also reflects the SoC options where these are
under menus for each architecture.
Change-Id: I76ce2bf1acf7cbd2673ceb2eac71e96cdca2ff35
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This makes the board selection dependent on SoC selection. For example,
select Atmel SAM3 will only allow "Arduino Due" as board selection.
This disallows incompatible SoC/board combination, like K64F with
Arduino Due.
JIRA: ZEP-106
Change-Id: I675961cf33db5a0058fc68f14c8f16978f9c6b95
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This board is now part of qemu_x86 and shares the same file except
the configuration which makes it build with IAMCU.
JIRA: ZEP-103
Change-Id: I9a9911d013b493240c089ce71e9f95687dcc02a3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Making pinmux depend on GPIO breaks many tests and configurations
when running on real hardware. This should be added as local
configuration in the defconfig instead.
Change-Id: Ibbf1c9a3428ed692937383bf85218b0c120cbe44
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
CONFIG_HPET_TIMER_LEVEL_LOW and CONFIG_HPET_TIMER_RISING_EDGE are
selected from same choice option so cannot be both selected.
Since HPET_TIMER_FALLING_EDGE is the default only options overriding
this were left in defconfig files.
Fix following:
Merging prj_x86.conf
.config:10:warning: override: HPET_TIMER_RISING_EDGE changes choice
state
Change-Id: I5c88d2c0ae309afa11d9fae116235a8a424a2408
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Many bugs that have taken months to tease out could have been
instantly exposed had we run all our sanity checks on this
ABI.
Origin: Original code or copied from boards/qemu_x86
Change-Id: I6a5038bf99379470c3f736857d104024d3fc7978
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The pinmux API was modified to expand the meaning of the 'func' argument
to allow it to represent more than a pre-configured function. This was done
to reasonably accommodate a larger range of pin configuration options
offered by other MCUs, such as the Freescale K64 (up to 8 pin functions,
plus interrupt, pullup/down, drive strength, open-drain, slew rate, etc.).
This allows bit fields to be used to define various settings.
Change-Id: I2b216b822c6bae7133eed01c8c3339bb47b6c5db
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
In the pinmux_dev driver for the Quark SE development board in
pinmux_dev_set() the variable 'mode' was used, but it should have been
'func'. This was causing a compilation error:
/home/vinicius/work/zephyr/boards/quark_se_devboard/pinmux.c:
In function 'pinmux_dev_set':
/home/vinicius/work/zephyr/boards/quark_se_devboard/pinmux.c:245:23:
error: 'mode' undeclared (first use in this function)
uint32_t mode_mask = mode << (pin_no << 1);
Change-Id: I5b9df7c6b488dc5b8819fcf59bb3b994d9d4820b
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Enable support for WinBond W25QXXDV SPI flash on
arduino 101 platform.
Change-Id: Ia4dc73f956f79c6a56a31bc3dfca4e5298447742
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The peripherals utilizing UART were required to register their own
ISR rountines. This means that all those peripherals drivers need
to know which IRQ line is attached to a UART controller, and all
the other config values required to register a ISR. This causes
scalibility issue as every board and peripherals have to define
those values.
Another reason for this patch is to support virtual serial ports.
Virtual serial ports do not have physical interrupt lines to
attach, and thus would not work.
This patch adds a simple callback mechanism, which calls a function
when UART interrupts are triggered. The low level plumbing still needs
to be done by the peripheral drivers, as these drivers may need to
access low level capability of UART to function correctly. This simply
moves the interrupt setup into the UART drivers themselves. By doing
this, the peripheral drivers do not need to know all the config values
to properly setup the interrupts and attaching the ISR. One drawback
is that this adds to the interrupt latency.
Note that this patch breaks backward compatibility in terms of
setting up interrupt for UART controller. How to use UART is still
the same.
This also addresses the following issues:
() UART driver for Atmel SAM3 currently does not support interrupts.
So remove the code from vector table. This will be updated when
there is interrupt support for the driver.
() Corrected some config options for Stellaris UART driver.
This was tested with samples/shell on Arduino 101, and on QEMU
(Cortex-M3 and x86).
Origin: original code
Change-Id: Ib4593d8ccd711f4e97d388c7293205d213be1aec
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
That implementation is not galileo-specific, but rather a generic way of
rebooting an x86 target. Needs SoC support.
Change-Id: I9c3374a8ab57a624d9d9b7090260c5b11fe4e773
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
CC2520 can handle up to 8Mhz SPI SCLK frequency, thus let's use it. It
will help to avoid timing issuse while transmitting and receiving (i.e.:
getting registers or buffers from CC2520 through SPI will be fast and
won't impede RX/TX events too much).
Change-Id: I3391993e25ffbe166028923b9afb777a8451a35e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Base address registers and IRQs are set in Kconfig.
Set proper SPI default to various quark_se_ss based boards.
Change-Id: Iadaae551f441457bef334f94f68cafa7c3e499d0
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Quark SE development board provides an ARC core and thus requires a
board definition so developpers can flash this core as well.
Change-Id: I3612e3b0c4d7085af4fcf3fa1f6233849a05c8b4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This board is not supported and not available for general public.
Use the Quark SE CRB/Devboard instead.
Change-Id: Id0f8c08bbacb812ef00fe9502b4acecf4f31ffd7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There can only be one instance of an ADC, but we have code setup for
multiple.
Change-Id: I94eae2450bdc6b138ebad66f80a7c451cefe32a9
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
The radio driver was using DW spi and gpio drivers hardcoded.
Now it will check if SPI_DW or SPI_QMSI is set.
Change-Id: I4e12ef7c071058218c1cc714c62fed90a9f5eb06
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Using level will just flood the handler, as the concerned gpio pins
stays on level for some time.
Change-Id: I991d818783170b09c326350c04bb588c7324892c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fixing the flash script so that we only have one for the process of writing
out the ROM and the OS images.
Change-Id: I6fc8bd8eee553a17c0036da3ce5b89510f3b57d8
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
- Use interface script from openocd distribution
- add debug support
Change-Id: If7e0ab0ad1fc6e67ca648a0a7c32356b3db90cf0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
First pass at a script/process that an end user can run to backup and restore
the binary state of an Arduino 101 system.
Change-Id: I5979bdea5aaa2a77b0e0bb0e44de65ba74cbfd65
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
As the UART uses I/O port access, it needs to be pointed out
to override default MMIO setting.
Change-Id: Ibf923b5cab547f9eec991900c5f7a8b2ffbc3832
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Add tester support for arduino_101 board reusing UART1.
Change-Id: Ifc00f92a80accffc37fd9b09df798ff995340a1c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Using the latest SDK (0.7.2) you can flash directly using make
by specifying the board, for example
make BOARD=arduino_101 flash
This will build and flash the generated binary to the board.
Change-Id: I90254abd69874efbb449ef318079958980c23074
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds the pinmux driver for use with Arduino Due.
The default for pinmux (mostly) reflects the pin layout
on the board.
Change-Id: I80827ee8bc507567e0cc04b3c8c48580aadf2b3f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move BLE configuration to board and enable GPIO for NBLE.
Change-Id: I99c309656430936edf6766fc99fe83b011801bb4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Set options and baud rate to communicate with NBLE chip.
Change-Id: I338aad3b1dc03b809aade29eedac7093ea346a5e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
SPI needs to get its interrupt configured as triggering on level high to
work properly. This is specific to Quark SE (thus x86 core).
Change-Id: If3921240709e0fbf5b26e2325f67eb977a9fac10
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
These are the default ones for the internal CC2520 chip found on the
Quark SE SS devboard. GPIO 11 is used to emulate CS.
Change-Id: Ibc564176f1f77edeb7f25df3567de8c334703795
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SPI, to control the CC2520 chip, is the only generic feature and thus
the only one configurable through Kconfig. GPIO on the other end depends
a lot on the SoC/Board. Adding a slave select option as well.
Change-Id: I63068fab476ed8d5b26103e4ad20e5be253c9932
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Support for running cc2520 radio found on Quark SE devboard.
Change-Id: Ib0781489e3ebae8569a13c35d3fe6a6d87ac9a3b
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds very basic support for running on Arduino Due.
Only the nanokernel hello_world has been tested.
Change-Id: I42b83d7f23ff88f709d2d6f2d43c6d29c82b9d32
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Ben Walsh identified a few functions can be removed as they provide
duplicate code except for one small variant (register number). Making
a common function that takes the register position as an input, it is
possible to remove an entire function, saving on code space.
Change-Id: I1850f461ed6d85f42aaf85745e1c2557850cdbad
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
It's basically the same pinmuxer as in CTB with different external
sensors wired to it.
Change-Id: Icea89a72b805d6dd2c5798c3f517c4fb00c819c9
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The production version is slightly different than the internal
development board, so the pin mux description has been updated.
Change-Id: I0235ed9eb480a1fd713843dd1b3b5c7856e7132b
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Shorten the name and remove the vendor prefix. No need to add
vendor to board names.
Change-Id: I68d441121c4034276706da63d7e5420ddf317149
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Both WIFI_DISABLE_N & PCIE_RESET_N are output pins which control the
mini-PCIe, so fix the pinmux settings accordingly.
In addition, to avoid resetting the mini-PCIe card, keep PCIE_RESET_N
high.
Change-Id: I7478a7ee5771d8840c53ec4e9cc15551d31653e3
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Static function was declared after it was used.
Change-Id: I7872d9aedef34d0e1e68e6475bea8afcd0496f69
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This is a generic Atom configuration that can be inherited by boards
with Atom SoC like the minnowboard.
Change-Id: I06ab999062be7811d14755fd34440dee8f8b81ed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
No need for the same SoC configuration with different names. Use IA32
as the "SoC" for qemu_x86 "boards".
Change-Id: Iee00538701c5ece14d0c3df637b0aaa54790f0e2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use a real board name that can run this kernel instead of a generic
name. Basic functionality exits on this board with Zephyr.
Setup of the board is mostly similar to what we have in galileo (EFI
based)
Change-Id: Ic8554f26dcac0dbbbb6d35d863482f6207dc63c5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Previous it was renamed in favor of Qemu, now that we have board support
we move this to the original name and derive a qemu board out of the
platform.
Change-Id: Ia8769b27defa0a39503ecf2e6ec7fc6304b6ff49
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit also renames boards and makes naming consistent between
board name and defconfig files.
quark_d2000_reference -> quark_d2000_crb
quark_se_test_sss -> quark_se_sss_ctb
quark_se_test -> quark_se_ctb
Change-Id: Ibe6a5102edb987fe1d6ce32c8c392a87d45d6951
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We had one pinmux per platform with support for multiple boards.
This moves pinmuxing to boards as first step. Common functions that
are exposed by the API need to be moved to driver while keeping the
muxing configuration with the boards.
Change-Id: I2b4fabf663db98d644abcb5d51ba83adc6f74541
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Galileo pinmux configuration and reboot code belong into
the board and not the SoC.
Change-Id: If862178569438a8901902088bd085275416c25ef
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Define boards based on platforms/SoCs and define them under boards/.
Also unify the naming of all platform, SoC and board files and use
platform.h for platforms and board.h for boards.
Change-Id: Icfeb96479ab5800aca98c80a79bdc3cecd645314
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Galileo board is based on the X1000 SoC, so move galileo to
boards and create this SoC instead, inheriting all SoC related code
and configuration items.
Change-Id: I9b39f1b44644775ee48acae284b82bae7876fffb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
First step for adding the new board layer. Create configurations for the
various boards we support on x86 under boards with the new Kconfig variables
defining them.
The board selection is optional, that means you will be able to run
make menuconfig
and create your own .config and select any SoC.
Change-Id: If08e88e9675d13f0f0501ef6750b9424b15f5dc8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>