boards: nucleo_f401re: add new board
Add configuration for Nucleo-64 F410RE board. Change-Id: I88b06d87f0fc62b941241cc2f374b8541de86e00 Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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11 changed files with 189 additions and 1 deletions
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@ -120,6 +120,12 @@ M: Carles Cufi <carles.cufi@nordicsemi.no>
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S: Supported
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F: boards/arm/nrf52_pca10040/
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BOARDS/ARM - NUCLEO-64 F401RE Devboard
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M: Amit Kucheria <amit.kucheria@linaro.org>
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M: Ricardo Salveti <ricardo.salveti@linaro.org>
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S: Supported
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F: boards/arm/nucleo_f401re/
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BOARDS/NIOS2 - ALTERA MAX10
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M: Andrew Boie <andrew.p.boie@intel.com>
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S: Supported
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20
boards/arm/nucleo_f401re/Kconfig.board
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boards/arm/nucleo_f401re/Kconfig.board
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# Kconfig - NUCLEO-64 F401RE board configuration
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#
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# Copyright (c) 2016 Linaro Limited.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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config BOARD_NUCLEO_F401RE
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bool "NUCLEO-64 F401RE Development Board"
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depends on SOC_STM32F401RE
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23
boards/arm/nucleo_f401re/Kconfig.defconfig
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boards/arm/nucleo_f401re/Kconfig.defconfig
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# Kconfig - NUCLEO-64 F401RE board configuration
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#
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# Copyright (c) 2016 Linaro Limited.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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if BOARD_NUCLEO_F401RE
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config BOARD
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default nucleo_f401re
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endif # BOARD_NUCLEO_F401RE
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2
boards/arm/nucleo_f401re/Makefile
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2
boards/arm/nucleo_f401re/Makefile
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@ -0,0 +1,2 @@
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# No C files (yet)
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obj- += dummy.o
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6
boards/arm/nucleo_f401re/Makefile.board
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6
boards/arm/nucleo_f401re/Makefile.board
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FLASH_SCRIPT = openocd.sh
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OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
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OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
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export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD
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22
boards/arm/nucleo_f401re/board.h
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boards/arm/nucleo_f401re/board.h
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/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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#endif /* __INC_BOARD_H */
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48
boards/arm/nucleo_f401re/nucleo_f401re_defconfig
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48
boards/arm/nucleo_f401re/nucleo_f401re_defconfig
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CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F401RE=y
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F401RE=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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# enable pinmux
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# enable GPIO ports A, B, C
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTA=y
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CONFIG_GPIO_STM32_PORTB=y
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CONFIG_GPIO_STM32_PORTC=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL_STM32F4X=y
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CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32F4X_PLL_SRC_HSE=y
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# however, the board does not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32F4X_HSE_BYPASS=y
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# produce 84MHz clock at PLL output
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CONFIG_CLOCK_STM32F4X_PLLM_DIV_FACTOR=8
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CONFIG_CLOCK_STM32F4X_PLLN_MULTIPLIER=336
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CONFIG_CLOCK_STM32F4X_PLLP_DIV_FACTOR=4
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CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR=7
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CONFIG_CLOCK_STM32F4X_AHB_PRESCALER=0
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CONFIG_CLOCK_STM32F4X_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0
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12
boards/arm/nucleo_f401re/support/openocd.cfg
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12
boards/arm/nucleo_f401re/support/openocd.cfg
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source [find board/st_nucleo_f4.cfg]
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$_TARGETNAME configure -event gdb-attach {
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echo "Debugger attaching: halting execution"
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reset halt
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gdb_breakpoint_override hard
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}
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$_TARGETNAME configure -event gdb-detach {
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echo "Debugger detaching: resuming execution"
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resume
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}
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@ -6,6 +6,7 @@ obj-$(CONFIG_BOARD_FRDM_K64F) += k64/pinmux_board_frdm_k64f.o
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obj-$(CONFIG_BOARD_HEXIWEAR_K64) += k64/pinmux_board_hexiwear.o
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obj-$(CONFIG_PINMUX_STM32) += stm32/pinmux_stm32.o
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obj-$(CONFIG_BOARD_NUCLEO_F103RB) += stm32/pinmux_board_nucleo_f103rb.o
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obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
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obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o
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obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o
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48
drivers/pinmux/stm32/pinmux_board_nucleo_f401re.c
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48
drivers/pinmux/stm32/pinmux_board_nucleo_f401re.c
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/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <nanokernel.h>
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#include <device.h>
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#include <init.h>
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#include <pinmux.h>
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#include <sys_io.h>
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#include "pinmux/pinmux.h"
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#include "pinmux_stm32.h"
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/* pin assignments for NUCLEO-F401RE board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_0
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{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
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{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRIMARY,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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@ -2,7 +2,7 @@
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name = arm
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platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
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olimexino_stm32 96b_nitrogen nrf52_pca10040 hexiwear_k64
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nrf51_pca10028 arduino_101_ble
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nrf51_pca10028 arduino_101_ble nucleo_f401re
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supported_toolchains = zephyr gccarmemb
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[qemu_cortex_m3]
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