arch: xtensa: Convert Xtensa port to use gen_isr_table

The Xtensa port was the only one remaining to be converted to the new
way of connecting interrupts in Zephyr.  Some things are still
unconverted, mainly the exception table, and this will be performed
another time.

Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since
IRQs can't change priority on Xtensa: while the architecture has the
concept of interrupt priority levels, each line has a fixed level and
can't be changed.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This commit is contained in:
Leandro Pereira 2017-07-07 10:35:18 -07:00 committed by Andrew Boie
commit 27ea2d8eb7
28 changed files with 128 additions and 76 deletions

View file

@ -4,6 +4,8 @@ OUTPUT_OBJ := isr_tables.o
ifeq ($(ARCH),riscv32)
OUTPUT_FORMAT := elf32-littleriscv
else ifeq ($(ARCH),xtensa)
OUTPUT_FORMAT := elf32-xtensa-le
else
OUTPUT_FORMAT := elf32-little$(ARCH)
endif

View file

@ -13,5 +13,3 @@ obj-y = ${obj-atomic} cpu_idle.o fatal.o \
xtensa_intr.o xtensa_vectors.o irq_manage.o
obj-$(CONFIG_XTENSA_USE_CORE_CRT1) += crt1.o
obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
# Keep this last so that vague linking works
obj-y += sw_isr_table.o

View file

@ -1,59 +0,0 @@
/*
* Copyright (c) 2016 Cadence Design Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ISR table for static ISR declarations for XTENSA
*
* Software ISR table for XTENSA
*/
#include <toolchain.h>
#include <linker/sections.h>
#include <arch/cpu.h>
#include <xtensa/config/core.h>
/*
* Xtensa assembly code uses xt_unhandled_interrupt for default IRQ handler.
*/
#define _irq_spurious xt_unhandled_interrupt
/*
* enable preprocessor features, such
* as %expr - evaluate the expression and use it as a string
*/
.altmacro
/*
* Define an ISR table entry
* Define symbol as weak and give the section .gnu.linkonce.d
* prefix. This allows linker overload the symbol and the
* whole section by the one defined by a device driver
*/
.macro _isr_table_entry_declare index
WDATA(_isr_irq\index)
.section .gnu.linkonce.d.isr_irq\index
_isr_irq\index: .word 0xABAD1DEA, _irq_spurious
.endm
/*
* Declare the ISR table
*/
.macro _isr_table_declare from, to
counter = \from
.rept (\to - \from)
_isr_table_entry_declare %counter
counter = counter + 1
.endr
.endm
GTEXT(_irq_spurious)
GDATA(_sw_isr_table)
.section .isr_irq0
.align
_sw_isr_table:
_isr_table_declare 0 XCHAL_NUM_INTERRUPTS

View file

@ -14,6 +14,7 @@
#include "xtensa_rtos.h"
#include "xtensa_api.h"
#include <kernel_structs.h>
#include <sw_isr_table.h>
#if XCHAL_HAVE_EXCEPTIONS
@ -21,7 +22,6 @@
extern xt_exc_handler _xt_exception_table[XCHAL_EXCCAUSE_NUM];
/*
* Default handler for unhandled exceptions.
*/
@ -57,13 +57,10 @@ xt_exc_handler _xt_set_exception_handler(int n, xt_exc_handler f)
#endif
#if XCHAL_HAVE_INTERRUPTS
/*
* Default handler for unhandled interrupts.
*/
void xt_unhandled_interrupt(void *arg)
#if defined(CONFIG_SW_ISR_TABLE) && defined(XCHAL_HAVE_INTERRUPTS)
void _irq_spurious(void *arg)
{
ReservedInterruptHandler((unsigned int)arg);
CODE_UNREACHABLE;
}
#endif /* XCHAL_HAVE_INTERRUPTS */
#endif

View file

@ -49,6 +49,9 @@ MEMORY
srom0_seg : org = 0x50000000, len = 0x300
srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -604,4 +607,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -49,6 +49,9 @@ MEMORY
sram17_seg : org = 0x60000378, len = 0x48
sram18_seg : org = 0x600003C0, len = 0x40
sram19_seg : org = 0x60000400, len = 0x3FFFC00
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -610,4 +613,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -46,6 +46,9 @@ MEMORY
sram20_seg : org = 0x00002500, len = 0x3FFDB00
srom0_seg : org = 0xFE000000, len = 0x300
srom1_seg : org = 0xFE000300, len = 0xFFFD00
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -511,4 +514,8 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -49,6 +49,9 @@ MEMORY
sram17_seg : org = 0x60000278, len = 0x4
sram18_seg : org = 0x6000027C, len = 0x1C
sram19_seg : org = 0x60000298, len = 0x3FFFD68
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -614,4 +617,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -34,6 +34,9 @@ MEMORY
srom0_seg : org = 0x50000000, len = 0x300
srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -443,4 +446,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -37,6 +37,9 @@ MEMORY
drom0_0_seg(R): org = 0x3F400010, len = 0x800000
rtc_iram_seg(RWX): org = 0x400C0000, len = 0x2000
rtc_slow_seg(RW): org = 0x50000000, len = 0x1000
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST(RW): org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -219,4 +222,8 @@ SECTIONS
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
} GROUP_LINK_IN(RAMABLE_REGION)
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -49,6 +49,9 @@ MEMORY
sram17_seg : org = 0x60000378, len = 0x48
sram18_seg : org = 0x600003C0, len = 0x40
sram19_seg : org = 0x60000400, len = 0x3FFFC00
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -614,4 +617,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -36,6 +36,9 @@ MEMORY
sram7_seg : org = 0x600001D8, len = 0x4
sram8_seg : org = 0x600001DC, len = 0x1C
sram9_seg : org = 0x600001F8, len = 0x3FFFE08
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -390,4 +393,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -36,6 +36,9 @@ MEMORY
sram7_seg : org = 0x600001D8, len = 0x4
sram8_seg : org = 0x600001DC, len = 0x1C
sram9_seg : org = 0x600001F8, len = 0x3FFFE08
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -390,4 +393,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -40,6 +40,9 @@ MEMORY
sram11_seg : org = 0x600002B8, len = 0x48
sram12_seg : org = 0x60000300, len = 0x40
sram13_seg : org = 0x60000340, len = 0x3FFCC0
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -437,4 +440,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -33,6 +33,9 @@ MEMORY
iram0_5_seg : org = 0x60020320, len = 0x4
iram0_6_seg : org = 0x60020324, len = 0x1C
iram0_7_seg : org = 0x60020340, len = 0x1FCC0
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -362,4 +365,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -33,6 +33,9 @@ MEMORY
iram0_5_seg : org = 0x60020320, len = 0x4
iram0_6_seg : org = 0x60020324, len = 0x1C
iram0_7_seg : org = 0x60020340, len = 0x1FCC0
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -362,4 +365,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -49,6 +49,9 @@ MEMORY
srom0_seg : org = 0x50000000, len = 0x300
srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000
#endif
}
PHDRS
@ -604,4 +607,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}

View file

@ -24,3 +24,7 @@ CONFIG_GPIO=y
CONFIG_GPIO_ESP32=y
CONFIG_RANDOM_ESP32_RNG=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -6,3 +6,7 @@ CONFIG_CONSOLE=y
CONFIG_SOC_XTENSA_SAMPLE_CONTROLLER=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
CONFIG_TOOLCHAIN_VARIANT=""
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_D_108mini=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_D_212GP=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_D_233L=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_XRC_FUSION_AON_ALL_LM=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_XTENSA_SAMPLE_CONTROLLER=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_HIFI2_STD=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -4,3 +4,7 @@ CONFIG_XTENSA=y
CONFIG_SOC_HIFI3_BD5=y
CONFIG_BOARD_XT_SIM=y
CONFIG_CONSOLE=y
CONFIG_SW_ISR_TABLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n

View file

@ -114,17 +114,12 @@ extern void _irq_priority_set(u32_t irq, u32_t prio, u32_t flags);
*/
#define _ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
enum { IRQ = irq_p }; \
static struct _isr_table_entry \
_CONCAT(_isr_irq, irq_p) \
__attribute__ ((used)) \
__attribute__ ((section(\
STRINGIFY(_CONCAT(.gnu.linkonce.d.isr_irq, irq_p)))\
)) = {isr_param_p, isr_p}; \
_irq_priority_set(irq_p, priority_p, flags_p); \
_ISR_DECLARE(irq_p, flags_p, isr_p, isr_param_p); \
irq_p; \
})
/* Spurious interrupt handler. Throws an error if called */
extern void _irq_spurious(void *unused);
FUNC_NORETURN void _SysFatalErrorHandler(unsigned int reason,
const NANO_ESF *esf);

View file

@ -9,6 +9,9 @@
#include <xtensa_api.h>
#include <xtensa/xtruntime.h>
#define CONFIG_NUM_IRQS XCHAL_NUM_INTERRUPTS
#define CONFIG_GEN_IRQ_START_VECTOR 0
/**
*
* @brief Enable an interrupt line