nucleo_l476rg: add board support
Add board support for the Nucleo64 L476RG development board. Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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8 changed files with 179 additions and 1 deletions
21
boards/arm/nucleo_l476rg/Kconfig.board
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21
boards/arm/nucleo_l476rg/Kconfig.board
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# Kconfig - STM32L476RG Nucleo board configuration
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#
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2016 BayLibre, SAS
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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config BOARD_NUCLEO_L476RG
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bool "Nucleo L476RG Development Board"
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depends on SOC_STM32L476XX
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boards/arm/nucleo_l476rg/Kconfig.defconfig
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boards/arm/nucleo_l476rg/Kconfig.defconfig
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# Kconfig - STM32L476RG Nucleo board configuration
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#
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2016 BayLibre, SAS
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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if BOARD_NUCLEO_L476RG
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config BOARD
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default nucleo_l476rg
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endif # BOARD_NUCLEO_L476RG
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2
boards/arm/nucleo_l476rg/Makefile
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boards/arm/nucleo_l476rg/Makefile
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# No C files (yet)
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obj- += dummy.o
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22
boards/arm/nucleo_l476rg/board.h
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boards/arm/nucleo_l476rg/board.h
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/*
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* Copyright (c) 2015 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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#endif /* __INC_BOARD_H */
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51
boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig
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boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig
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CONFIG_ARM=y
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CONFIG_BOARD_STM32_NUCLEO_L476RG=y
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L476XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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CONFIG_UART_STM32_PORT_2=y
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CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
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# enable pinmux
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# enable GPIOs
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTA=y
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CONFIG_GPIO_STM32_PORTB=y
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CONFIG_GPIO_STM32_PORTC=y
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CONFIG_GPIO_STM32_PORTD=y
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CONFIG_GPIO_STM32_PORTE=y
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CONFIG_GPIO_STM32_PORTF=y
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CONFIG_GPIO_STM32_PORTG=y
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CONFIG_GPIO_STM32_PORTH=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL_STM32L4X=y
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CONFIG_CLOCK_STM32L4X_SYSCLK_SRC_PLL=y
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# use 16MHz oscillator
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CONFIG_CLOCK_STM32F10X_PLL_SRC_HSI=y
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# produce 80MHz clock at PLL output
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CONFIG_CLOCK_STM32L4X_PLL_DIVISOR=1
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CONFIG_CLOCK_STM32L4X_PLL_MULTIPLIER=20
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CONFIG_CLOCK_STM32L4X_PLL_P_DIVISOR=7
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CONFIG_CLOCK_STM32L4X_PLL_Q_DIVISOR=2
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CONFIG_CLOCK_STM32L4X_PLL_R_DIVISOR=4
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CONFIG_CLOCK_STM32L4X_AHB_PRESCALER=0
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CONFIG_CLOCK_STM32L4X_APB1_PRESCALER=0
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CONFIG_CLOCK_STM32L4X_APB2_PRESCALER=0
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
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@ -9,6 +9,7 @@ obj-$(CONFIG_PINMUX_BEETLE) += beetle/pinmux_board_v2m_beetle.o
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obj-$(CONFIG_BOARD_NUCLEO_F103RB) += stm32/pinmux_board_nucleo_f103rb.o
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obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
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obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o
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obj-$(CONFIG_BOARD_NUCLEO_L476RG) += stm32/pinmux_board_nucleo_l476rg.o
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obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o
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obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o
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57
drivers/pinmux/stm32/pinmux_board_nucleo_l476rg.c
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drivers/pinmux/stm32/pinmux_board_nucleo_l476rg.c
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/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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* Copyright (c) 2016 BayLibre, SAS
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <nanokernel.h>
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#include <device.h>
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#include <init.h>
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#include <pinmux.h>
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#include <sys_io.h>
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#include "pinmux/pinmux.h"
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#include "pinmux_stm32.h"
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/* pin assignments for NUCLEO-L476RG board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX},
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{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#ifdef CONFIG_UART_STM32_PORT_3
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{STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_USART3_TX},
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{STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_USART3_RX},
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#endif /* CONFIG_UART_STM32_PORT_3 */
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#ifdef CONFIG_I2C_0
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{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL},
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{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
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#endif /* CONFIG_I2C_0 */
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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@ -4,7 +4,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
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olimexino_stm32 96b_nitrogen nrf52_pca10040 hexiwear_k64
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nrf51_pca10028 nucleo_f401re 96b_carbon nrf51_blenano
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arduino_101_ble cc3200_launchxl quark_se_c1000_ble bbc_microbit
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v2m_beetle
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v2m_beetle nucleo_l476rg
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supported_toolchains = zephyr gccarmemb
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[qemu_cortex_m3]
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