driver: i2c: stm32lx: align numbering scheme on data sheet

On stm32 family, IP instance numbering starts from 1.
Update i2c driver to this scheme to minimize user
confusion

Change-Id: I967d5975bbbad59cd8a3a7b6dfc665955d09cc9f
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-03-31 13:01:03 +02:00 committed by Kumar Gala
commit 40286ec697
3 changed files with 22 additions and 22 deletions

View file

@ -143,8 +143,8 @@ Default Zephyr Peripheral Mapping:
- UART_2_RX : PA3
- UART_3_TX : PB10
- UART_3_RX : PB11
- I2C_0_SCL : PB6
- I2C_0_SDA : PB7
- I2C_1_SCL : PB6
- I2C_1_SDA : PB7
- PWM_2_CH1 : PA0
- USER_PB : PC13
- LD2 : PA5

View file

@ -432,46 +432,46 @@ static int i2c_stm32lx_init(struct device *dev)
return 0;
}
#ifdef CONFIG_I2C_0
#ifdef CONFIG_I2C_1
#ifdef CONFIG_I2C_STM32LX_INTERRUPT
static void i2c_stm32lx_irq_config_func_0(struct device *port);
static void i2c_stm32lx_irq_config_func_1(struct device *port);
#endif
static const struct i2c_stm32lx_config i2c_stm32lx_cfg_0 = {
static const struct i2c_stm32lx_config i2c_stm32lx_cfg_1 = {
.base = (uint8_t *)I2C1_BASE,
.pclken = { .bus = STM32_CLOCK_BUS_APB1,
.enr = LL_APB1_GRP1_PERIPH_I2C1 },
#ifdef CONFIG_I2C_STM32LX_INTERRUPT
.irq_config_func = i2c_stm32lx_irq_config_func_0,
.irq_config_func = i2c_stm32lx_irq_config_func_1,
#endif
};
static struct i2c_stm32lx_data i2c_stm32lx_dev_data_0 = {
.dev_config.raw = CONFIG_I2C_0_DEFAULT_CFG,
static struct i2c_stm32lx_data i2c_stm32lx_dev_data_1 = {
.dev_config.raw = CONFIG_I2C_1_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_stm32lx_0, CONFIG_I2C_0_NAME, &i2c_stm32lx_init,
&i2c_stm32lx_dev_data_0, &i2c_stm32lx_cfg_0,
DEVICE_AND_API_INIT(i2c_stm32lx_1, CONFIG_I2C_1_NAME, &i2c_stm32lx_init,
&i2c_stm32lx_dev_data_1, &i2c_stm32lx_cfg_1,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&api_funcs);
#ifdef CONFIG_I2C_STM32LX_INTERRUPT
static void i2c_stm32lx_irq_config_func_0(struct device *dev)
static void i2c_stm32lx_irq_config_func_1(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32L4X
#define PORT_0_EV_IRQ STM32L4_IRQ_I2C1_EV
#define PORT_0_ER_IRQ STM32L4_IRQ_I2C1_ER
#define PORT_1_EV_IRQ STM32L4_IRQ_I2C1_EV
#define PORT_1_ER_IRQ STM32L4_IRQ_I2C1_ER
#endif
IRQ_CONNECT(PORT_0_EV_IRQ, CONFIG_I2C_0_IRQ_PRI,
i2c_stm32lx_ev_isr, DEVICE_GET(i2c_stm32lx_0), 0);
irq_enable(PORT_0_EV_IRQ);
IRQ_CONNECT(PORT_1_EV_IRQ, CONFIG_I2C_1_IRQ_PRI,
i2c_stm32lx_ev_isr, DEVICE_GET(i2c_stm32lx_1), 0);
irq_enable(PORT_1_EV_IRQ);
IRQ_CONNECT(PORT_0_ER_IRQ, CONFIG_I2C_0_IRQ_PRI,
i2c_stm32lx_er_isr, DEVICE_GET(i2c_stm32lx_0), 0);
irq_enable(PORT_0_ER_IRQ);
IRQ_CONNECT(PORT_1_ER_IRQ, CONFIG_I2C_1_IRQ_PRI,
i2c_stm32lx_er_isr, DEVICE_GET(i2c_stm32lx_1), 0);
irq_enable(PORT_1_ER_IRQ);
}
#endif
#endif /* CONFIG_I2C_0 */
#endif /* CONFIG_I2C_1 */

View file

@ -28,10 +28,10 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_USART3_RX},
#endif /* CONFIG_UART_STM32_PORT_3 */
#ifdef CONFIG_I2C_0
#ifdef CONFIG_I2C_1
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif /* CONFIG_I2C_0 */
#endif /* CONFIG_I2C_1 */
#ifdef CONFIG_PWM_STM32_2
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif /* CONFIG_PWM_STM32_2 */