boards: arm: Add board for MPS2 with AN383
ARM's Cortex-M Prototyping System (MPS2) is a board with an FPGA that can be programmed with different 'SoCs'. To use these in Zephyr we need a set of board files for each variant. This adds a board for a variant which implements a Cortex-M3 CPU; the naming of this matches that used for the Zephyr SoC (which is itself based on ARM's documentation nomenclature). Change-Id: Ie02a67a03016b8aeee31e3694f0edbcc37f9ee64 Signed-off-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
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9 changed files with 278 additions and 1 deletions
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@ -318,6 +318,7 @@ M: Jon Medhurst (Tixy) <tixy@linaro.org>
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M: Vincenzo Frascino <vincenzo.frascino@linaro.org>
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S: Supported
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F: arch/arm/soc/arm/mps2/
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F: boards/arm/mps2/
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NETWORKING
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M: Jukka Rissanen <jukka.rissanen@linux.intel.com>
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9
boards/arm/mps2_an385/Kconfig.board
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boards/arm/mps2_an385/Kconfig.board
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#
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# Copyright (c) 2017 Linaro Limited
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_MPS2_AN385
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bool "ARM Cortex-M3 SMM on V2M-MPS2 (Application Note AN385)"
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depends on SOC_MPS2_AN385
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39
boards/arm/mps2_an385/Kconfig.defconfig
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boards/arm/mps2_an385/Kconfig.defconfig
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#
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# Copyright (c) 2017 Linaro Limited
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_MPS2_AN385
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config BOARD
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default mps2_an385
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if SERIAL
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config UART_CMSDK_APB
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def_bool y
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config UART_INTERRUPT_DRIVEN
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def_bool y
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config UART_CMSDK_APB_PORT0
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def_bool y
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config UART_CMSDK_APB_PORT1
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def_bool y
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config UART_CMSDK_APB_PORT2
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def_bool y
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config UART_CMSDK_APB_PORT3
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def_bool y
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config UART_CMSDK_APB_PORT4
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def_bool y
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endif # SERIAL
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endif
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boards/arm/mps2_an385/Makefile
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boards/arm/mps2_an385/Makefile
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#
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# Copyright (c) 2016 Linaro Limited
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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# Force build system to create built-in.o even though we do not (yet)
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# have any C files to compile
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obj- += dummy.o
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12
boards/arm/mps2_an385/board.h
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boards/arm/mps2_an385/board.h
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/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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#endif /* __INC_BOARD_H */
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BIN
boards/arm/mps2_an385/doc/img/mps2.png
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BIN
boards/arm/mps2_an385/doc/img/mps2.png
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Binary file not shown.
After Width: | Height: | Size: 754 KiB |
188
boards/arm/mps2_an385/doc/mps2_an385.rst
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boards/arm/mps2_an385/doc/mps2_an385.rst
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.. _mps2_an385_board:
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ARM V2M MPS2
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############
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Overview
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********
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The mps2_an385 board configuration is used by Zephyr applications that run on
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the V2M MPS2 board. It provides support for the ARM Cortex-M3 (AN385) CPU and
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the following devices:
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- Nested Vectored Interrupt Controller (NVIC)
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- System Tick System Clock (SYSTICK)
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- Cortex-M System Design Kit UART
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.. image:: img/mps2.png
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:width: 442px
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:align: center
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:height: 335px
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:alt: ARM V2M MPS2
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More information about the board can be found at the `V2M MPS2 Website`_.
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The Application Note AN385 can be found at `Application Note AN385`_.
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Hardware
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********
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ARM V2M MPS2 provides the following hardware components:
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- ARM Cortex-M3 (AN385)
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- ARM IoT Subsystem for Cortex-M
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- Form factor: 140x120cm
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- SRAM: 8MB single cycle SRAM, 16MB PSRAM
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- Video: QSVGA touch screen panel, 4bit RGB VGA connector
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- Audio: Audio Codec
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- Debug:
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- ARM JTAG20 connector
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- ARM parallel trace connector (MICTOR38)
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- 20 pin Cortex debug connector
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- 10 pin Cortex debug connector
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- ILA connector for FPGA debug
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- Expansion
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- GPIO
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- SPI
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Supported Features
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==================
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The mps2_an385 board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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Other hardware features are not currently supported by the port.
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See the `V2M MPS2 Website`_ for a complete list of V2M MPS2 board hardware
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features.
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The default configuration can be found in the defconfig file:
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.. code-block:: console
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boards/arm/mps2_an385/mps2_an385_defconfig
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Interrupt Controller
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====================
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MPS2 is a Cortex-M3 based SoC and has 15 fixed exceptions and 45 IRQs.
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A Cortex-M3/4-based board uses vectored exceptions. This means each exception
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calls a handler directly from the vector table.
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Handlers are provided for exceptions 1-6, 11-12, and 14-15. The table here
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identifies the handlers used for each exception.
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+------+------------+----------------+--------------------------+
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| Exc# | Name | Remarks | Used by Zephyr Kernel |
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+======+============+================+==========================+
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| 1 | Reset | | system initialization |
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+------+------------+----------------+--------------------------+
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| 2 | NMI | | system fatal error |
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+------+------------+----------------+--------------------------+
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| 3 | Hard fault | | system fatal error |
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+------+------------+----------------+--------------------------+
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| 4 | MemManage | MPU fault | system fatal error |
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+------+------------+----------------+--------------------------+
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| 5 | Bus | | system fatal error |
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+------+------------+----------------+--------------------------+
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| 6 | Usage | undefined | system fatal error |
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| | fault | instruction, | |
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| | | or switch | |
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| | | attempt to ARM | |
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| | | mode | |
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+------+------------+----------------+--------------------------+
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| 11 | SVC | | context switch and |
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| | | | software interrupts |
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+------+------------+----------------+--------------------------+
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| 12 | Debug | | system fatal error |
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| | monitor | | |
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+------+------------+----------------+--------------------------+
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| 14 | PendSV | | context switch |
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+------+------------+----------------+--------------------------+
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| 15 | SYSTICK | | system clock |
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+------+------------+----------------+--------------------------+
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Pin Mapping
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===========
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The ARM V2M MPS2 Board has 4 GPIO controllers. These controllers are responsible
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for pin muxing, input/output, pull-up, etc.
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For mode details please refer to `MPS2 Technical Reference Manual (TRM)`_.
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System Clock
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============
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The V2M MPS2 main clock is 24 MHz.
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Serial Port
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===========
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The V2M MPS2 processor has five UARTs. Both the UARTs have only two wires for
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RX/TX and no flow control (CTS/RTS) or FIFO. The Zephyr console output, by
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default, is utilizing UART0.
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Programming and Debugging
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*************************
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Flashing
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========
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V2M MPS2 provides:
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- A USB connection to the host computer, which exposes a Mass Storage and an
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USB Serial Port.
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- A Serial Flash device, which implements the USB flash disk file storage.
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- A physical UART connection which is relayed over interface USB Serial port.
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Flashing an application to V2M MPS2
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-----------------------------------
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The sample application hello_world is being used in this tutorial:
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.. code-block:: console
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$ZEPHYR_BASE/samples/hello_world
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To build the Zephyr kernel and application, enter:
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.. code-block:: console
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$ cd $ZEPHYR_BASE
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$ . zephyr-env.sh
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$ cd $ZEPHYR_BASE/samples/hello_world/
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$ make BOARD=mps2_an385
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Connect the V2M MPS2 to your host computer using the USB port and you should
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see a USB connection which exposes a Mass Storage and a USB Serial Port.
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Copy the generated zephyr.bin in the exposed drive.
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Reset the board and you should be able to see on the corresponding Serial Port
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the following message:
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.. code-block:: console
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Hello World! arm
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.. _V2M MPS2 Website:
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https://developer.mbed.org/platforms/ARM-MPS2/
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.. _MPS2 Technical Reference Manual (TRM):
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http://infocenter.arm.com/help/topic/com.arm.doc.100112_0200_05_en/versatile_express_cortex_m_prototyping_systems_v2m_mps2_and_v2m_mps2plus_technical_reference_100112_0200_05_en.pdf
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.. _Application Note AN385:
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http://infocenter.arm.com/help/topic/com.arm.doc.dai0385c/DAI0385C_cortex_m3_on_v2m_mps2.pdf
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19
boards/arm/mps2_an385/mps2_an385_defconfig
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boards/arm/mps2_an385/mps2_an385_defconfig
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#
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# Copyright (c) 2017 Linaro Limited
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_ARM=y
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CONFIG_SOC_FAMILY_ARM=y
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CONFIG_SOC_SERIES_MPS2=y
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CONFIG_SOC_MPS2_AN385=y
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CONFIG_BOARD_MPS2_AN385=y
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CONFIG_CORTEX_M_SYSTICK=y
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# Serial
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_UART_CMSDK_APB=y
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CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE=38400
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@ -5,7 +5,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
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nrf51_pca10028 nucleo_f401re 96b_carbon nrf51_blenano
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arduino_101_ble cc3200_launchxl quark_se_c1000_ble bbc_microbit
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v2m_beetle nucleo_l476rg nrf52840_pca10056 nucleo_f411re
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stm3210c_eval nucleo_f334r8 stm32373c_eval
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stm3210c_eval nucleo_f334r8 stm32373c_eval mps2_an385
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supported_toolchains = zephyr gccarmemb
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[qemu_cortex_m3]
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