boards: add initial support for Nucleo-64 with Soc STM32F334
Change-Id: I0b9992e26353cea3b0415aa57ab3b983d84cef05 Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
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8 changed files with 153 additions and 1 deletions
20
boards/arm/nucleo_f334r8/Kconfig.board
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boards/arm/nucleo_f334r8/Kconfig.board
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# Kconfig - STM32 Nucleo-64 development board with STM32F334R8 MCU configuration
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#
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# Copyright (c) 2016 RnDity Sp. z o.o.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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config BOARD_NUCLEO_F334R8
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bool "NUCLEO-64 F334R8 Development Board"
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depends on SOC_STM32F334X8
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23
boards/arm/nucleo_f334r8/Kconfig.defconfig
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boards/arm/nucleo_f334r8/Kconfig.defconfig
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# Kconfig - STM32 Nucleo-64 development board with STM32F334R8 MCU
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#
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# Copyright (c) 2016 RnDity Sp. z o.o.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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if BOARD_NUCLEO_F334R8
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config BOARD
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default nucleo_f334r8
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endif # BOARD_NUCLEO_F334R8
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2
boards/arm/nucleo_f334r8/Makefile
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boards/arm/nucleo_f334r8/Makefile
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# No C files (yet)
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obj- += dummy.o
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6
boards/arm/nucleo_f334r8/Makefile.board
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boards/arm/nucleo_f334r8/Makefile.board
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FLASH_SCRIPT = openocd.sh
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OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
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OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
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export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD
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36
boards/arm/nucleo_f334r8/board.h
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boards/arm/nucleo_f334r8/board.h
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/*
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* Copyright (c) 2016 RnDity Sp. z o.o.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/* USER push button */
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#define USER_PB_GPIO_PORT "GPIOC"
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#define USER_PB_GPIO_PIN 13
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/* LD2 green LED */
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#define LD2_GPIO_PORT "GPIOA"
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#define LD2_GPIO_PIN 5
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/* Create aliases to make the basic samples work */
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#define SW0_GPIO_NAME USER_PB_GPIO_PORT
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#define SW0_GPIO_PIN USER_PB_GPIO_PIN
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#define LED0_GPIO_PORT LD2_GPIO_PORT
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#define LED0_GPIO_PIN LD2_GPIO_PIN
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#endif /* __INC_BOARD_H */
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53
boards/arm/nucleo_f334r8/nucleo_f334r8_defconfig
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boards/arm/nucleo_f334r8/nucleo_f334r8_defconfig
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# Zephyr Kernel Configuration
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CONFIG_ARM=y
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CONFIG_ARCH="arm"
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CONFIG_SOC="stm32f334x8"
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CONFIG_SOC_SERIES="stm32f3"
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CONFIG_SOC_FAMILY="st_stm32"
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CONFIG_BOARD="nucleo_f334r8"
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CONFIG_SOC_SERIES_STM32F3X=y
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# Platform Configuration
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_STM32F334X8=y
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CONFIG_BOARD_NUCLEO_F334R8=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_SERIAL_HAS_DRIVER=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_UART_STM32=y
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_2=y
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CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
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# Pinmux Driver
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# GPIO Controller
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTA=y
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CONFIG_GPIO_STM32_PORTB=y
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CONFIG_GPIO_STM32_PORTC=y
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# RCC configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL_STM32F3X=y
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CONFIG_CLOCK_CONTROL_STM32F3X_DEVICE_INIT_PRIORITY=1
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CONFIG_CLOCK_STM32F3X_SYSCLK_SRC_PLL=y
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CONFIG_CLOCK_STM32F3X_PLL_SRC_HSE=y
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CONFIG_CLOCK_STM32F3X_PLL_PREDIV=0
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CONFIG_CLOCK_STM32F3X_PLL_MULTIPLIER=9
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CONFIG_CLOCK_STM32F3X_AHB_PRESCALER=0
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CONFIG_CLOCK_STM32F3X_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32F3X_APB2_PRESCALER=0
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12
boards/arm/nucleo_f334r8/support/openocd.cfg
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boards/arm/nucleo_f334r8/support/openocd.cfg
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source [find board/st_nucleo_f3.cfg]
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$_TARGETNAME configure -event gdb-attach {
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echo "Debugger attaching: halting execution"
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reset halt
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gdb_breakpoint_override hard
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}
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$_TARGETNAME configure -event gdb-detach {
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echo "Debugger detaching: resuming execution"
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resume
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}
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@ -5,7 +5,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
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nrf51_pca10028 nucleo_f401re 96b_carbon nrf51_blenano
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arduino_101_ble cc3200_launchxl quark_se_c1000_ble bbc_microbit
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v2m_beetle nucleo_l476rg nrf52840_pca10056 nucleo_f411re
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stm3210c_eval
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stm3210c_eval nucleo_f334r8
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supported_toolchains = zephyr gccarmemb
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[qemu_cortex_m3]
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