boards: add initial support for Nucleo-64 with Soc STM32F334

Change-Id: I0b9992e26353cea3b0415aa57ab3b983d84cef05
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>

boards/arm/nucleo_f334r8/Kconfig.board

@@ -0,0 +1,20 @@
+# Kconfig - STM32 Nucleo-64 development board with STM32F334R8 MCU configuration
+#
+# Copyright (c) 2016 RnDity Sp. z o.o.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+config BOARD_NUCLEO_F334R8
+	bool "NUCLEO-64 F334R8 Development Board"
+	depends on SOC_STM32F334X8

boards/arm/nucleo_f334r8/Kconfig.defconfig

@@ -0,0 +1,23 @@
+# Kconfig - STM32 Nucleo-64 development board with STM32F334R8 MCU
+#
+# Copyright (c) 2016 RnDity Sp. z o.o.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if BOARD_NUCLEO_F334R8
+
+config BOARD
+	default nucleo_f334r8
+
+endif # BOARD_NUCLEO_F334R8

boards/arm/nucleo_f334r8/Makefile

@@ -0,0 +1,2 @@
+# No C files (yet)
+obj- += dummy.o

boards/arm/nucleo_f334r8/Makefile.board

@@ -0,0 +1,6 @@
+FLASH_SCRIPT = openocd.sh
+
+OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+
+export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD

boards/arm/nucleo_f334r8/board.h

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 RnDity Sp. z o.o.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT	"GPIOC"
+#define USER_PB_GPIO_PIN	13
+
+/* LD2 green LED */
+#define LD2_GPIO_PORT		"GPIOA"
+#define LD2_GPIO_PIN		5
+
+/* Create aliases to make the basic samples work */
+#define SW0_GPIO_NAME		USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN		USER_PB_GPIO_PIN
+#define LED0_GPIO_PORT		LD2_GPIO_PORT
+#define LED0_GPIO_PIN		LD2_GPIO_PIN
+
+#endif /* __INC_BOARD_H */

boards/arm/nucleo_f334r8/nucleo_f334r8_defconfig

@@ -0,0 +1,53 @@
+# Zephyr Kernel Configuration
+CONFIG_ARM=y
+CONFIG_ARCH="arm"
+CONFIG_SOC="stm32f334x8"
+CONFIG_SOC_SERIES="stm32f3"
+CONFIG_SOC_FAMILY="st_stm32"
+CONFIG_BOARD="nucleo_f334r8"
+CONFIG_SOC_SERIES_STM32F3X=y
+
+# Platform Configuration
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_STM32F334X8=y
+CONFIG_BOARD_NUCLEO_F334R8=y
+
+# General Kernel Options
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_SERIAL_HAS_DRIVER=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_UART_STM32=y
+# enable USART2 - passthrough to STLINK v2 connector
+CONFIG_UART_STM32_PORT_2=y
+CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
+# enable console on this port by default
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+CONFIG_PINMUX_STM32=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32=y
+CONFIG_GPIO_STM32_PORTA=y
+CONFIG_GPIO_STM32_PORTB=y
+CONFIG_GPIO_STM32_PORTC=y
+
+# RCC configuration
+CONFIG_CLOCK_CONTROL=y
+CONFIG_CLOCK_CONTROL_STM32F3X=y
+CONFIG_CLOCK_CONTROL_STM32F3X_DEVICE_INIT_PRIORITY=1
+CONFIG_CLOCK_STM32F3X_SYSCLK_SRC_PLL=y
+CONFIG_CLOCK_STM32F3X_PLL_SRC_HSE=y
+CONFIG_CLOCK_STM32F3X_PLL_PREDIV=0
+CONFIG_CLOCK_STM32F3X_PLL_MULTIPLIER=9
+CONFIG_CLOCK_STM32F3X_AHB_PRESCALER=0
+CONFIG_CLOCK_STM32F3X_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32F3X_APB2_PRESCALER=0

boards/arm/nucleo_f334r8/support/openocd.cfg

@@ -0,0 +1,12 @@
+source [find board/st_nucleo_f3.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+        echo "Debugger attaching: halting execution"
+        reset halt
+        gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+        echo "Debugger detaching: resuming execution"
+        resume
+}

scripts/sanity_chk/arches/arm.ini

@@ -5,7 +5,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
             nrf51_pca10028 nucleo_f401re 96b_carbon nrf51_blenano
             arduino_101_ble cc3200_launchxl quark_se_c1000_ble bbc_microbit
             v2m_beetle nucleo_l476rg nrf52840_pca10056 nucleo_f411re
-            stm3210c_eval
+            stm3210c_eval nucleo_f334r8
 supported_toolchains = zephyr gccarmemb
 
 [qemu_cortex_m3]