doc: change UTF-8 chars to sphinx inline replaces
Avoiding use of UTF-8 characters (trip up some tools) Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commit is contained in:
parent
795f068a2e
commit
cbec29ab95
14 changed files with 73 additions and 63 deletions
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@ -54,10 +54,10 @@ The STM32L475RG SoC provides the following hardware IPs:
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- Clock Sources:
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- 4 to 48 MHz crystal oscillator
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 16 MHz factory-trimmed RC (±1%)
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- Internal low-power 32 kHz RC (±5%)
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- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
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- Internal low-power 32 kHz RC ( |plusminus| 5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
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LSE (better than ±0.25 % accuracy)
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LSE (better than |plusminus| 0.25 % accuracy)
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- 3 PLLs for system clock, USB, audio, ADC
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- RTC with HW calendar, alarms and calibration
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- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
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@ -36,7 +36,8 @@ Hardware
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- SMA RF Connector
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- RF regulatory certified
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- Serial Flash for OTA firmware upgrades
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- On board NXP FXOS8700CQ digital sensor, 3D Accelerometer (±2g/±4g/±8g) + 3D
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- On board NXP FXOS8700CQ digital sensor, 3D Accelerometer ( |plusminus| 2g/
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|plusminus| 4g/ |plusminus| 8g) + 3D
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Magnetometer
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- OpenSDA and JTAG debug
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@ -13,7 +13,7 @@ some highlights of the Nucleo F412ZG board:
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- STM32 microcontroller in LQFP144 package
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- Two types of extension resources:
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- ST Zio connector including: support for Arduino™ Uno V3 connectivity
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- ST Zio connector including: support for Arduino* Uno V3 connectivity
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(A0 to A5, D0 to D15) and additional signals exposing a wide range of
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peripherals
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- ST morpho extension pin headers for full access to all STM32 I/Os
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@ -39,7 +39,7 @@ Hardware
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Nucleo F412ZG provides the following hardware components:
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- STM32F412ZGT6 in LQFP144 package
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- ARM®32-bit Cortex®-M4 CPU with FPU
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- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
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- 100 MHz max CPU frequency
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- VDD from 1.7 V to 3.6 V
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- 1 MB Flash
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@ -13,7 +13,7 @@ some highlights of the Nucleo F413ZH board:
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- STM32 microcontroller in LQFP144 package
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- Two types of extension resources:
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- ST Zio connector including: support for Arduino™ Uno V3 connectivity
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- ST Zio connector including: support for Arduino* Uno V3 connectivity
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(A0 to A5, D0 to D15) and additional signals exposing a wide range of
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peripherals
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- ST morpho extension pin headers for full access to all STM32 I/Os
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@ -39,7 +39,7 @@ Hardware
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Nucleo F413ZH provides the following hardware components:
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- STM32F413ZHT6 in LQFP144 package
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- ARM®32-bit Cortex®-M4 CPU with FPU
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- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
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- 100 MHz max CPU frequency
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- VDD from 1.7 V to 3.6 V
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- 1.5 MB Flash
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@ -34,14 +34,17 @@ Hardware
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The STM32L432KC SoC provides the following hardware IPs:
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- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84 μA/MHz run mode)
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- Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
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- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84
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|micro| A/MHz run mode)
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- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 80 MHz,
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100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
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- Clock Sources:
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 16 MHz factory-trimmed RC (±1%)
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- Internal low-power 32 kHz RC (±5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
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- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
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- Internal low-power 32 kHz RC ( |plusminus| 5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
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LSE (better than |plusminus| 0.25 % accuracy)
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- 2 PLLs for system clock, USB, audio, ADC
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- RTC with HW calendar, alarms and calibration
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@ -64,7 +67,8 @@ The STM32L432KC SoC provides the following hardware IPs:
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- Rich analog peripherals (independent supply)
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- 1× 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 μA/MSPS
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- 1x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
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|micro| A/MSPS
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- 2x 12-bit DAC, low-power sample and hold
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- 1x operational amplifiers with built-in PGA
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- 2x ultra-low-power comparators
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@ -83,7 +87,7 @@ The STM32L432KC SoC provides the following hardware IPs:
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- 14-channel DMA controller
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- True random number generator
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- CRC calculation unit, 96-bit unique ID
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
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More information about STM32L432KC can be found here:
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@ -40,10 +40,10 @@ The STM32L476RG SoC provides the following hardware IPs:
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- Clock Sources:
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- 4 to 48 MHz crystal oscillator
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 16 MHz factory-trimmed RC (±1%)
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- Internal low-power 32 kHz RC (±5%)
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- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
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- Internal low-power 32 kHz RC ( |plusminus| 5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
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LSE (better than ±0.25 % accuracy)
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LSE (better than |plusminus| 0.25 % accuracy)
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- 3 PLLs for system clock, USB, audio, ADC
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- RTC with HW calendar, alarms and calibration
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- LCD 8 x 40 or 4 x 44 with step-up converter
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@ -116,7 +116,7 @@ Flashing
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STM3210C-EVAL board includes an ST-LINK/V2-1 embedded debug tool interface.
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At power-on, the board is in firmware-upgrade mode (also called DFU for
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"Device Firmware Upgrade”), allowing the firmware to be updated through the USB.
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"Device Firmware Upgrade"), allowing the firmware to be updated through the USB.
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This interface is supported by the openocd version included in Zephyr SDK.
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Flashing an application to STM3210C-EVAL
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@ -120,7 +120,7 @@ Flashing
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STM32373C-EVAL board includes an ST-LINK/V2-1 embedded debug tool interface.
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At power-on, the board is in firmware-upgrade mode (also called DFU for
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"Device Firmware Upgrade”), allowing the firmware to be updated through the USB.
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"Device Firmware Upgrade"), allowing the firmware to be updated through the USB.
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This interface is supported by the openocd version included in Zephyr SDK.
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Flashing an application to STM32373C-EVAL
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@ -17,7 +17,7 @@ some highlights of the STM32F469I-DISCO board:
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- ST-LINK/V2-1 USB connector
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- User USB FS connector
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- VIN from Arduino™ compatible connectors
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- VIN from Arduino* compatible connectors
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- Four user LEDs
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- Two push-buttons: USER and RESET
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@ -29,7 +29,7 @@ some highlights of the STM32F469I-DISCO board:
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- I2C extension connector
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- 4Mx32bit SDRAM
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- 128-Mbit Quad-SPI NOR Flash
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- Expansion connectors and Arduino™ UNO V3 connectors
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- Expansion connectors and Arduino UNO V3 connectors
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.. image:: img/en.stm32f469i-disco.jpg
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:width: 457px
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@ -45,7 +45,7 @@ Hardware
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STM32F469I-DISCO Discovery kit provides the following hardware components:
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- STM32F469NIH6 in BGA216 package
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- ARM®32-bit Cortex®-M4 CPU with FPU
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- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
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- 180 MHz max CPU frequency
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- VDD from 1.8 V to 3.6 V
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- 2 MB Flash
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@ -53,7 +53,7 @@ STM32F469I-DISCO Discovery kit provides the following hardware components:
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- GPIO with external interrupt capability
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- LCD parallel interface, 8080/6800 modes
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- LCD TFT controller supporting up to XGA resolution
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- MIPI® DSI host controller supporting up to 720p 30Hz resolution
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- MIPI |reg| DSI host controller supporting up to 720p 30Hz resolution
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- 3x12-bit ADC with 24 channels
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- 2x12-bit D/A converters
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- RTC
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@ -46,7 +46,7 @@ Hardware
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STM32F4DISCOVERY Discovery kit provides the following hardware components:
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- STM32F407VGT6 in LQFP100 package
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- ARM®32-bit Cortex®-M4 CPU with FPU
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- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
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- 168 MHz max CPU frequency
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- VDD from 1.8 V to 3.6 V
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- 1 MB Flash
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@ -24,15 +24,15 @@ some highlights of the STM32L496G Discovery board:
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- Two types of extension resources:
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- STMod+ and PMOD connectors
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- Compatible Arduino™ Uno V3 connectors
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- Compatible Arduino* Uno V3 connectors
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- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
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- 5 source options for power supply
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- ST-LINK/V2-1 USB connector
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- User USB FS connector
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- VIN from Arduino™ connector
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- 5 V from Arduino™ connector
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- VIN from Arduino connector
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- 5 V from Arduino connector
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- USB charger
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- USB VBUS or external source(3.3V, 5V, 7 - 12V)
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- Power management access point
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@ -54,20 +54,23 @@ Hardware
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The STM32L496AG SoC provides the following hardware capabilities:
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- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 91 μA/MHz run mode)
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- Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
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- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 91
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|micro| A/MHz run mode)
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- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 80 MHz,
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100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
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- Clock Sources:
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- 4 to 48 MHz crystal oscillator
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 16 MHz factory-trimmed RC (±1%)
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- Internal low-power 32 kHz RC (±5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
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- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
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- Internal low-power 32 kHz RC ( |plusminus| 5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
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LSE (better than |plusminus| 0.25 % accuracy)
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- Internal 48 MHz with clock recovery
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- 3 PLLs for system clock, USB, audio, ADC
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- RTC with HW calendar, alarms and calibration
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- LCD 8 × 40 or 4 × 44 with step-up converter
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- LCD 8 x 40 or 4 x 44 with step-up converter
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- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
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- 16x timers:
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@ -89,7 +92,8 @@ The STM32L496AG SoC provides the following hardware capabilities:
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- 4x digital filters for sigma delta modulator
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- Rich analog peripherals (independent supply)
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- 3× 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 μA/MSPS
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- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
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|micro| A/MSPS
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- 2x 12-bit DAC, low-power sample and hold
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- 2x operational amplifiers with built-in PGA
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- 2x ultra-low-power comparators
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- 14-channel DMA controller
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- True random number generator
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- CRC calculation unit, 96-bit unique ID
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
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More information about STM32L496AG can be found here:
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@ -58,9 +58,9 @@ This board supports the following hardware features:
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+-----------+------------+-----------------------+
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The kernel currently does not support other hardware features.
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See the `Intel® Quark Core Hardware Reference Manual`_ for a
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See the `Intel |reg| Quark Core Hardware Reference Manual`_ for a
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complete list of Galileo board hardware features, and the
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`Intel® Quark Software Developer Manual for Linux`_
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`Intel |reg| Quark Software Developer Manual for Linux`_
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PCI
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@ -81,7 +81,7 @@ Serial Port Polling Mode Support
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The polling mode serial port allows debug output to be printed.
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For more information, see `Intel® Quark SoC X1000 Datasheet`_,
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For more information, see `Intel |reg| Quark SoC X1000 Datasheet`_,
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section 18.3.3 FIFO Polled-Mode Operation
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The interrupt mode serial port provides general serial communication
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and external communication.
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For more information, see `Intel® Quark SoC X1000 Datasheet`_, section 21.12.1.4.5 Poll Mode
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For more information, see `Intel |reg| Quark SoC X1000 Datasheet`_, section 21.12.1.4.5 Poll Mode
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Interrupt Controller
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@ -124,18 +124,18 @@ pair of receive and transmit buffers and descriptors. The driver
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operates the network interface in store-and-forward mode and enables
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the receive interrupt.
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For more information, see `Intel® Quark SoC X1000 Datasheet`_,
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For more information, see `Intel |reg| Quark SoC X1000 Datasheet`_,
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section 15.0 10/100 Mbps Ethernet
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Connections and IOs
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===================
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For a component layout diagram showing pin names, see page 46 of the
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`Intel® Quark SoC X1000 Datasheet`_.
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`Intel |reg| Quark SoC X1000 Datasheet`_.
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See also the `Intel® Galileo Datasheet`_.
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See also the `Intel |reg| Galileo Datasheet`_.
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For the Galileo Board Connection Diagram see page 9 of the `Intel® Galileo Board User Guide`_.
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For the Galileo Board Connection Diagram see page 9 of the `Intel |reg| Galileo Board User Guide`_.
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Jumpers & Switches
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@ -155,7 +155,7 @@ The Galileo default switch settings are:
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+--------+--------------+
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For more information, see page 14 of the
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`Intel® Galileo Board User Guide`_.
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`Intel |reg| Galileo Board User Guide`_.
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Memory Mappings
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@ -165,17 +165,17 @@ This board configuration uses default hardware memory map
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addresses and sizes.
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For a list of memory mapped registers, see page 868 of the
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`Intel® Quark SoC X1000 Datasheet`_.
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`Intel |reg| Quark SoC X1000 Datasheet`_.
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Component Layout
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================
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See page 3 of the Intel® Galileo Datasheet for a component layout
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diagram. Click the link to open the `Intel® Galileo Datasheet`_.
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See page 3 of the Intel |reg| Galileo Datasheet for a component layout
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diagram. Click the link to open the `Intel |reg| Galileo Datasheet`_.
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For a block diagram, see page 38 of the `Intel® Quark SoC X1000 Datasheet`_.
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For a block diagram, see page 38 of the `Intel |reg| Quark SoC X1000 Datasheet`_.
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Programming and Debugging
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@ -343,27 +343,27 @@ At this time, the kernel does not support the following:
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Bibliography
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************
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1. `Intel® Galileo Datasheet`_, Order Number: 329681-003US
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1. `Intel |reg| Galileo Datasheet`_, Order Number: 329681-003US
|
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|
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.. _Intel® Galileo Datasheet:
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.. _Intel |reg| Galileo Datasheet:
|
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https://www.intel.com/content/dam/support/us/en/documents/galileo/sb/galileo_datasheet_329681_003.pdf
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|
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2. `Intel® Galileo Board User Guide`_.
|
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2. `Intel |reg| Galileo Board User Guide`_.
|
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|
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.. _Intel® Galileo Board User Guide:
|
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.. _Intel |reg| Galileo Board User Guide:
|
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http://download.intel.com/support/galileo/sb/galileo_boarduserguide_330237_001.pdf
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|
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3. `Intel® Quark SoC X1000 Datasheet`_, Order Number: 329676-001US
|
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3. `Intel |reg| Quark SoC X1000 Datasheet`_, Order Number: 329676-001US
|
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|
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.. _Intel® Quark SoC X1000 Datasheet:
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.. _Intel |reg| Quark SoC X1000 Datasheet:
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https://communities.intel.com/servlet/JiveServlet/previewBody/21828-102-2-25120/329676_QuarkDatasheet.pdf
|
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|
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4. `Intel® Quark Core Hardware Reference Manual`_.
|
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4. `Intel |reg| Quark Core Hardware Reference Manual`_.
|
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|
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.. _Intel® Quark Core Hardware Reference Manual:
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.. _Intel |reg| Quark Core Hardware Reference Manual:
|
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http://caxapa.ru/thumbs/497461/Intel_Quark_Core_HWRefMan_001.pdf
|
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|
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5. `Intel® Quark Software Developer Manual for Linux`_.
|
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5. `Intel |reg| Quark Software Developer Manual for Linux`_.
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|
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.. _Intel® Quark Software Developer Manual for Linux:
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.. _Intel |reg| Quark Software Developer Manual for Linux:
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http://www.intel.com/content/dam/www/public/us/en/documents/manuals/quark-x1000-linux-sw-developers-manual.pdf
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@ -136,9 +136,9 @@ rst_epilog = """
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.. |deg| unicode:: U+000B0 .. DEGREE SIGN
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:ltrim:
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.. |plusminus| unicode:: U+000B1 .. PLUS-MINUS SIGN
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:trim:
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:rtrim:
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.. |micro| unicode:: U+000B5 .. MICRO SIGN
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:trim:
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:rtrim:
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"""
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# -- Options for HTML output ----------------------------------------------
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@ -12,8 +12,9 @@ Sample application that periodically reads temperature from the MCP9808 sensor.
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Requirements
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************
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The MCP9808 digital temperature sensor converts temperatures between -20°C and
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+100°C to a digital word with ±0.5°C (max.) accuracy. It is I2C compatible and
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The MCP9808 digital temperature sensor converts temperatures between -20 |deg|
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||||
C and +100 |deg| C to a digital word with |plusminus| 0.5 |deg| C (max.)
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accuracy. It is I2C compatible and
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supports up to 16 devices on the bus. We do not require pullup resistors on the
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data or clock signals as they are already installed on the breakout board.
|
||||
|
||||
|
|
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