serial: Provide new numbering scheme for stm32 UART
There was a misalignment between Zephyr UART device numbering and SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could be confusing for user. This commit allows to align "UART_1" to IP USART_1. Change is propagated to all STM32F103RB/STM32F401RE based boards and respective pinmux drivers Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
parent
575207c6ff
commit
2fcf3435c1
13 changed files with 160 additions and 159 deletions
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@ -40,15 +40,6 @@ config UART_CONSOLE
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config UART_STM32
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def_bool y
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config UART_STM32_PORT_0
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def_bool y
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config UART_STM32_PORT_0_NAME
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default UART_0
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config UART_STM32_PORT_0_BAUD_RATE
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default 115200
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config UART_STM32_PORT_1
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def_bool y
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@ -58,6 +49,15 @@ config UART_STM32_PORT_1_NAME
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config UART_STM32_PORT_1_BAUD_RATE
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default 115200
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config UART_STM32_PORT_2
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def_bool y
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config UART_STM32_PORT_2_NAME
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default UART_2
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config UART_STM32_PORT_2_BAUD_RATE
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default 115200
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endif #SERIAL
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if CLOCK_CONTROL
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@ -7,10 +7,10 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# enable USART1 - passthrough to FT230XQ
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CONFIG_UART_STM32_PORT_0=y
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CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_0"
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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# enable pinmux
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CONFIG_PINMUX=y
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@ -11,12 +11,12 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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CONFIG_UART_STM32_PORT_2=y
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CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
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# enable pinmux
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CONFIG_PINMUX=y
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@ -7,10 +7,10 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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CONFIG_UART_STM32_PORT_2=y
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CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
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# enable pinmux
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CONFIG_PINMUX=y
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@ -11,12 +11,12 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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# enable USART1
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CONFIG_UART_STM32_PORT_0=y
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CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_0"
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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# enable pinmux
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@ -10,8 +10,8 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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CONFIG_UART_STM32_PORT_0=y
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CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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# enable pinmux
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CONFIG_PINMUX=y
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@ -25,14 +25,14 @@
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/* pin assignments for 96boards Carbon board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_0
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
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{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#endif /* CONFIG_UART_STM32_PORT_2 */
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};
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static int pinmux_stm32_init(struct device *port)
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@ -25,18 +25,18 @@
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/* pin assignments for NUCLEO-F103RB board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_0
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
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{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#ifdef CONFIG_UART_STM32_PORT_3
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{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
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{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#endif /* CONFIG_UART_STM32_PORT_3 */
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};
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static int pinmux_stm32_init(struct device *port)
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@ -25,14 +25,14 @@
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/* pin assignments for NUCLEO-F401RE board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_0
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
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{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#endif /* CONFIG_UART_STM32_PORT_2 */
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};
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static int pinmux_stm32_init(struct device *port)
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@ -25,18 +25,18 @@
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/* pin assignments for NUCLEO-F103RB board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_0
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
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{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#ifdef CONFIG_UART_STM32_PORT_2
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{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#ifdef CONFIG_UART_STM32_PORT_3
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{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
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{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#endif /* CONFIG_UART_STM32_PORT_3 */
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};
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static int pinmux_stm32_init(struct device *port)
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@ -25,18 +25,18 @@
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/* pin assignments for STM32 MINI A15 board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_0
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
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{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
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#endif /* CONFIG_UART_STM32_PORT_0 */
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#ifdef CONFIG_UART_STM32_PORT_1
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{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_1 */
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#ifdef CONFIG_UART_STM32_PORT_2
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{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#ifdef CONFIG_UART_STM32_PORT_3
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{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
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{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
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#endif /* CONFIG_UART_STM32_PORT_2 */
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#endif /* CONFIG_UART_STM32_PORT_3 */
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};
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static int pinmux_stm32_init(struct device *port)
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@ -25,9 +25,9 @@ menuconfig UART_STM32
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processors. Say y if you wish to use serial port on STM32F10x
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MCU.
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# --- port 0 ---
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# --- port 1 ---
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config UART_STM32_PORT_0
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config UART_STM32_PORT_1
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bool "Enable STM32 USART1 Port"
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default n
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depends on UART_STM32
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@ -35,44 +35,12 @@ config UART_STM32_PORT_0
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Enable support for USART1 port in the driver. Say y here
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if you want to use USART1 device.
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config UART_STM32_PORT_0_NAME
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string "Device Name for STM32 USART1 Port"
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default "UART_0"
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depends on UART_STM32_PORT_0
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help
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This is the device name for USART1 port, and is
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included in the device struct.
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config UART_STM32_PORT_0_BAUD_RATE
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int "STM32 USART1 Baud Rate"
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default 9600
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depends on UART_STM32_PORT_0
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help
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The baud rate for USART1 port to be set to at boot.
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config UART_STM32_PORT_0_IRQ_PRI
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int "STM32 USART1 Interrupt Priority"
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default 0
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depends on UART_STM32_PORT_0 && UART_INTERRUPT_DRIVEN
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help
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The interrupt priority for USART1 port.
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# --- port 1 ---
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config UART_STM32_PORT_1
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bool "Enable STM32 USART2 Port"
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default n
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depends on UART_STM32
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help
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Enable support for USART2 port in the driver. Say y here
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if you want to use USART2 device.
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config UART_STM32_PORT_1_NAME
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string "Device Name for STM32 USART1 Port"
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default "UART_1"
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depends on UART_STM32_PORT_1
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help
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This is the device name for USART2 port, and is
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This is the device name for USART1 port, and is
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included in the device struct.
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config UART_STM32_PORT_1_BAUD_RATE
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default 9600
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depends on UART_STM32_PORT_1
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help
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The baud rate for USART2 port to be set to at boot.
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The baud rate for USART1 port to be set to at boot.
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config UART_STM32_PORT_1_IRQ_PRI
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int "STM32 USART2 Interrupt Priority"
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int "STM32 USART1 Interrupt Priority"
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default 0
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depends on UART_STM32_PORT_1 && UART_INTERRUPT_DRIVEN
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help
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The interrupt priority for USART2 port.
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The interrupt priority for USART1 port.
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# --- port 2 ---
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config UART_STM32_PORT_2
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bool "Enable STM32 USART2 Port"
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default n
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depends on UART_STM32
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help
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Enable support for USART2 port in the driver. Say y here
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if you want to use USART2 device.
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config UART_STM32_PORT_2_NAME
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string "Device Name for STM32 USART2 Port"
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default "UART_2"
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depends on UART_STM32_PORT_2
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help
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This is the device name for USART2 port, and is
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included in the device struct.
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config UART_STM32_PORT_2_BAUD_RATE
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int "STM32 USART2 Baud Rate"
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default 9600
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depends on UART_STM32_PORT_2
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help
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The baud rate for USART2 port to be set to at boot.
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config UART_STM32_PORT_2_IRQ_PRI
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int "STM32 USART2 Interrupt Priority"
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default 0
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depends on UART_STM32_PORT_2 && UART_INTERRUPT_DRIVEN
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help
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The interrupt priority for USART2 port.
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# --- port 3 ---
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config UART_STM32_PORT_3
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bool "Enable STM32 USART3 Port"
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default n
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depends on UART_STM32
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Enable support for USART3 port in the driver. Say y here
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if you want to use USART3 device.
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config UART_STM32_PORT_2_NAME
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string "Device Name for STM32 USART1 Port"
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default "UART_2"
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depends on UART_STM32_PORT_2
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config UART_STM32_PORT_3_NAME
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string "Device Name for STM32 USART3 Port"
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default "UART_3"
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depends on UART_STM32_PORT_3
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help
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This is the device name for USART3 port, and is
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included in the device struct.
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config UART_STM32_PORT_2_BAUD_RATE
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int "STM32 USART1 Baud Rate"
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config UART_STM32_PORT_3_BAUD_RATE
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int "STM32 USART3 Baud Rate"
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default 9600
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depends on UART_STM32_PORT_2
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depends on UART_STM32_PORT_3
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help
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The baud rate for USART3 port to be set to at boot.
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config UART_STM32_PORT_2_IRQ_PRI
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config UART_STM32_PORT_3_IRQ_PRI
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int "STM32 USART3 Interrupt Priority"
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default 0
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depends on UART_STM32_PORT_2 && UART_INTERRUPT_DRIVEN
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depends on UART_STM32_PORT_3 && UART_INTERRUPT_DRIVEN
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help
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The interrupt priority for USART3 port.
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@ -319,57 +319,6 @@ static int uart_stm32_init(struct device *dev)
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return 0;
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}
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#ifdef CONFIG_UART_STM32_PORT_0
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_stm32_irq_config_func_0(struct device *dev);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_stm32_config uart_stm32_dev_cfg_0 = {
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.uconf = {
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.base = (uint8_t *)USART1_BASE,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = uart_stm32_irq_config_func_0,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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},
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
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#elif CONFIG_SOC_SERIES_STM32F4X
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.pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
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.enr = STM32F4X_CLOCK_ENABLE_USART1 },
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#endif /* CONFIG_SOC_SERIES_STM32FX */
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};
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static struct uart_stm32_data uart_stm32_dev_data_0 = {
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.huart = {
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.Init = {
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.BaudRate = CONFIG_UART_STM32_PORT_0_BAUD_RATE} }
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};
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DEVICE_AND_API_INIT(uart_stm32_0, CONFIG_UART_STM32_PORT_0_NAME,
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&uart_stm32_init,
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&uart_stm32_dev_data_0, &uart_stm32_dev_cfg_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_stm32_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void uart_stm32_irq_config_func_0(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_0_IRQ STM32F1_IRQ_USART1
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
#define PORT_0_IRQ STM32F4_IRQ_USART1
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_0_IRQ,
|
||||
CONFIG_UART_STM32_PORT_0_IRQ_PRI,
|
||||
uart_stm32_isr, DEVICE_GET(uart_stm32_0),
|
||||
0);
|
||||
irq_enable(PORT_0_IRQ);
|
||||
}
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
||||
#endif /* CONFIG_UART_STM32_PORT_0 */
|
||||
|
||||
|
||||
#ifdef CONFIG_UART_STM32_PORT_1
|
||||
|
||||
|
@ -379,16 +328,16 @@ static void uart_stm32_irq_config_func_1(struct device *dev);
|
|||
|
||||
static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
|
||||
.uconf = {
|
||||
.base = (uint8_t *)USART2_BASE,
|
||||
.base = (uint8_t *)USART1_BASE,
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = uart_stm32_irq_config_func_1,
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
},
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB1,
|
||||
.enr = STM32F4X_CLOCK_ENABLE_USART2 },
|
||||
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
|
||||
.enr = STM32F4X_CLOCK_ENABLE_USART1 },
|
||||
#endif /* CONFIG_SOC_SERIES_STM32FX */
|
||||
};
|
||||
|
||||
|
@ -408,9 +357,9 @@ DEVICE_AND_API_INIT(uart_stm32_1, CONFIG_UART_STM32_PORT_1_NAME,
|
|||
static void uart_stm32_irq_config_func_1(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_1_IRQ STM32F1_IRQ_USART2
|
||||
#define PORT_1_IRQ STM32F1_IRQ_USART1
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
#define PORT_1_IRQ STM32F4_IRQ_USART2
|
||||
#define PORT_1_IRQ STM32F4_IRQ_USART1
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_1_IRQ,
|
||||
CONFIG_UART_STM32_PORT_1_IRQ_PRI,
|
||||
|
@ -431,16 +380,17 @@ static void uart_stm32_irq_config_func_2(struct device *dev);
|
|||
|
||||
static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
|
||||
.uconf = {
|
||||
.base = (uint8_t *)USART3_BASE,
|
||||
.base = (uint8_t *)USART2_BASE,
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = uart_stm32_irq_config_func_2,
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
},
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3),
|
||||
#endif /* CONFIG_SOC_SERIES_STM32F4X */
|
||||
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB1,
|
||||
.enr = STM32F4X_CLOCK_ENABLE_USART2 },
|
||||
#endif /* CONFIG_SOC_SERIES_STM32FX */
|
||||
};
|
||||
|
||||
static struct uart_stm32_data uart_stm32_dev_data_2 = {
|
||||
|
@ -459,9 +409,9 @@ DEVICE_AND_API_INIT(uart_stm32_2, CONFIG_UART_STM32_PORT_2_NAME,
|
|||
static void uart_stm32_irq_config_func_2(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_2_IRQ STM32F1_IRQ_USART3
|
||||
#define PORT_2_IRQ STM32F1_IRQ_USART2
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
#define PORT_2_IRQ STM32F4_IRQ_USART3
|
||||
#define PORT_2_IRQ STM32F4_IRQ_USART2
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_2_IRQ,
|
||||
CONFIG_UART_STM32_PORT_2_IRQ_PRI,
|
||||
|
@ -472,3 +422,54 @@ static void uart_stm32_irq_config_func_2(struct device *dev)
|
|||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
||||
#endif /* CONFIG_UART_STM32_PORT_2 */
|
||||
|
||||
|
||||
#ifdef CONFIG_UART_STM32_PORT_3
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void uart_stm32_irq_config_func_3(struct device *dev);
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
||||
static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
|
||||
.uconf = {
|
||||
.base = (uint8_t *)USART3_BASE,
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = uart_stm32_irq_config_func_3,
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
},
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3),
|
||||
#endif /* CONFIG_SOC_SERIES_STM32F4X */
|
||||
};
|
||||
|
||||
static struct uart_stm32_data uart_stm32_dev_data_3 = {
|
||||
.huart = {
|
||||
.Init = {
|
||||
.BaudRate = CONFIG_UART_STM32_PORT_3_BAUD_RATE} }
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(uart_stm32_3, CONFIG_UART_STM32_PORT_3_NAME,
|
||||
&uart_stm32_init,
|
||||
&uart_stm32_dev_data_3, &uart_stm32_dev_cfg_3,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_stm32_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void uart_stm32_irq_config_func_3(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_SOC_SERIES_STM32F1X
|
||||
#define PORT_3_IRQ STM32F1_IRQ_USART3
|
||||
#elif CONFIG_SOC_SERIES_STM32F4X
|
||||
#define PORT_3_IRQ STM32F4_IRQ_USART3
|
||||
#endif
|
||||
IRQ_CONNECT(PORT_3_IRQ,
|
||||
CONFIG_UART_STM32_PORT_3_IRQ_PRI,
|
||||
uart_stm32_isr, DEVICE_GET(uart_stm32_3),
|
||||
0);
|
||||
irq_enable(PORT_3_IRQ);
|
||||
}
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
||||
#endif /* CONFIG_UART_STM32_PORT_3 */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue