Use device node declaration instead.
Clean up GPIO_STM32_PORT* Kconfig symbols.
On some boards some gpio ports where disabled using Kconfig symbols.
Disable them now via device tree nodes in boards dts files.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for the STM32L422Xb SoC. Base stm32l422.dtsi on
stm32l412.dtsi to be able to add the crypto device later.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add a k_timeout_t type, and use it everywhere that kernel API
functions were accepting a millisecond timeout argument. Instead of
forcing milliseconds everywhere (which are often not integrally
representable as system ticks), do the conversion to ticks at the
point where the timeout is created. This avoids an extra unit
conversion in some application code, and allows us to express the
timeout in units other than milliseconds to achieve greater precision.
The existing K_MSEC() et. al. macros now return initializers for a
k_timeout_t.
The K_NO_WAIT and K_FOREVER constants have now become k_timeout_t
values, which means they cannot be operated on as integers.
Applications which have their own APIs that need to inspect these
vs. user-provided timeouts can now use a K_TIMEOUT_EQ() predicate to
test for equality.
Timer drivers, which receive an integer tick count in ther
z_clock_set_timeout() functions, now use the integer-valued
K_TICKS_FOREVER constant instead of K_FOREVER.
For the initial release, to preserve source compatibility, a
CONFIG_LEGACY_TIMEOUT_API kconfig is provided. When true, the
k_timeout_t will remain a compatible 32 bit value that will work with
any legacy Zephyr application.
Some subsystems present timeout (or timeout-like) values to their own
users as APIs that would re-use the kernel's own constants and
conventions. These will require some minor design work to adapt to
the new scheme (in most cases just using k_timeout_t directly in their
own API), and they have not been changed in this patch, instead
selecting CONFIG_LEGACY_TIMEOUT_API via kconfig. These subsystems
include: CAN Bus, the Microbit display driver, I2S, LoRa modem
drivers, the UART Async API, Video hardware drivers, the console
subsystem, and the network buffer abstraction.
k_sleep() now takes a k_timeout_t argument, with a k_msleep() variant
provided that works identically to the original API.
Most of the changes here are just type/configuration management and
documentation, but there are logic changes in mempool, where a loop
that used a timeout numerically has been reworked using a new
z_timeout_end_calc() predicate. Also in queue.c, a (when POLL was
enabled) a similar loop was needlessly used to try to retry the
k_poll() call after a spurious failure. But k_poll() does not fail
spuriously, so the loop was removed.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Kernel timeouts have always been a 32 bit integer despite the
existence of generation macros, and existing code has been
inconsistent about using them. Upcoming commits are going to make the
timeout arguments opaque, so fix things up to be rigorously correct.
Changes include:
+ Adding a K_TIMEOUT_EQ() macro for code that needs to compare timeout
values for equality (e.g. with K_FOREVER or K_NO_WAIT).
+ Adding a k_msleep() synonym for k_sleep() which can continue to take
integral arguments as k_sleep() moves away to timeout arguments.
+ Pervasively using the K_MSEC(), K_SECONDS(), et. al. macros to
generate timeout arguments.
+ Removing the usage of K_NO_WAIT as the final argument to
K_THREAD_DEFINE(). This is just a count of milliseconds and we need
to use a zero.
This patch include no logic changes and should not affect generated
code at all.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
Fix typo where DT_REG_ADDR was used istead of DT_REG_SIZE in
linker script for i.MX RT socs and their ITCM and DTCM memories.
Signed-off-by: Arvid Rosén <arvid@softube.com>
Indicate that the NXP Kinetis KE1xF SoC contains a Low Power Timer
(LPTMR) and default to enabling the corresponding driver if
CONFIG_COUNTER is enabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Added device tree nodes and associated headers for
defined uarts on the stm32g0 and stm32g07x 8x parts.
Tested with uart on stm32g071rb disco board with usart3 going to stlink.
Using shell.
Signed-off-by: Kieran Levin <ktl@frame.work>
This commit renames the `cortex_r` directory under the AArch32 to
`cortex_a_r`, in preparation for the AArch32 Cortex-A support.
The rationale for this renaming is that the Cortex-A and Cortex-R share
the same base design and the difference between them, other than the
MPU vs. MMU, is minimal.
Since most of the architecture port code and configurations will be
shared between the Cortex-A and Cortex-R architectures, it is
advantageous to have them together in the same directory.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
When power management is enabled, SYS_PM_STATE_LOCK is necessary
in order to prevent the power policy from automatically entering
certain sleep states.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The shared irq support isn't needed in this driver. We just need to
deal with the fact that some SoCs have only a single interrupt line and
some have three interrupts. We can just ifdef that based on
DT_NUM_IRQS.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This was a simple missing macro, that prevented flash_shell to build
for stm32f4 based boards (which is weird, CI should have caught that
much earlier)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Rename the clock defines from k64 to K6X. This allows
inclusion of K66 series MCU's support without much
re-defines. Clock divider defaults to K64 series.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Add entropy driver based on GECKO TRNG module along with device
tree support for EFM32PG and EFR32MG SOCs.
Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
This reverts commit 8739517107.
Pull Request #23437 was merged by mistake with an invalid manifest.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
This commit updates the `xilinx_zynqmp` SoC initialisation code to use
the CMSIS-Core(R) features.
In addition, it also defines the Core IP revision value for the SoC as
specified in the Zynq UltraScale+ Device Technical Reference Manual.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Convert usb_stm32 driver to use of DT_INST macros.
Since driver is compatible with 3 different dt compatibles and
compatible string is included in DT_INST macros, I've kept the
DT_USB_ compatible agnostic macros based on DT_INST ones, which
allowed to remove fixup definitions.
Use of DT_USB symbols is now limited to usb_dc_stm32.
Additionally, compatible "st,stm32-otgfs" is removed from list
of compatibles for usbotg_hs ips.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use DT_INST_ defines.
In the process, we've removed all UART/USART/LPUART code in
device instanciation code which had no impact.
Since all uart/usart/lpuart nodes declare compatibility with
st,stm32uart, DT_INST_X_ST_STM32_UART_FOO could be used.
Removed DT_UART fixup macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use DT_INST_ defines.
Removed DT_FLASH_DEV fixup macros, except DT_FLASH_DEV_NAME
used in applications.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use DT_INST_ defines.
Removed DT_RTC_0 fixup macros but keep DT_RTC_NAME_0 as it is
still in use across RTC users.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Erratum 19: SPU region size is 32 kB instead of 16 kB.
The config should be used for alignment for data that must follow SPU
region boundaries, and to enable runtime checks when configuring SPU
regions.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
The set of interrupt stacks is now expressed as an array. We
also define the idle threads and their associated stacks this
way. This allows for iteration in cases where we have multiple
CPUs.
There is now a centralized declaration in kernel_internal.h.
On uniprocessor systems, z_interrupt_stacks has one element
and can be used in the same way as _interrupt_stack.
The IRQ stack for CPU 0 is now set in init.c instead of in
arch code.
The extern definition of the main thread stack is now removed,
this doesn't need to be in a header.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Enable counter driver support for H7 series. Tested with H743ZI MCU
using samples/drivers/counter/alarm.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
This commit updates the `qemu_cortex_a53` platform to use the
refactored AArch64 interrupt system.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the `xilinx_zynqmp` platform to use the refactored
AArch32 interrupt system.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add support for sleep states. Sleep state 1 corresponds to idle mode,
and Sleep state 2 corresponds to standby mode, as per the Technical
Reference Manual.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This commit adds an option to configure the frequency
in Hz for the HFRCO clock source. The default value
for this option is 0 which skips the configuration of the HFRCO.
This feature is supported for efm32gg, efm32jg, efm32pg, efm32fg
and efm32mg SOCs currently.
Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
The 48MHz PLL on MEC1501 is shut off during deep sleep (i.e. heavy
sleep in datasheet). When coming out of deep sleep, this PLL needs
about 3ms to lock. Most peripherals are using this PLL as clock
source and timing would be off before PLL is locked. Example of
this is seen on serial console where garbage characters are sent
as the UART block is not pushing characters out at the configured
baud rate. This likely affects all other peripherals such as I2C
and eSPI. Luckily, there is a register to indicate whether the PLL
is ready. So spin on it when coming out of deep sleep.
Fixes#23207
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Convert driver to use DT_INST_ defines. The preferred defines for
drivers are DT_INST_. The driver mostly used DT_INST_ defines but
a few IRQ priority defines needed conversion.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines. The preferred defines for
drivers are DT_INST_.
As part of this change we utilize the device tree for GIRQ info and
rename timer3 to 2 since we are doing this by instance number.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The max-value should just be an int and not an array. Change the type
to 'int' in the binding and fixup the driver to match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines. Replace dts_fixup.h use
for DT_RTC_0_NAME with DT_INST_0_NXP_KINETIS_RTC_LABEL to be
consistent. Also, remove the aliases that had been used for this
driver in various nxp_k*.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines and remove Kconfig per instance
enablement in favor of DT_INST_ define existing. Also, remove the
aliases that had been used for this driver in nxp_rt.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the hal_nordic module revision, to apply the following changes:
nrfx_config: Fix translation of symbols for _S or _NS only peripherals
For peripherals with only one type of access available (either secure
or non-secure), the common symbol translation scheme cannot be used
as it leads to mapping to non-existing symbols (e.g. NRF_FICR_NS).
Instead, use fixed translations for these symbols (e.g. NRF_FICR to
NRF_FICR_S, only for secure images).
nrfx_config: Add missing _S/_NS symbol translations for nRF5340/nRF9160
Add translations of names with _S and _NS suffixes for peripheral
access symbols that are available for a given chip but were not used
so far in any nrfx HAL or driver, to make the lists of translations
complete and consistent.
This commit corrects also the translation of NRF_I2S symbol for nRF5340
whose name for this SoC contains also the index 0 (so it needs to be
handled similarly like NRF_PDM0 is).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Configure the LDO supply when initializing H7 (M7) SoC. I have
observed MCU hanging on LL_PWR_IsActiveFlag_VOS() wait loop when
doing a cold boot if LDO supply is not explicitely enabled.
According to the datasheet LDO should be enabled by default,
however HAL examples also configure LDO, so there may be a
reason to perform such step.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32g0 SoC. Enable the independent watchdog
for the stm32g0 series for use with this driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
It is observed that after each test, weird characters appear on
console. This problem goes away if deep sleep is disabled.
The theory is that the CPU runs to deep sleep (_sys_suspend())
faster than UART can shift all the bits out. If we spin wait
for UART FIFO to clear, this is no longer an issue. This is
circumstantial evidence to the theory. So for now, put in
a workaround to spin wait for UART FIFO to clear before
going into deep sleep.
Relates to #22885
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit adds Device-Tree instances of the Flash controller
to the SAM3X, SAM4E and SAM4S series. The Flash-Controller
is used to get the unique device identifier.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Include stm32XXxx_ll_utils.h in soc.h for every stm32 SoC,
if CONFIG_HWINFO_STM32 is selected.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Add qemu-cortex-a53 memory regions with proper attributes
to translation tables. Minimal regions to execute "hello_world"
are added as of now, More granular memory regions should be
added later as per the requirement.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.
Will do the defconfigs separately in case there are any complaints
there.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Same deal as in commit eddd98f ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for all symbols defined within defconfig
files. See that commit for an explanation.
Maybe 'if's were used originally to mirror the 'if's in the main Kconfig
files, and then it got copied around by people assuming 'if' must work
differently from 'depends on'. It doesn't match in every spot at least.
Better to keep it simple and just consistently use 'depends on' when
it's a single symbol/choice I think. Helps reinforce that 'if' isn't
magic too.
Verified by printing all Kconfig menu nodes (symbols, choices, menus,
etc.) before and after the change and diffing (should show no
difference).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Move PWR init code out of clock control driver and
put SMPS related function under SMPS condition as it
is not supported by all soc variants of the series.
Fixes#22363
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The DT_FLASH_DEV_NAME define used by the sample was set to a define
symbol that was never generated. Change it to use
DT_INST_0_ATMEL_SAM0_NVMCTRL_LABEL on the sam0 family of SoCs that
had this issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.
CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.
Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:
1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
turn the CONFIG_<arch> symbols into invisible
(promptless/nonconfigurable) symbols instead.
Getting rid of the choice allows the symbols to be 'select'ed (choice
symbols don't support 'select').
2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
This makes sense since you know the architecture if you know the SoC.
Put the select on the SOC_* symbol instead for boards that don't have
a SOC_SERIES_*.
3. Remove all assignments to CONFIG_<arch> symbols. The assignments
would generate errors now, since the symbols are promptless.
The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.
See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.
This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it. Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The current sam spi driver uses soc dependent name which duplicate
configuration to enable other platforms. This refactor current
definitions to a generic way to reuse symbols by multi soc definitions.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add option for keeping the watchdog timer of the NXP Kinetis KE1xF SoC
series enabled at boot with a configurable, initial timeout.
This removes the risk of failure from when z_arm_watchdog_init()
disables the watchdog timer until the application code configures a
timeout and re-enables the watchdog timer.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds the following:
- device tree bindings for Gecko watchdog driver
- EFM32PG SOC support for the watchdog driver
- EFM32PG board support for the watchdog driver
- DTS aliases for testing with default watchdog driver test
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit adds the remaining gpio ports I, J and K to the device
tree and dts_fixup headers of the EFM32JG12B and EFM32PG12B SoCs.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
The Silicon Labs EFM32 Jade Gecko MCU includes:
* Cortex-M3 core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Disable the early watchdog initialization for the NXP Kinetis series
if the application is to be chain-loaded by mcuboot.
The early watchdog initialization must only take place once and needs
to happen within a SoC specific number of CPU clock cycles after
reset.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move CONFIG_WDOG_INIT for the NXP Kinetis series to the top-level
Kinetis Kconfig file and enable it where needed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the NXP Kinetis KW4xZ watchdog initialization code to
z_arm_watchdog_init() and make it optional based on CONFIG_WDOG_INIT.
This brings the KW4xZ in line with the other NXP Kinetis series SoC
implementations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the NXP Kinetis KL2x watchdog initialization code to
z_arm_watchdog_init() and make it optional based on
CONFIG_WDOG_INIT.
This brings the KL2x in line with the other NXP Kinetis series SoC
implementations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32l1 SoC. Enable the independent watchdog
for the stm32l1 series for use with this driver.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
Instead of having TI_CCFG_PRESENT as a symbol that's only defined in
soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series and y when
SOC_SERIES_CC13X2_CC26X2 is enabled, turn it into a helper symbol that's
selected by SOC_SERIES_CC13X2_CC26X2.
This avoids having a symbol that's only defined in a Kconfig.defconfig
file, which is confusing. It also makes things a bit more generic, in
case other boards with CCFGs are added.
Also rename it to HAS_TI_CCFG to be consistent with other helper
symbols, and add a help text.
Flagged by scripts/kconfig/lint.py.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Added delay before starting low frequency clock for the first time to
ensure that anomaly conditions are not met. Delay is configurable and
might be disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This reverts commit 49bd19f3f2,
as the patch it contains is no longer needed after nrfx is updated
to version 2.1.0.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the hal_nordic module revision, to switch to nrfx 2.1.0.
Because the list of peripherals for nRF5340 has changed as follows:
- SPIM2 has been renamed to SPIM4
- SPIM2-3, SPIS2-3, TWIM2-3, TWIS2-3, and UARTE2-3 have been added
a couple of related corrections needed to be applied in dts and Kconfig
files, plus the spi_nrfx_spim driver has been extended with the support
for SPIM4.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove soc/arm/st_stm32/stm32YY/flash_registers.h files.
Change register accesses in stm32 flash drivers to use FLASH_TypeDef
from modules/hal/stm32/stm32cube/stm32YYxx/soc/stm32xxxxxx.h.
Fixes#16235
Signed-off-by: Sarvesh Patkar <psarvesh314@gmail.com>
when DMA IP is enabled on stm32 series,
the heap size must be configured to large value
because of dma channels configuration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Same deal as in commit 677f1e6 ("config: Turn pointless/confusing
'menuconfig's into 'config's"), for a newly-introduced stuff.
Also clean up headers to be consistent with recent cleanups.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.
All uses of TEXT_START are replaced with ROM_START.
ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.
No SORT_KEYs are changed.
This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
CPU_CORTEX_M_HAS_DWT depends on
!CPU_CORTEX_M0 && !CPU_CORTEX_M0PLUS
, but SOC_SERIES_PSOC62 unconditionally selects it, even for
SOC_PSOC6_M0. This forces CPU_CORTEX_M_HAS_DWT on on Cortex-M0.
Fix it by moving the selects for CPU capabilities to the more specific
SOC_PSOC6_{M0,M4} symbols. This seems more readable than adding a
condition to the 'select CPU_CORTEX_M_HAS_DWT'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
nrf52811_pca10056 board should enable nRF 802.15.4 radio driver
automatically when 802.15.4 subsystem is enabled, as other Nordic
802.15.4-compliant boards do.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Enable the RTC counter present in the NXP K6x SoC if CONFIG_COUNTER is
enabled. Add the needed dts fixup for the RTC device.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
CPU_CORTEX_M_HAS_SYSTICK and CPU_CORTEX_M_HAS_VTOR do not need
to be explicitely selected in SoC/Boards definitions of
platforms implementing the Cortex-M mainline architecture; they
are already selected by ARMV7_M_ARM8_M_MAINLINE Kconfig symbol.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The Data Watchpoint and Trace (DWT) is an optional debug unit
for the Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+)
that provides watchpoints, data tracing and system profiling
capabilities. We select it for the ARM Cortex-M SoCs
- Beetle
- Musca A, Musca B
since it is present in these SoCs.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such. If anyone
is interesting in supporting this platform we can easily recovery it
from git.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.
dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.
The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.
Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.
hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Enable the bandgap buffer on the NXP Kinetis K6x SoC series Power
Management Controller (PMC) if the internal temperature sensor is in
use.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.
Signed-off-by: Roland Ma <rolandma@yahoo.com>
Refactors the mcux wdog driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux rtc driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux dspi driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpsci driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux uart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The counter_basic_api test was broken for i.mx rt boards when we
refactored the mcux gpt driver to use generated device tree macros in
commit b8ad9969ef.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux gpt driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux igpio driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpuart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adding Kconfig settings to warn anyone trying to build for this
platform of its pending deprecation in 2.2.0.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32fg soc.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32mg soc.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit relocates the exception vector table address range
configuration routine that was previously implemented as part of
Cortex-R architecture reset function to SoC platform-specific
initialisation routine.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Xilinx ZynqMP SoC embeds both Cortex-R "RPU" and Cortex-A "APU"
cores.
Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within the same project, the RPU and APU should be
considered separate platforms and handled accordingly.
This commit re-purposes the SOC_XILINX_ZYNQMP symbol as a helper symbol
indicating that Xilinx ZynqMP SoC is used, and adds a new symbol,
SOC_XILINX_ZYNQMP_RPU, for specifying the actual build target platform.
When Cortex-A support is added in the future, SOC_XILINX_ZYNQMP_APU
symbol should be added and used to conditionally handle APU-specific
code.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Rename the NXP FTM instances in the KE1xF SoC to PWM to match the
other SoCs/boards using the FlexTimer as PWM generator.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Make sure light sleep hook function is compile when needed
This solves linking error for shippable test that only enable
light sleep.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This patch adds a temporary workaround for the incorrect initialization
of the SystemCoreClock global variable that is done for the application
core of nRF5340 (see system_nrf5340_application.c) and that results in
k_busy_wait() producing delays of twice the requested time.
The problem is that the call to SystemCoreClockUpdate() that is done
at the end of SystemInit() correctly sets the value of SystemCoreClock
to reflect the hardware state after reset (HFCLK128M divided by 2),
but then the SystemCoreClock variable is initialized (by z_data_copy()
called from z_arm_prep_c()) to the __SYSTEM_CLOCK value that is defined
as 128000000. This in turn results in nrfx_coredep_delay_us() (used by
k_busy_wait() by default for nRF SoCs) delaying for twice the requested
number of microseconds.
The temporary workaround is to call SystemCoreClockUpdate() at a later
stage of the system initialization, in its nRF53 specific part.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The RTC peripheral found in the SAMD5x/SAME5x MCUs is very
simmilar to the one found in existing sam0 devices with only
a few changes to register names and the clock source selection.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.
There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The current GIC configuration scheme is designed to support only one
specific type and version of GIC (i.e. GIC-400 that implements the
GICv2 interface).
This commit adds a set of GIC version configuration symbols that can
be selected by the SoC configuration to specify which version of GIC
interface is implemented in the SoC.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
nrf51 and nrf52 by default was enabling temperature sensor if sensor
API was enabled. It was causing code size increase even when
temperature sensor was not touched by anyone. Removed default enabling
of temperature sensor for both series.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>