zephyr/soc/arm
Stephanos Ioannidis d32546fb7e soc: arm: atmel_sam: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
..
arm dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
atmel_sam soc: arm: atmel_sam: Select CPU DWT feature symbol 2020-01-20 14:05:47 +01:00
atmel_sam0 soc: arm: atmel_sam: Select CPU DWT feature symbol 2020-01-20 14:05:47 +01:00
common/cortex_m arch: arm: Move ARM code to AArch32 sub-directory 2019-12-20 11:40:59 -05:00
cypress arch: arm: Move ARM code to AArch32 sub-directory 2019-12-20 11:40:59 -05:00
microchip_mec soc: arm: microchip: Allow to support only light sleep 2020-01-03 12:04:00 -08:00
nordic_nrf dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
nxp_imx dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
nxp_kinetis dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
nxp_lpc dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
silabs_exx32 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
st_stm32 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf} 2020-01-17 17:57:59 +01:00
ti_lm3s6965 arch: arm: Move ARM code to AArch32 sub-directory 2019-12-20 11:40:59 -05:00
ti_simplelink arm: Removed support for CC2650 2020-01-18 09:27:55 -06:00
xilinx_zynqmp soc: arm: xilinx_zynqmp: Relocate platform-specific initialisation. 2020-01-10 10:34:17 +01:00
CMakeLists.txt soc: arm: framework for common fixed MPU region configuration 2019-12-09 11:51:14 -05:00
Kconfig soc: arm: framework for common fixed MPU region configuration 2019-12-09 11:51:14 -05:00