soc: arm: xilinx_zynqmp: Refactor for multi-arch support.

The Xilinx ZynqMP SoC embeds both Cortex-R "RPU" and Cortex-A "APU"
cores.

Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within the same project, the RPU and APU should be
considered separate platforms and handled accordingly.

This commit re-purposes the SOC_XILINX_ZYNQMP symbol as a helper symbol
indicating that Xilinx ZynqMP SoC is used, and adds a new symbol,
SOC_XILINX_ZYNQMP_RPU, for specifying the actual build target platform.

When Cortex-A support is added in the future, SOC_XILINX_ZYNQMP_APU
symbol should be added and used to conditionally handle APU-specific
code.

For more details, refer to the issue #20217.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2019-11-01 03:19:54 +09:00 committed by Johan Hedberg
commit 09ee834b4c
6 changed files with 22 additions and 6 deletions

View file

@ -3,4 +3,4 @@
config BOARD_QEMU_CORTEX_R5
bool "Cortex-R5 Emulation (QEMU)"
depends on SOC_XILINX_ZYNQMP
depends on SOC_XILINX_ZYNQMP_RPU

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@ -1,5 +1,5 @@
CONFIG_ARM=y
CONFIG_SOC_XILINX_ZYNQMP=y
CONFIG_SOC_XILINX_ZYNQMP_RPU=y
CONFIG_BOARD_QEMU_CORTEX_R5=y
CONFIG_XIP=n

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@ -0,0 +1,5 @@
# Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
# SPDX-License-Identifier: Apache-2.0
config SOC_XILINX_ZYNQMP
bool

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@ -1,4 +1,5 @@
# Copyright (c) 2019 Lexmark International, Inc.
# Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
# SPDX-License-Identifier: Apache-2.0
if SOC_XILINX_ZYNQMP
@ -6,6 +7,8 @@ if SOC_XILINX_ZYNQMP
config SOC
default "xilinx_zynqmp"
if SOC_XILINX_ZYNQMP_RPU
config NUM_IRQS
# must be >= the highest interrupt number used
# - include the UART interrupts
@ -23,6 +26,8 @@ config NUM_2ND_LEVEL_AGGREGATORS
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 12000000
endif # SOC_XILINX_ZYNQMP_RPU
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
@ -32,4 +37,4 @@ config FLASH_SIZE
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
endif
endif # SOC_XILINX_ZYNQMP

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@ -1,9 +1,11 @@
# Copyright (c) 2019 Lexmark International, Inc.
# Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
# SPDX-License-Identifier: Apache-2.0
config SOC_XILINX_ZYNQMP
bool "Xilinx ZynqMP"
config SOC_XILINX_ZYNQMP_RPU
bool "Xilinx ZynqMP RPU"
select CPU_CORTEX_R5
select SOC_XILINX_ZYNQMP
select GIC_V1
select MULTI_LEVEL_INTERRUPTS
select 2ND_LEVEL_INTERRUPTS

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@ -1,8 +1,12 @@
/*
* Copyright (c) 2019 Lexmark International, Inc.
* Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#include <autoconf.h>
#if defined(CONFIG_SOC_XILINX_ZYNQMP_RPU)
#include <arch/arm/aarch32/cortex_r/scripts/linker.ld>
#endif