michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: arm: nxp: kinetis: k6x: move clock defines

Browse source 
Rename the clock defines from k64 to K6X. This allows
inclusion of K66 series MCU's support without much
re-defines. Clock divider defaults to K64 series.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
This commit is contained in:
Parthiban Nallathambi 2020-02-26 12:17:38 +01:00 • committed by Maureen Helm
commit 7dcffb6ccd
3 changed files with 17 additions and 17 deletions
Download patch file Download diff file Expand all files Collapse all files

24
soc/arm/nxp_kinetis/k6x/Kconfig.soc
View file

@ -69,32 +69,32 @@ config SOC_PART_NUMBER_KINETIS_K6X
that you should not set directly. The part number selection choice defines
the default value for this string.
config K64_CORE_CLOCK_DIVIDER
int "Freescale K64 core clock divider"
config K6X_CORE_CLOCK_DIVIDER
int "Freescale K6X core clock divider"
default 1
help
This option specifies the divide value for the K64 processor core clock
This option specifies the divide value for the K6X processor core clock
from the system clock.
config K64_BUS_CLOCK_DIVIDER
int "Freescale K64 bus clock divider"
config K6X_BUS_CLOCK_DIVIDER
int "Freescale K6X bus clock divider"
default 2
help
This option specifies the divide value for the K64 bus clock from the
This option specifies the divide value for the K6X bus clock from the
system clock.
config K64_FLEXBUS_CLOCK_DIVIDER
int "Freescale K64 FlexBus clock divider"
config K6X_FLEXBUS_CLOCK_DIVIDER
int "Freescale K6X FlexBus clock divider"
default 3
help
This option specifies the divide value for the K64 FlexBus clock from the
This option specifies the divide value for the K6X FlexBus clock from the
system clock.
config K64_FLASH_CLOCK_DIVIDER
int "Freescale K64 flash clock divider"
config K6X_FLASH_CLOCK_DIVIDER
int "Freescale K6X flash clock divider"
default 5
help
This option specifies the divide value for the K64 flash clock from the
This option specifies the divide value for the K6X flash clock from the
system clock.
endif # SOC_SERIES_KINETIS_K6X

8
soc/arm/nxp_kinetis/k6x/soc.c
View file

@ -65,10 +65,10 @@ static const mcg_pll_config_t pll0Config = {
static const sim_clock_config_t simConfig = {
.pllFllSel = PLLFLLSEL_MCGPLLCLK, /* PLLFLLSEL select PLL. */
.er32kSrc = ER32KSEL_RTC, /* ERCLK32K selection, use RTC. */
.clkdiv1 = SIM_CLKDIV1_OUTDIV1(CONFIG_K64_CORE_CLOCK_DIVIDER - 1) |
SIM_CLKDIV1_OUTDIV2(CONFIG_K64_BUS_CLOCK_DIVIDER - 1) |
SIM_CLKDIV1_OUTDIV3(CONFIG_K64_FLEXBUS_CLOCK_DIVIDER - 1) |
SIM_CLKDIV1_OUTDIV4(CONFIG_K64_FLASH_CLOCK_DIVIDER - 1),
.clkdiv1 = SIM_CLKDIV1_OUTDIV1(CONFIG_K6X_CORE_CLOCK_DIVIDER - 1) |
SIM_CLKDIV1_OUTDIV2(CONFIG_K6X_BUS_CLOCK_DIVIDER - 1) |
SIM_CLKDIV1_OUTDIV3(CONFIG_K6X_FLEXBUS_CLOCK_DIVIDER - 1) |
SIM_CLKDIV1_OUTDIV4(CONFIG_K6X_FLASH_CLOCK_DIVIDER - 1),
};
/**

2
soc/arm/nxp_kinetis/k6x/soc.h
View file

@ -21,7 +21,7 @@
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(120)
#define BUSCLK_DEFAULT_IOSC_HZ (SYSCLK_DEFAULT_IOSC_HZ / \
CONFIG_K64_BUS_CLOCK_DIVIDER)
CONFIG_K6X_BUS_CLOCK_DIVIDER)
/* address bases */