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kconfig: Replace non-defconfig single-symbol 'if's with 'depends on'

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Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.

Will do the defconfigs separately in case there are any complaints
there.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit is contained in:
Ulf Magnusson 2020-02-09 22:26:07 +01:00 • committed by Kumar Gala
commit 378d6b137a
74 changed files with 123 additions and 388 deletions
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10
arch/Kconfig
View file

@ -274,18 +274,15 @@ config DYNAMIC_OBJECTS
API call, or when the number of references to that object drops to
zero.
if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
config NOCACHE_MEMORY
bool "Support for uncached memory"
depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT
help
Add a "nocache" read-write memory section that is configured to
not be cached. This memory section can be used to perform DMA
transfers when cache coherence issues are not optimal or can not
be solved using cache maintenance operations.
endif # ARCH_HAS_NOCACHE_MEMORY_SUPPORT
menu "Interrupt Configuration"
config DYNAMIC_INTERRUPTS
@ -520,16 +517,13 @@ menuconfig FLOAT
Disabling this option means that any thread that uses a
floating point register will get a fatal exception.
if FLOAT
config FP_SHARING
bool "Floating point register sharing"
depends on FLOAT
help
This option allows multiple threads to use the floating point
registers.
endif # FLOAT
config ARCH
string
help

5
arch/arm/core/aarch32/cortex_m/mpu/Kconfig
View file

@ -60,10 +60,9 @@ config MPU_STACK_GUARD
help
Enable Thread Stack Guards via MPU
if MPU_STACK_GUARD
config MPU_STACK_GUARD_MIN_SIZE_FLOAT
int
depends on MPU_STACK_GUARD
depends on FP_SHARING
default 128
help
@ -75,8 +74,6 @@ config MPU_STACK_GUARD_MIN_SIZE_FLOAT
is only stacked in sharing FP registers mode, therefore, the
option is applicable only when FP_SHARING is selected.
endif # MPU_STACK_GUARD
config MPU_ALLOW_FLASH_WRITE
bool "Add MPU access to write to flash"
help

5
boards/arc/em_starterkit/Kconfig
View file

@ -3,11 +3,10 @@
# Copyright (c) 2017 Synopsys, Inc. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
if BOARD_EM_STARTERKIT
choice
prompt "Board Firmware Version"
default BOARD_EM_STARTERKIT_R23
depends on BOARD_EM_STARTERKIT
config BOARD_EM_STARTERKIT_R22
bool "2.2"
@ -16,5 +15,3 @@ choice
bool "2.3"
endchoice
endif

5
boards/arm/bl652_dvk/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2019 Laird Connectivity
# SPDX-License-Identifier: Apache-2.0
if BOARD_BL652_DVK
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_BL652_DVK
depends on BOARD_BL652_DVK

5
boards/arm/bl654_dvk/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2019 Laird Connectivity
# SPDX-License-Identifier: Apache-2.0
if BOARD_BL654_DVK
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_BL654_DVK
depends on BOARD_BL654_DVK

5
boards/arm/decawave_dwm1001_dev/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2019 Stéphane D'Alu
# SPDX-License-Identifier: Apache-2.0
if BOARD_DECAWAVE_DWM1001_DEV
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_DECAWAVE_DWM1001_DEV
depends on BOARD_DECAWAVE_DWM1001_DEV

5
boards/arm/degu_evk/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2019 Atmark Techno, Inc.
# SPDX-License-Identifier: Apache-2.0
if BOARD_DEGU_EVK
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_DEGU_EVK
depends on BOARD_DEGU_EVK

5
boards/arm/efm32gg_stk3701a/Kconfig
View file

@ -3,14 +3,11 @@
# Copyright (c) 2019 Oane Kingma
# SPDX-License-Identifier: Apache-2.0
if BOARD_EFM32GG_STK3701A
config BOARD_INIT_PRIORITY
int
default KERNEL_INIT_PRIORITY_DEFAULT
depends on BOARD_EFM32GG_STK3701A
depends on GPIO
help
Board initialization priority. This must be bigger than
GPIO_GECKO_COMMON_INIT_PRIORITY.
endif # BOARD_EFM32GG_STK3701A

5
boards/arm/efm32hg_slstk3400a/Kconfig
View file

@ -4,14 +4,11 @@
# Copyright (c) 2018 Marcio Montenegro
# SPDX-License-Identifier: Apache-2.0
if BOARD_EFM32HG_SLSTK3400A
config BOARD_INIT_PRIORITY
int
default KERNEL_INIT_PRIORITY_DEFAULT
depends on BOARD_EFM32HG_SLSTK3400A
depends on GPIO
help
Board initialization priority. This must be bigger than
GPIO_GECKO_COMMON_INIT_PRIORITY.
endif # BOARD_EFM32HG_SLSTK3400A

5
boards/arm/efm32pg_stk3402a/Kconfig
View file

@ -3,14 +3,11 @@
# Copyright (c) 2018 Christian Taedcke
# SPDX-License-Identifier: Apache-2.0
if BOARD_EFM32PG_STK3402A || BOARD_EFM32PG_STK3402A_JG
config BOARD_INIT_PRIORITY
int
default KERNEL_INIT_PRIORITY_DEFAULT
depends on BOARD_EFM32PG_STK3402A || BOARD_EFM32PG_STK3402A_JG
depends on GPIO
help
Board initialization priority. This must be bigger than
GPIO_GECKO_COMMON_INIT_PRIORITY.
endif # BOARD_EFM32PG_STK3402A || BOARD_EFM32PG_STK3402A_JG

5
boards/arm/efm32wg_stk3800/Kconfig
View file

@ -3,14 +3,11 @@
# Copyright (c) 2017 Christian Taedcke
# SPDX-License-Identifier: Apache-2.0
if BOARD_EFM32WG_STK3800
config BOARD_INIT_PRIORITY
int
default KERNEL_INIT_PRIORITY_DEFAULT
depends on BOARD_EFM32WG_STK3800
depends on GPIO
help
Board initialization priority. This must be bigger than
GPIO_GECKO_COMMON_INIT_PRIORITY.
endif # BOARD_EFM32WG_STK3800

5
boards/arm/efr32_slwstk6061a/Kconfig
View file

@ -3,14 +3,11 @@
# Copyright (c) 2018 Christian Taedcke
# SPDX-License-Identifier: Apache-2.0
if BOARD_EFR32_SLWSTK6061A
config BOARD_INIT_PRIORITY
int
default KERNEL_INIT_PRIORITY_DEFAULT
depends on BOARD_EFR32_SLWSTK6061A
depends on GPIO
help
Board initialization priority. This must be bigger than
GPIO_GECKO_COMMON_INIT_PRIORITY.
endif # BOARD_EFR32_SLWSTK6061A

5
boards/arm/efr32mg_sltb004a/Kconfig
View file

@ -3,13 +3,10 @@
# Copyright (c) 2018 Christian Taedcke, Diego Sueiro
# SPDX-License-Identifier: Apache-2.0
if BOARD_EFR32MG_SLTB004A
config BOARD_INIT_PRIORITY
int
default KERNEL_INIT_PRIORITY_DEFAULT
depends on BOARD_EFR32MG_SLTB004A
help
Board initialization priority. This must be bigger than
GPIO_GECKO_COMMON_INIT_PRIORITY.
endif # BOARD_EFR32MG_SLTB004A

5
boards/arm/hexiwear_k64/Kconfig
View file

@ -3,9 +3,6 @@
# Copyright (c) 2017, NXP
# SPDX-License-Identifier: Apache-2.0
if BOARD_HEXIWEAR_K64
config BATTERY_SENSE
bool "Enable the battery sense circuit"
endif # BOARD_HEXIWEAR_K64
depends on BOARD_HEXIWEAR_K64

5
boards/arm/nrf52811_pca10056/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2019 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52811_PCA10056
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52811_PCA10056
depends on BOARD_NRF52811_PCA10056

5
boards/arm/nrf52832_mdk/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 makerdiary.com.
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52832_MDK
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52832_MDK
depends on BOARD_NRF52832_MDK

5
boards/arm/nrf52833_pca10100/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2019 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52833_PCA10100
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52833_PCA10100
depends on BOARD_NRF52833_PCA10100

5
boards/arm/nrf52840_blip/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 Electronut Labs
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52840_BLIP
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52840_BLIP
depends on BOARD_NRF52840_BLIP

5
boards/arm/nrf52840_mdk/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 makerdiary.com
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52840_MDK
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52840_MDK
depends on BOARD_NRF52840_MDK

5
boards/arm/nrf52840_papyr/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 Electronut Labs
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52840_PAPYR
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52840_PAPYR
depends on BOARD_NRF52840_PAPYR

5
boards/arm/nrf52840_pca10056/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2016 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52840_PCA10056
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52840_PCA10056
depends on BOARD_NRF52840_PCA10056

5
boards/arm/nrf52840_pca10090/Kconfig
View file

@ -198,10 +198,9 @@ config BOARD_PCA10090_NRF52840_RESET
The GPIO line may only be one of the first 6 MCU interface pins.
The line is active high.
if BOARD_PCA10090_NRF52840_RESET
choice
prompt "Pin used for reset"
depends on BOARD_PCA10090_NRF52840_RESET
comment "nRF52840 pins"
@ -249,8 +248,6 @@ config BOARD_PCA10090_NRF52840_RESET_P1_02
endchoice
endif # BOARD_PCA10090_NRF52840_RESET
module = BOARD_PCA10090
module-str = Board Control
source "subsys/logging/Kconfig.template.log_config"

5
boards/arm/nrf52_adafruit_feather/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 LEDCity AG
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52_ADAFRUIT_FEATHER
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52_ADAFRUIT_FEATHER
depends on BOARD_NRF52_ADAFRUIT_FEATHER

5
boards/arm/nrf52_pca10040/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2016 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF52_PCA10040
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_NRF52_PCA10040
depends on BOARD_NRF52_PCA10040

6
boards/arm/nrf5340_dk_nrf5340/Kconfig.board
View file

@ -13,10 +13,6 @@ config BOARD_NRF5340_DK_NRF5340_CPUAPPNS
endif # SOC_NRF5340_CPUAPP_QKAA
if SOC_NRF5340_CPUNET_QKAA
config BOARD_NRF5340_DK_NRF5340_CPUNET
bool "nRF5340 DK NRF5340 Network MCU"
endif # SOC_NRF5340_CPUNET_QKAA
depends on SOC_NRF5340_CPUNET_QKAA

10
boards/arm/nrf9160_pca10090/Kconfig
View file

@ -3,25 +3,19 @@
# Copyright (c) 2018 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF9160_PCA10090 || BOARD_NRF9160_PCA10090NS
config BOARD_NRF52840_GPIO_RESET
bool "Use nRF52840 PCA10090 GPIO reset pin"
default y if BT_H4
depends on BOARD_NRF9160_PCA10090 || BOARD_NRF9160_PCA10090NS
help
Use a GPIO pin to reset the nRF52840 controller and let it wait until all
bytes traveling to the H4 device have been received and drained, thus
ensuring communication can begin correctly.
if BOARD_NRF52840_GPIO_RESET
config BOARD_NRF52840_GPIO_RESET_PIN
int "Reset pin"
range 17 23
default 23
depends on BOARD_NRF52840_GPIO_RESET
help
GPIO pin on the nRF9160 used to reset the nRF52840.
endif
endif # BOARD_NRF9160_PCA10090 || BOARD_NRF9160_PCA10090NS

5
boards/arm/particle_argon/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 Matthias Boesl
# SPDX-License-Identifier: Apache-2.0
if BOARD_PARTICLE_ARGON
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_PARTICLE_ARGON
depends on BOARD_PARTICLE_ARGON

5
boards/arm/particle_boron/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 Peter Bigot Consulting, LLC
# SPDX-License-Identifier: Apache-2.0
if BOARD_PARTICLE_BORON
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_PARTICLE_BORON
depends on BOARD_PARTICLE_BORON

5
boards/arm/particle_xenon/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018 Endre Karlson
# SPDX-License-Identifier: Apache-2.0
if BOARD_PARTICLE_XENON
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_PARTICLE_XENON
depends on BOARD_PARTICLE_XENON

5
boards/arm/reel_board/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2018-2019 PHYTEC Messtechnik GmbH
# SPDX-License-Identifier: Apache-2.0
if BOARD_REEL_BOARD || BOARD_REEL_BOARD_V2
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
endif # BOARD_REEL_BOARD || BOARD_REEL_BOARD_V2
depends on BOARD_REEL_BOARD || BOARD_REEL_BOARD_V2

5
drivers/bluetooth/hci/Kconfig
View file

@ -99,11 +99,10 @@ config BT_SPI_BLUENRG
endif # BT_SPI
if BT_RPMSG
config BT_RPMSG_NRF53
bool "nRF53 configuration of RPMsg"
default y if (BOARD_NRF5340_DK_NRF5340_CPUAPP || BOARD_NRF5340_DK_NRF5340_CPUAPPNS)
depends on BT_RPMSG
select IPM
select IPM_NRFX
select IPM_MSG_CH_1_ENABLE
@ -126,5 +125,3 @@ config BT_RPMSG_NRF53_RX_PRIO
default 8
endif # BT_RPMSG_NRF53
endif # BT_RPMSG

4
drivers/entropy/Kconfig
View file

@ -26,13 +26,11 @@ config ENTROPY_HAS_DRIVER
This is an option to be enabled by individual entropy driver
to signal that there is a true entropy driver.
if !HAS_DTS_ENTROPY
config ENTROPY_NAME
string "Entropy Device Name"
default "ENTROPY_0"
depends on !HAS_DTS_ENTROPY
help
Specify the device name to be used for the ENTROPY driver.
endif
endif

5
drivers/entropy/Kconfig.nrf5
View file

@ -11,10 +11,9 @@ config ENTROPY_NRF_FORCE_ALT
This option can be enabled to force an alternative implementation
of the entropy driver.
if !ENTROPY_NRF_FORCE_ALT
menuconfig ENTROPY_NRF5_RNG
bool "nRF5 RNG driver"
depends on !ENTROPY_NRF_FORCE_ALT
depends on HAS_HW_NRF_RNG
select ENTROPY_HAS_DRIVER
default y
@ -78,5 +77,3 @@ config ENTROPY_NRF5_PRI
nRF5X RNG IRQ priority.
endif # ENTROPY_NRF5_RNG
endif # !ENTROPY_NRF_FORCE_ALT

7
drivers/ethernet/Kconfig.liteeth
View file

@ -4,10 +4,9 @@
menuconfig ETH_LITEETH
bool "LiteEth Ethernet core driver"
if ETH_LITEETH
config ETH_LITEETH_0
bool "LiteEth Ethernet port 0"
depends on ETH_LITEETH
if ETH_LITEETH_0
@ -15,7 +14,7 @@ config ETH_LITEETH_0_IRQ_PRI
int "LiteEth interrupt priority"
default 0
help
IRQ priority
IRQ priority
config ETH_LITEETH_0_RANDOM_MAC
bool "Random MAC address"
@ -24,5 +23,3 @@ config ETH_LITEETH_0_RANDOM_MAC
Generate a random MAC address dynamically.
endif # ETH_LITEETH_0
endif # ETH_LITEETH

5
drivers/ethernet/Kconfig.native_posix
View file

@ -101,11 +101,10 @@ config ETH_NATIVE_POSIX_VLAN_TAG_STRIP
Rx Ethernet frames and sets tag information in net packet
metadata.
if ! ETH_NATIVE_POSIX_RANDOM_MAC
config ETH_NATIVE_POSIX_MAC_ADDR
string "MAC address for the interface"
default ""
depends on !ETH_NATIVE_POSIX_RANDOM_MAC
help
Specify a MAC address for the ethernet interface in the form of
six hex 8-bit chars separated by colons (e.g.:
@ -113,6 +112,4 @@ config ETH_NATIVE_POSIX_MAC_ADDR
means the code will make 00:00:5E:00:53:XX, where XX will be
random.
endif
endif # ETH_NATIVE_POSIX

24
drivers/gpio/Kconfig.dw
View file

@ -34,12 +34,11 @@ config GPIO_DW_0
help
Include Designware GPIO driver
if !HAS_DTS
config GPIO_DW_0_NAME
string "Driver name"
depends on GPIO_DW_0
depends on !HAS_DTS
default "GPIO_0"
endif
config GPIO_DW_0_CLOCK_GATE_SUBSYS
int "Clock controller's subsystem"
@ -65,25 +64,23 @@ config GPIO_DW_0_IRQ_SHARED
endchoice
if !HAS_DTS
config GPIO_DW_0_IRQ_PRI
int "Controller interrupt priority"
depends on GPIO_DW_0 && GPIO_DW_0_IRQ_DIRECT
depends on !HAS_DTS
help
IRQ priority
endif
config GPIO_DW_1
bool "Designware GPIO block 1"
help
Include Designware GPIO driver
if !HAS_DTS
config GPIO_DW_1_NAME
string "Driver name"
depends on GPIO_DW_1
depends on !HAS_DTS
default "GPIO_1"
endif
config GPIO_DW_1_CLOCK_GATE_SUBSYS
int "Clock controller's subsystem"
@ -109,25 +106,23 @@ config GPIO_DW_1_IRQ_SHARED
endchoice
if !HAS_DTS
config GPIO_DW_1_IRQ_PRI
int "Controller interrupt priority"
depends on GPIO_DW_1 && GPIO_DW_1_IRQ_DIRECT
depends on !HAS_DTS
help
IRQ priority
endif
config GPIO_DW_2
bool "Designware GPIO block 1"
help
Include Designware GPIO driver
if !HAS_DTS
config GPIO_DW_2_NAME
string "Driver name"
depends on GPIO_DW_2
depends on !HAS_DTS
default "GPIO_2"
endif
config GPIO_DW_2_CLOCK_GATE_SUBSYS
int "Clock controller's subsystem"
@ -153,25 +148,23 @@ config GPIO_DW_2_IRQ_SHARED
endchoice
if !HAS_DTS
config GPIO_DW_2_IRQ_PRI
int "Controller interrupt priority"
depends on GPIO_DW_2 && GPIO_DW_2_IRQ_DIRECT
depends on !HAS_DTS
help
IRQ priority
endif
config GPIO_DW_3
bool "Designware GPIO block 1"
help
Include Designware GPIO driver
if !HAS_DTS
config GPIO_DW_3_NAME
string "Driver name"
depends on GPIO_DW_3
depends on !HAS_DTS
default "GPIO_3"
endif
config GPIO_DW_3_CLOCK_GATE_SUBSYS
int "Clock controller's subsystem"
@ -197,12 +190,11 @@ config GPIO_DW_3_IRQ_SHARED
endchoice
if !HAS_DTS
config GPIO_DW_3_IRQ_PRI
int "Controller interrupt priority"
depends on GPIO_DW_3 && GPIO_DW_3_IRQ_DIRECT
depends on !HAS_DTS
help
IRQ priority
endif
endif # GPIO_DW

5
drivers/gpio/Kconfig.ht16k33
View file

@ -15,13 +15,10 @@ menuconfig GPIO_HT16K33
controller drivers, each supporting GPIO callbacks for
keyscan event notifications.
if GPIO_HT16K33
config GPIO_HT16K33_INIT_PRIORITY
int "Driver init priority"
default 99
depends on GPIO_HT16K33
help
Device driver initialization priority. This driver must be
initialized after the HT16K33 LED driver.
endif # GPIO_HT16K33

5
drivers/gpio/Kconfig.intel
View file

@ -9,11 +9,10 @@ menuconfig GPIO_INTEL_APL
help
Enable driver for Intel Apollo Lake SoC GPIO
if GPIO_INTEL_APL
config GPIO_INTEL_APL_CHECK_PERMS
bool "Check permissions before manipulating GPIO"
default y
depends on GPIO_INTEL_APL
help
This option enables the checks to make sure the GPIO
pin can be manipulated. Only if the pin is owned by
@ -21,5 +20,3 @@ config GPIO_INTEL_APL_CHECK_PERMS
the driver allows manipulating the pin.
Say y if unsure.
endif # GPIO_INTEL_APL

5
drivers/gpio/Kconfig.lmp90xxx
View file

@ -15,13 +15,10 @@ menuconfig GPIO_LMP90XXX
The GPIO port of the LMP90xxx (D6 to D0) is exposed as a
GPIO controller driver with read/write support.
if GPIO_LMP90XXX
config GPIO_LMP90XXX_INIT_PRIORITY
int "Driver init priority"
default 99
depends on GPIO_LMP90XXX
help
Device driver initialization priority. This driver must be
initialized after the LMP90xxx ADC driver.
endif # GPIO_LMP90XXX

5
drivers/gpio/Kconfig.pca95xx
View file

@ -9,12 +9,9 @@ menuconfig GPIO_PCA95XX
help
Enable driver for PCA95XX I2C-based GPIO chip.
if GPIO_PCA95XX
config GPIO_PCA95XX_INIT_PRIORITY
int "Init priority"
default 70
depends on GPIO_PCA95XX
help
Device driver initialization priority.
endif # GPIO_PCA95XX

5
drivers/gpio/Kconfig.stm32
View file

@ -45,10 +45,9 @@ config GPIO_STM32_PORTJ
config GPIO_STM32_PORTK
bool "Enable GPIO port K support"
if SOC_SERIES_STM32F1X
choice GPIO_STM32_SWJ
prompt "Serial wire JTAG configuration"
depends on SOC_SERIES_STM32F1X
config GPIO_STM32_SWJ_ENABLE
depends on !(SOC_STM32F103XE && SPI_3)
@ -66,6 +65,4 @@ config GPIO_STM32_SWJ_DISABLE
endchoice
endif # SOC_SERIES_STM32F1X
endif # GPIO_STM32

5
drivers/i2c/Kconfig.dw
View file

@ -12,10 +12,7 @@ menuconfig I2C_DW
help
Enable the Design Ware I2C driver
if I2C_DW
config I2C_DW_CLOCK_SPEED
int "Set the clock speed for I2C"
default 32
endif # I2C_DW
depends on I2C_DW

68
drivers/i2c/Kconfig.nrfx
View file

@ -14,17 +14,17 @@ menuconfig I2C_NRFX
if I2C_NRFX
# In most Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals as well).
# In nRF52810 though, there are only single instances of these peripherals
# and they are arranged in a different way, so this limitation does not apply.
if I2C_0 && (SOC_NRF52810 || \
(!SPI_0 && !(SOC_SERIES_NRF91X && UART_0_NRF_UARTE)) || \
(!SPI_0 && !(SOC_SERIES_NRF53X && UART_0_NRF_UARTE)))
choice I2C_0_NRF_TYPE
prompt "I2C Port 0 Driver type"
# In most Nordic SoCs, SPI and TWI peripherals with the same instance
# number share certain resources and therefore cannot be used at the
# same time (in nRF91 and nRF53 Series this limitation concerns UART
# peripherals as well). In nRF52810 though, there are only single
# instances of these peripherals and they are arranged in a different
# way, so this limitation does not apply.
depends on I2C_0 && (SOC_NRF52810 || \
(!SPI_0 && !(SOC_SERIES_NRF91X && UART_0_NRF_UARTE)) || \
(!SPI_0 && !(SOC_SERIES_NRF53X && UART_0_NRF_UARTE)))
config I2C_0_NRF_TWI
bool "nRF TWI 0"
@ -44,17 +44,15 @@ config I2C_0_NRF_TWIM
endchoice
endif # I2C_0 && (SOC_NRF52810 || ...
# In Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals as well).
if I2C_1 && !SPI_1 && \
!(SOC_SERIES_NRF91X && UART_1_NRF_UARTE) && \
!(SOC_SERIES_NRF53X && UART_1_NRF_UARTE)
choice I2C_1_NRF_TYPE
prompt "I2C Port 1 Driver type"
# In Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals
# as well).
depends on I2C_1 && !SPI_1 && \
!(SOC_SERIES_NRF91X && UART_1_NRF_UARTE) && \
!(SOC_SERIES_NRF53X && UART_1_NRF_UARTE)
config I2C_1_NRF_TWI
bool "nRF TWI 1"
@ -74,17 +72,15 @@ config I2C_1_NRF_TWIM
endchoice
endif # I2C_1 && !SPI_1 && !(SOC_SERIES_NRF91X && UART_1_NRF_UARTE) && ...
# In Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals as well).
if I2C_2 && !SPI_2 && \
!(SOC_SERIES_NRF91X && UART_2_NRF_UARTE) && \
!(SOC_SERIES_NRF53X && UART_2_NRF_UARTE)
choice I2C_2_NRF_TYPE
prompt "I2C Port 2 Driver type"
# In Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals
# as well).
depends on I2C_2 && !SPI_2 && \
!(SOC_SERIES_NRF91X && UART_2_NRF_UARTE) && \
!(SOC_SERIES_NRF53X && UART_2_NRF_UARTE)
config I2C_2_NRF_TWIM
bool "nRF TWIM 2"
@ -97,17 +93,15 @@ config I2C_2_NRF_TWIM
endchoice
endif # I2C_2 && !SPI_2 && !(SOC_SERIES_NRF91X && UART_2_NRF_UARTE) && ...
# In Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals as well).
if I2C_3 && !SPI_3 && \
!(SOC_SERIES_NRF91X && UART_3_NRF_UARTE) && \
!(SOC_SERIES_NRF53X && UART_3_NRF_UARTE)
choice I2C_3_NRF_TYPE
prompt "I2C Port 3 Driver type"
# In Nordic SoCs, SPI and TWI peripherals with the same instance number
# share certain resources and therefore cannot be used at the same time
# (in nRF91 and nRF53 Series this limitation concerns UART peripherals
# as well).
depends on I2C_3 && !SPI_3 && \
!(SOC_SERIES_NRF91X && UART_3_NRF_UARTE) && \
!(SOC_SERIES_NRF53X && UART_3_NRF_UARTE)
config I2C_3_NRF_TWIM
bool "nRF TWIM 3"
@ -120,6 +114,4 @@ config I2C_3_NRF_TWIM
endchoice
endif # I2C_3 && !SPI_3 && !(SOC_SERIES_NRF91X && UART_3_NRF_UARTE) && ...
endif # I2C_NRFX

5
drivers/i2c/Kconfig.sam0
View file

@ -1,11 +1,10 @@
# Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_SAM0
menuconfig I2C_SAM0
bool "SAM0 series I2C SERCOM driver"
default y
depends on SOC_FAMILY_SAM0
help
Enable the SAM0 series SERCOM I2C driver.
@ -18,5 +17,3 @@ config I2C_SAM0_DMA_DRIVEN
DMA driven mode requires fewer interrupts to handle the
transaction and ensures that high speed modes are not delayed
by data reloading.
endif # SOC_FAMILY_SAM0

5
drivers/interrupt_controller/Kconfig.sam0
View file

@ -3,13 +3,10 @@
# Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_SAM0
config SAM0_EIC
bool "External Interrupt Controller (EIC) Driver for SAM0 series devices"
default y
depends on SOC_FAMILY_SAM0
help
Enable EIC driver for SAM0 series of devices. This is required for
GPIO interrupt support.
endif # SOC_FAMILY_SAM0

5
drivers/lora/Kconfig.sx1276
View file

@ -14,11 +14,10 @@ menuconfig LORA_SX1276
help
Enable LoRa driver for Semtech SX1276.
if LORA_SX1276
choice
prompt "SX1276 PA Output pin"
default PA_BOOST_PIN
depends on LORA_SX1276
help
Antenna connection type.
@ -33,5 +32,3 @@ config PA_BOOST_PIN
Antenna connected to PA_BOOST pin.
endchoice
endif # LORA_SX1276

5
drivers/pwm/Kconfig.dw
View file

@ -10,12 +10,9 @@ menuconfig PWM_DW
Care must be taken if one is also to use the timer feature, as
they both use the same set of registers.
if PWM_DW
config PWM_DW_0_DRV_NAME
string "DesignWare PWM Device Name"
default "PWM_0"
depends on PWM_DW
help
Specify the device name for the DesignWare PWM driver.
endif # PWM_DW

5
drivers/pwm/Kconfig.litex
View file

@ -11,12 +11,9 @@ menuconfig PWM_LITEX
help
Enable support for LiteX PWM driver
if PWM_LITEX
config PWM_LITEX_INIT_PRIORITY
int "Init priority"
default 70
depends on PWM_LITEX
help
PWM device driver initialization priority.
endif # PWM_LITEX

5
drivers/pwm/Kconfig.sifive
View file

@ -10,12 +10,9 @@ menuconfig PWM_SIFIVE
help
Enable the PWM driver for the SiFive Freedom platform
if PWM_SIFIVE
config PWM_SIFIVE_INIT_PRIORITY
int "Init Priority"
default KERNEL_INIT_PRIORITY_DEVICE
depends on PWM_SIFIVE
help
SiFive PWM Driver Initialization Priority
endif # PWM_SIFIVE

5
drivers/serial/Kconfig.mcux_flexcomm
View file

@ -11,11 +11,8 @@ menuconfig UART_MCUX_FLEXCOMM
help
Enable the MCUX USART driver.
if UART_MCUX_FLEXCOMM
config UART_MCUX_FLEXCOMM_0
bool "USART 0"
depends on UART_MCUX_FLEXCOMM
help
Enable USART 0.
endif # UART_MCUX_FLEXCOMM

5
drivers/serial/Kconfig.stm32
View file

@ -95,16 +95,13 @@ config UART_10
Enable support for UART10 port in the driver.
Say y here if you want to use UART10 device.
if SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32H7X || SOC_SERIES_STM32G4X
# --- low power port 1 ---
config LPUART_1
bool "Enable STM32 LPUART1 Port"
depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32H7X || SOC_SERIES_STM32G4X
help
Enable support for LPUART1 port in the driver.
Say y here if you want to use LPUART1 device.
endif # SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32G4X
endif # UART_STM32

15
drivers/serial/Kconfig.uart_sam
View file

@ -28,11 +28,10 @@ config UART_SAM_PORT_1
help
Enable UART1 at boot.
if UART_SAM_PORT_1
choice UART_SAME70_PORT_1_PIN_TX
prompt "TX pin"
depends on SOC_SERIES_SAME70
depends on UART_SAM_PORT_1
config UART_SAM_PORT_1_PIN_TX_PA4
bool "PA4"
@ -44,8 +43,6 @@ choice UART_SAME70_PORT_1_PIN_TX
bool "PD26"
endchoice
endif # UART_SAM_PORT_1
# ---------- Port 2 ----------
config UART_SAM_PORT_2
@ -62,11 +59,10 @@ config UART_SAM_PORT_3
help
Enable UART3 at boot
if UART_SAM_PORT_3
choice UART_SAME70_PORT_3_PIN_TX
prompt "TX pin"
depends on SOC_SERIES_SAME70
depends on UART_SAM_PORT_3
config UART_SAM_PORT_3_PIN_TX_PD30
bool "PD30"
@ -75,8 +71,6 @@ choice UART_SAME70_PORT_3_PIN_TX
bool "PD31"
endchoice
endif # UART_SAM_PORT_3
# ---------- Port 4 ----------
config UART_SAM_PORT_4
@ -85,11 +79,10 @@ config UART_SAM_PORT_4
help
Enable UART4 at boot
if UART_SAM_PORT_4
choice UART_SAME70_PORT_4_PIN_TX
prompt "TX pin"
depends on SOC_SERIES_SAME70
depends on UART_SAM_PORT_4
config UART_SAM_PORT_4_PIN_TX_PD3
bool "PD3"
@ -97,5 +90,3 @@ choice UART_SAME70_PORT_4_PIN_TX
config UART_SAM_PORT_4_PIN_TX_PD19
bool "PD19"
endchoice
endif # UART_SAM_PORT_4

45
drivers/spi/Kconfig
View file

@ -41,12 +41,11 @@ config SPI_0
help
Enable SPI controller port 0.
if SPI_0
config SPI_0_OP_MODES
int "Port 0 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_0
help
This sets the supported operation modes at runtime, by the SPI
port 0, where:
@ -54,19 +53,16 @@ config SPI_0_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_0
config SPI_1
bool "SPI port 1"
help
Enable SPI controller port 1.
if SPI_1
config SPI_1_OP_MODES
int "Port 1 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_1
help
This sets the supported operation modes at runtime, by the SPI
port 1, where:
@ -74,19 +70,16 @@ config SPI_1_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_1
config SPI_2
bool "SPI port 2"
help
Enable SPI controller port 2.
if SPI_2
config SPI_2_OP_MODES
int "Port 2 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_2
help
This sets the supported operation modes at runtime, by the SPI
port 2, where:
@ -94,19 +87,16 @@ config SPI_2_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_2
config SPI_3
bool "SPI port 3"
help
Enable SPI controller port 3.
if SPI_3
config SPI_3_OP_MODES
int "Port 3 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_3
help
This sets the supported operation modes at runtime, by the SPI
port 3, where:
@ -114,19 +104,16 @@ config SPI_3_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_3
config SPI_4
bool "SPI port 4"
help
Enable SPI controller port 4.
if SPI_4
config SPI_4_OP_MODES
int "Port 4 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_4
help
This sets the supported operation modes at runtime, by the SPI
port 4, where:
@ -134,19 +121,16 @@ config SPI_4_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_4
config SPI_5
bool "SPI port 5"
help
Enable SPI controller port 5.
if SPI_5
config SPI_5_OP_MODES
int "Port 5 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_5
help
This sets the supported operation modes at runtime, by the SPI
port 5, where:
@ -154,19 +138,16 @@ config SPI_5_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_5
config SPI_6
bool "SPI port 6"
help
Enable SPI controller port 6.
if SPI_6
config SPI_6_OP_MODES
int "Port 6 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_6
help
This sets the supported operation modes at runtime, by the SPI
port 6, where:
@ -174,19 +155,16 @@ config SPI_6_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_6
config SPI_7
bool "SPI port 7"
help
Enable SPI controller port 7.
if SPI_7
config SPI_7_OP_MODES
int "Port 7 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_7
help
This sets the supported operation modes at runtime, by the SPI
port 7, where:
@ -194,19 +172,16 @@ config SPI_7_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_7
config SPI_8
bool "SPI port 8"
help
Enable SPI controller port 8.
if SPI_8
config SPI_8_OP_MODES
int "Port 8 supported operation modes (master/slave/both)"
default 1
range 1 3
depends on SPI_8
help
This sets the supported operation modes at runtime, by the SPI
port 8, where:
@ -214,8 +189,6 @@ config SPI_8_OP_MODES
2 is SLAVE mode only
3 is both modes are available.
endif # SPI_8
source "drivers/spi/Kconfig.stm32"
source "drivers/spi/Kconfig.dw"

5
drivers/spi/Kconfig.nrfx
View file

@ -260,11 +260,10 @@ config SPI_4_NRF_RX_DELAY
endif # SPI_4
if NRFX_SPIM
config SPI_NRFX_RAM_BUFFER_SIZE
int "Size of RAM buffers for SPIM peripherals"
default 0
depends on NRFX_SPIM
help
SPIM peripherals cannot transmit data directly from flash. Therefore,
a buffer in RAM needs to be provided for each instance of SPI driver
@ -275,6 +274,4 @@ config SPI_NRFX_RAM_BUFFER_SIZE
supplying buffers located in flash to the driver, otherwise such
transfers will fail.
endif # NRFX_SPIM
endif # SPI_NRFX

5
drivers/spi/Kconfig.oc_simple
View file

@ -8,9 +8,6 @@ menuconfig SPI_OC_SIMPLE
help
Enable the Simple SPI controller
if SPI_OC_SIMPLE
config SPI_OC_SIMPLE_BUS_WIDTH
def_int 8
endif # SPI_OC_SIMPLE
depends on SPI_OC_SIMPLE

5
drivers/spi/Kconfig.sifive
View file

@ -9,11 +9,10 @@ menuconfig SPI_SIFIVE
help
Enable the SPI peripherals on SiFive Freedom processors
if SPI_SIFIVE
config SIFIVE_SPI_0_ROM
bool "SPI 0 is used to access SPI Flash ROM"
default y
depends on SPI_SIFIVE
help
If enabled, SPI 0 is reserved for accessing the SPI flash ROM and a
driver interface won't be instantiated for SPI 0.
@ -21,5 +20,3 @@ config SIFIVE_SPI_0_ROM
Beware disabling this option on HiFive 1! The SPI flash ROM is where the
program is stored, and if this driver initializes the interface for
peripheral control the FE310 will crash on boot.
endif # SPI_SIFIVE

5
modules/Kconfig.libmetal
View file

@ -6,12 +6,9 @@ menuconfig LIBMETAL
help
This option enables the libmetal HAL abstraction layer
if LIBMETAL
config LIBMETAL_SRC_PATH
string "libmetal library source path"
default "libmetal"
depends on LIBMETAL
help
This option specifies the path to the source for the libmetal library
endif # LIBMETAL

4
modules/Kconfig.loramac-node
View file

@ -14,8 +14,6 @@ config HAS_SEMTECH_RADIO_DRIVERS
help
This option enables the use of Semtech's Radio drivers
if HAS_SEMTECH_RADIO_DRIVERS
config HAS_SEMTECH_SX1276
bool
endif
depends on HAS_SEMTECH_RADIO_DRIVERS

2
modules/Kconfig.mbedtls
View file

@ -38,9 +38,7 @@ config MBEDTLS_CFG_FILE
special TLS usage, use available Kconfig options, or select an
alternative config.
if MBEDTLS_BUILTIN && MBEDTLS_CFG_FILE = "config-tls-generic.h"
rsource "Kconfig.tls-generic"
endif
config MBEDTLS_SSL_MAX_CONTENT_LEN
int "Max payload size for TLS protocol message"

1
modules/Kconfig.tls-generic
View file

@ -5,6 +5,7 @@
# SPDX-License-Identifier: Apache-2.0
menu "TLS configuration"
depends on MBEDTLS_BUILTIN && MBEDTLS_CFG_FILE = "config-tls-generic.h"
menu "Supported TLS version"

5
soc/arc/snps_emsdp/Kconfig
View file

@ -1,11 +1,10 @@
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
if SOC_ARC_EMSDP
choice
prompt "ARC EM Software Development Platform Core Selection"
default SOC_EMSDP_EM11D
depends on SOC_ARC_EMSDP
config SOC_EMSDP_EM4
bool "Synopsys ARC EM4 of EMSDP"
@ -42,5 +41,3 @@ config SOC_EMSDP_EM11D
select CPU_HAS_FPU
endchoice
endif # SOC_ARC_EMSDP

5
soc/arc/snps_emsk/Kconfig
View file

@ -2,11 +2,10 @@
# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
if SOC_EMSK
choice
prompt "ARC EM Starter Kit Core Selection"
default SOC_EMSK_EM7D
depends on SOC_EMSK
config SOC_EMSK_EM7D
bool "Synopsys ARC EM7D of EMSK"
@ -21,5 +20,3 @@ config SOC_EMSK_EM9D
select CPU_HAS_FPU
endchoice
endif # SOC_EMSK

5
soc/arc/snps_nsim/Kconfig
View file

@ -1,11 +1,10 @@
# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
if SOC_NSIM
choice
prompt "ARC nSIM SoC Selection"
default SOC_NSIM_EM
depends on SOC_NSIM
config SOC_NSIM_EM
bool "Synopsys ARC EM in nSIM"
@ -27,5 +26,3 @@ config SOC_NSIM_HS_SMP
select CPU_HAS_FPU
endchoice
endif # SOC_NSIM

5
soc/arm/silabs_exx32/efm32gg11b/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2019 Oane Kingma
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFM32GG11B
config SOC_PART_NUMBER_EFM32GG11B820F2048GL192
bool
endif # SOC_SERIES_EFM32GG11B
depends on SOC_SERIES_EFM32GG11B

5
soc/arm/silabs_exx32/efm32hg/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2018 Marcio Montenegro
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFM32HG
config SOC_PART_NUMBER_EFM32HG322F64
bool
endif # SOC_SERIES_EFM32HG
depends on SOC_SERIES_EFM32HG

5
soc/arm/silabs_exx32/efm32jg12b/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2019 Lemonbeat GmbH
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFM32JG12B
config SOC_PART_NUMBER_EFM32JG12B500F1024GL125
bool
endif # SOC_SERIES_EFM32JG12B
depends on SOC_SERIES_EFM32JG12B

5
soc/arm/silabs_exx32/efm32pg12b/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2018 Christian Taedcke
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFM32PG12B
config SOC_PART_NUMBER_EFM32PG12B500F1024GL125
bool
endif # SOC_SERIES_EFM32PG12B
depends on SOC_SERIES_EFM32PG12B

5
soc/arm/silabs_exx32/efm32wg/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2017 Christian Taedcke
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFM32WG
config SOC_PART_NUMBER_EFM32WG990F256
bool
endif # SOC_SERIES_EFM32WG
depends on SOC_SERIES_EFM32WG

5
soc/arm/silabs_exx32/efr32fg1p/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2018 Christian Taedcke
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFR32FG1P
config SOC_PART_NUMBER_EFR32FG1P133F256GM48
bool
endif # SOC_SERIES_EFR32FG1P
depends on SOC_SERIES_EFR32FG1P

5
soc/arm/silabs_exx32/efr32mg12p/Kconfig.soc
View file

@ -3,9 +3,6 @@
# Copyright (c) 2018 Diego Sueiro
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_EFR32MG12P
config SOC_PART_NUMBER_EFR32MG12P332F1024GL125
bool
endif # SOC_SERIES_EFR32MG12P
depends on SOC_SERIES_EFR32MG12P

5
soc/arm/ti_lm3s6965/Kconfig
View file

@ -3,11 +3,8 @@
# Copyright (c) 2014-2015 Wind River Systems, Inc.
# SPDX-License-Identifier: Apache-2.0
if SOC_TI_LM3S6965
config SOC_TI_LM3S6965_QEMU
def_bool y
depends on SOC_TI_LM3S6965
# Platform has only been tested on QEMU, not on real hardware, so always
# assume it is used for a QEMU target.
endif # SOC_TI_LM3S6965

11
soc/arm/ti_simplelink/cc32xx/Kconfig.soc
View file

@ -16,19 +16,12 @@ config SOC_CC3235SF
endchoice
if SOC_CC3220SF
config CC3220SF_DEBUG
bool "Prepend debug header, disabling flash verification" if XIP
default XIP
endif # SOC_CC3220SF
if SOC_CC3235SF
depends on SOC_CC3220SF
config CC3235SF_DEBUG
bool "Prepend debug header, disabling flash verification" if XIP
default XIP
endif # SOC_CC3235SF
depends on SOC_CC3235SF

5
soc/riscv/openisa_rv32m1/Kconfig
View file

@ -12,10 +12,9 @@
# conventions, those "other" cores would need to be supported under a
# different soc subdirectory, e.g. soc/arm instead of soc/riscv.
if SOC_OPENISA_RV32M1_RISCV32
choice
prompt "OpenISA RV32M1 RISC-V Core Selection"
depends on SOC_OPENISA_RV32M1_RISCV32
config SOC_OPENISA_RV32M1_RI5CY
bool "OpenISA RV32M1 RI5CY core"
@ -24,5 +23,3 @@ config SOC_OPENISA_RV32M1_ZERO_RISCY
bool "OpenISA RV32M1 ZERO-RISCY core"
endchoice
endif # SOC_OPENISA_RV32M1_RISCV32

4
subsys/net/ip/Kconfig.mgmt
View file

@ -8,10 +8,9 @@ menuconfig NET_MGMT
of the network stack as well as receiving notification on network
events (ip address change, iface up and running ...).
if NET_MGMT
config NET_MGMT_EVENT
bool "Add support for runtime network event notifications"
depends on NET_MGMT
help
This adds support for the stack to notify events towards any
relevant listener. This can be necessary when application
@ -65,4 +64,3 @@ config NET_DEBUG_MGMT_EVENT_STACK
Add debug messages output on how much Net MGMT event stack is used.
endif # NET_MGMT_EVENT
endif # NET_MGMT