soc: ti_simplelink: kconfig: Refactor CCFG flash block handling
Instead of having TI_CCFG_PRESENT as a symbol that's only defined in soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series and y when SOC_SERIES_CC13X2_CC26X2 is enabled, turn it into a helper symbol that's selected by SOC_SERIES_CC13X2_CC26X2. This avoids having a symbol that's only defined in a Kconfig.defconfig file, which is confusing. It also makes things a bit more generic, in case other boards with CCFGs are added. Also rename it to HAS_TI_CCFG to be consistent with other helper symbols, and add a help text. Flagged by scripts/kconfig/lint.py. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
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510102dd71
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5 changed files with 15 additions and 10 deletions
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@ -39,7 +39,7 @@
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#define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
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#endif
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#ifdef CONFIG_TI_CCFG_PRESENT
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#ifdef CONFIG_HAS_TI_CCFG
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#define CCFG_SIZE 88
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#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - \
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CCFG_SIZE)
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@ -92,7 +92,7 @@ _region_min_align = 4;
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MEMORY
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{
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FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
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#ifdef CONFIG_TI_CCFG_PRESENT
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#ifdef CONFIG_HAS_TI_CCFG
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FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE
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#endif
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#ifdef DT_CCM_BASE_ADDRESS
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@ -246,7 +246,7 @@ SECTIONS
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GROUP_END(ROMABLE_REGION)
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/* Some TI SoCs have a special configuration footer, at the end of flash. */
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#ifdef CONFIG_TI_CCFG_PRESENT
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#ifdef CONFIG_HAS_TI_CCFG
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SECTION_PROLOGUE(.ti_ccfg,,)
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{
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KEEP(*(TI_CCFG))
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@ -43,7 +43,7 @@
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#define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
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#endif
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#ifdef CONFIG_TI_CCFG_PRESENT
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#ifdef CONFIG_HAS_TI_CCFG
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#define CCFG_SIZE 88
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#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - \
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CCFG_SIZE)
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@ -92,7 +92,7 @@ _region_min_align = 4;
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MEMORY
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{
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FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
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#ifdef CONFIG_TI_CCFG_PRESENT
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#ifdef CONFIG_HAS_TI_CCFG
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FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE
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#endif
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#ifdef DT_CCM_BASE_ADDRESS
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@ -242,7 +242,7 @@ SECTIONS
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GROUP_END(ROMABLE_REGION)
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/* Some TI SoCs have a special configuration footer, at the end of flash. */
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#ifdef CONFIG_TI_CCFG_PRESENT
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#ifdef CONFIG_HAS_TI_CCFG
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SECTION_PROLOGUE(.ti_ccfg,,)
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{
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KEEP(*(TI_CCFG))
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@ -6,9 +6,17 @@ config SOC_FAMILY_TISIMPLELINK
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bool
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if SOC_FAMILY_TISIMPLELINK
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config SOC_FAMILY
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string
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default "ti_simplelink"
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source "soc/arm/ti_simplelink/*/Kconfig.soc"
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config HAS_TI_CCFG
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bool
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help
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Selected when CCFG (Customer Configuration) registers
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appear at the end of flash
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endif # SOC_FAMILY_TISIMPLELINK
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@ -22,10 +22,6 @@ config SYS_CLOCK_TICKS_PER_SEC
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config NUM_IRQS
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default 38
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config TI_CCFG_PRESENT
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bool
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default y
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config CC13X2_CC26X2_RTC_TIMER
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default y
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@ -10,5 +10,6 @@ config SOC_SERIES_CC13X2_CC26X2
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select CPU_HAS_FPU
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select SOC_FAMILY_TISIMPLELINK
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select HAS_CC13X2_CC26X2_SDK
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select HAS_TI_CCFG
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help
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Enable support for TI SimpleLink CC13x2 / CC26x2 SoCs
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