Commit graph

1033 commits

Author SHA1 Message Date
Aurelien Jarno 1b1f832197 arch: arm: stm32f7: Kconfig: select CPU_HAS_ARM_MPU
Now that Cortex-M7 cache issues have been fixed in commits 828ae6b8 and
13972693, it is possible to safely enable the MPU on the STM32F7 SoC
series.

Note that the ITCM area is not mapped into an MPU region. This should
not be an issue for now, as Zephyr does not provide yet a way to
populate and use this area.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-11-13 08:58:29 -05:00
Endre Karlson bfb45055f1 soc: silabs: Enable Segger RTT
This change allows you to use RTT with EFR32 chips.

Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-11-13 10:53:47 +01:00
Pavel Kral 86a4967365 dts: stm32f103: add missing dts binding for port G
STM32F103 micros starting from 64-pin (xE) packages upward have
available port G. This patch defines a dts binding for them.

Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
2018-11-12 08:26:49 -05:00
Erwan Gouriou 0d81496fc5 soc/st/stm32f7: Fix typo in stm32f7 fixup file
Fix address field STM32 USART8 NAME macro

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-12 08:17:28 -05:00
Erwan Gouriou d76a5592e4 drivers/serial: stm32: Get clocks information from device tree
Provide CONFIG macros for clocks bits and bus properties in fixup
files and use them to simplify logic in uart devices instanciation
code

Fixes #10448

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-12 08:17:28 -05:00
Martin Bertsche 9892f40204 gpio: stm32 use dts extracted information to populate gpio instances.
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.

The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.

The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.

Manual tests were executed on:
	- NUCLEO-F103RB
	- STM32F429I-DISCO
	- STM32F746G-DISCO
	- NUCLEO-F767ZI

Manual tests consisted of blinky on different GPIOs and pins on each
board.

sanitycheck was executed for all STM32 based boards

Fixes: #10629

Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
2018-11-09 04:49:59 -06:00
Piotr Mienkowski d9e2171aa9 drivers: flash_gecko: Add flash driver for SiLabs Gecko SoCs
Tested with SLWSTK6061A / BRD4250B wireless starter kit.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2018-11-08 17:56:44 -05:00
Benoit Leforestier 270ec15482 board: Add support of STM32F143xG SOC
The only difference between the F413xH and F413xG is flash memory size.
STMF413xH: 1536 Kbytes
STMF413xG: 1024 Kbytes

Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
2018-11-08 07:05:04 -06:00
Martin Benda 4a2837f866 arch: arm: sam0: enable SEGGER RTT on Atmel sam0 SoCs
Add `select HAS_SEGGER_RTT` under `SOC_FAMILY_SAM0`.

Signed-off-by: Martin Benda <martin.benda@omsquare.com>
2018-11-07 06:42:02 -06:00
Aurelien Jarno 6b6e54321a drivers: usb: add usb device driver for Atmel SAM E70 family
This patch adds a USB device driver for the USBHS device that can be
found on Atmel SAM E70 SoC family. Only the FIFO mode is supported
(as opposed to DMA). It supports LS, FS and HS modes, but defaults to
FS mode as Zephyr does not fully support HS mode yet.

Tested examples on an Atmel SMART SAM E70 Xplained Board:
* usb/cdc_acm
* usb/hid-mouse
* usb/mass

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-11-06 16:32:35 -05:00
Erwan Gouriou 9df3a1f67f drivers/i2c: stm32: get clock bits/bus from dts files
Get STM32 I2C clocks bus and bits information from
device tree files.

Fixes #10435

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-06 16:14:13 -05:00
Kumar Gala bfc4281cc0 arm: kinetis: Add basic DTS support for TRNG
Add dts binding and info for TRNG device and enable basic support to
get the device name from DTS.  We leave for now the base addresses
coming from the MCUX HAL.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-06 08:49:50 -06:00
Kumar Gala 727a9a7f99 arm: kinetis: Add basic DTS support for RNGA
Add dts binding and info for RNGA device and enable basic support to
get the device name from DTS.  We leave for now the base addresses
coming from the MCUX HAL.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-06 08:49:50 -06:00
Kumar Gala ac7da0b65c gpio: ti cc32xx: Add device tree support for GPIO
Convert gpio_cc32xx driver over to using device tree. Added binding
files, updates to dts for various SoCs that use cc32xx.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-05 11:08:35 -06:00
Kumar Gala ddc2a3d9df drivers: spi_sam0: move sercom pad info to dts
Move the setting of the SERCOM PAD for dipo/dopo for the spi driver
into device tree out of board.h

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-05 10:05:47 -05:00
Kumar Gala 6d08958ad5 drivers: uart_sam0: move sercom pad info to dts
Move the setting of the SERCOM PAD for rxpo/txpo for the uart driver
into device tree out of board.h

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-05 10:05:47 -05:00
Sebastian Bøe 3215dd862f cmake: nrf51: Don't #define NRF51822
The define NRF51822 has no in-tree users and is believed to have been
added by accident. The define NRF51 should be referenced in it's
place.

To avoid users accidentally referencing NRF51822 instead of NRF51, and
to avoid confusing users into believing that NRF51822 has semantics we
remove it.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-11-04 22:03:01 +01:00
Sebastian Bøe c4266a8cd2 cmake: Move MDK-defines from 'soc' to the MDK build script
The build script ext/hal/nordic/CMakeLists.txt manages the MDK
dependency. The MDK is not aware of Zephyr and uses it's own defines
to indicate what HW we are building for.

This commit moves these MDK-specific defines out of the 'soc' build
scripts and into the MDK build script where they belong.

This is expected to be a pure refactoring without side-effects.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-11-04 22:03:01 +01:00
David B. Kinder ee47f7fb7a doc: fix kconfig misspellings
Fix misspellings in Kconfig files that show up in the configuration
documentation (and make menuconfig screens).

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-11-02 17:58:16 -04:00
Subramanian Meenakshi Sundaram 4e1179bba5 drivers: watchdog: Adding watchdog support for sam SOC
Adding watchdog driver for sam SoC. The current implemntation just
diables the watchdog on device boot.
This PR adds the following support for SAM3X, SAM4S and SAME70
1. Activate processor reset
2. Activate all reset
3. Generate interrupt on watchdog timer expiration.

Signed-off-by: Subramanian Meenakshi Sundaram <subbu147@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-02 15:09:22 -05:00
Kumar Gala 10976dda23 soc: Remove board.h include
The soc code doesn't need anything from board.h so lets remove the
include.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-01 13:15:18 +01:00
Jamie McCrae 183e7445c6 soc: nordic: Add Nordic GPREGRET setting support
Adds support for setting GPREGRET register when rebooting.

Signed-off-by: Jamie McCrae <jamie.mccrae@lairdtech.com>
2018-10-29 21:43:23 +00:00
qianfan Zhao 7ac2ade110 arch: sam: Enable SEGGER RTT on all sam0 and same70 SoCs
All chip from Atmel's sam series can support SEGGER RTT.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-27 07:54:28 +01:00
Ioannis Glaropoulos 1cc66cf800 arch: high-level Kconfig symbol structure for Trusted Execution
This commit contributes a Kconfig symbol hierarchy which allows
the user to build Zephyr Secure and Non-Secure images on ARMv8-M
MCUs with support for Trusted Execution. However, the high-level
configuration structure is generic, thus, can be potentially
used for any platform that supports Trusted Execution.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-10-24 16:38:33 +01:00
Christian Taedcke 743938b450 dts/arm/st_stm32: Add SPI nodes to STM32 F7 series
This patch adds SPI nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-23 09:19:15 +01:00
Christian Taedcke 5575594ce9 drivers: spi_ll_stm32: Enable SPI driver for F7 family
Enables SPI driver for STM32F7 SoCs

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-23 09:19:15 +01:00
Christian Taedcke 2e06fd50fd drivers/rtc: Enable RTC driver for STM32F7 series
Enable RTC driver for STM32F7 series.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-23 09:19:15 +01:00
qianfan Zhao da0ce2e542 soc: same70: Auto select SAME70 SoC drivers based Kconfig
Auto select drivers on Kconfig.defconfig.series based on Kconfig

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-19 16:19:16 -04:00
Daniel Leung 20e2e5bad8 arm: cypress/psoc6: add SoC specific linker input sections
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 16:11:34 -04:00
Diego Sueiro 537798db0d soc: arm: exx32: Add Silabs EFR32MG12P soc files
The Silicon Labs EFR32MG12P Mighty Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* integrated Sub-GHz and/or 2.4GHz radio
* multiple low power peripherals

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-10-19 13:47:49 -05:00
Andrei Gansari 02e217df50 drivers: eth_mcux: kinetis networking device Tree
Partially replaces Kinetis MCUX driver configuration from Kconfig to
Device Tree. Interrputs moved from defines configuration to DT.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2018-10-19 07:57:20 -05:00
Pawel Dunaj ecae736e0b dts: Add support for Nordic QDEC
Add QDEC binding and entry in Nordic SoC DTSI files.

This closes issue #9364

Jira:DESK-259

Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
2018-10-17 13:45:51 -05:00
Galen Seitz 498fa532c9 soc: arm: st_stm32: stm32f3: Add support for STM32F302x8
Add Kconfig support for STM32F302x8 SoC.

Signed-off-by: Galen Seitz <galens@seitzassoc.com>
2018-10-16 22:52:07 -04:00
Galen Seitz d509100e11 soc: arm: st_stm32: stm32f3: Add defines for I2C3
Add definitions for I2C3 which is present in some stm32f3 devices.

Signed-off-by: Galen Seitz <galens@seitzassoc.com>
2018-10-16 22:52:07 -04:00
Galen Seitz da891b7ab2 soc: arm: st_stm32: stm32f3: Add defines for USART3
Add definitions for USART3 which is present in some stm32f3
devices.

Signed-off-by: Galen Seitz <galens@seitzassoc.com>
2018-10-16 22:52:07 -04:00
Diego Sueiro 0c7a28c4cc drivers: serial: Rework Silabs Gecko UART Driver
Introduces the location property and adds the ability to use values
generated by the device tree configuration.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-16 15:59:37 -05:00
qianfan Zhao 10bdfcfdbe boards: same70: Enable SPI0 on dts
Enable the SPI interface on Arduino Shield(J505 Header) default

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-16 14:01:29 -05:00
qianfan Zhao 7ec9057f51 dts_fixup: fix atmel same70 CONFIG_UART_SAM_PORT_2_NAME define
Remove the extra space in front of _LABEL

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-15 11:58:08 -05:00
Alberto Escolar Piedras eea73e13bd soc: Kconfig: Add options for compatible NRF SOCs
Simulated NRF boards based on the POSIX ARCH cannot directly
use the current SOC_*NRF options as these pull options from
the ARM CPU and other peripherals.
This commit adds a new set of hidden SOC_COMPATIBLE_* options to
be selected both by the real SOCs and the simulated ones.
In this manner we can have the common code depend on the
SOC_COMPATIBLE* options instead of the current ones where
neccessary.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>

(f) arm kconfig
2018-10-15 09:36:37 -04:00
Anas Nashif a220e2690f Revert "arm: cypress/psoc6: add SoC specific linker input sections"
This reverts commit 08c165f2b0.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Paweł Zadrożniak 68cb7b3e38 drivers: usb: Add nRF52840 USBD driver
* Add usbd_dc_nrfx shim

The shim is based on the previous one usbd_dc_nrf5.
For handling the USBD hardware, tested nrfx_usbd driver from nRF SDK
was used.

Briefly tested examples:
* usb/cdc_acm
* usb/dfu (USB communication only due to flash handling issues)
* usb/hid-mouse
* bluetooth/hci_usb

Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
2018-10-12 13:14:12 +02:00
Jun Li 08d5c5ef1d soc: stm32f4: enable dma options for soc
Enable "CONFIG_DMA_STM32F4X" when "CONFIG_DMA" is enabled.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2018-10-11 12:58:30 -05:00
Armando Visconti 31f2e81e10 soc/arm/stm32f4xx: Add I2S defines to dts.fixup
For the stm32f4xx family the SPI and I2S are sharing same
controller, so we can reuse same definitions.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-10-11 16:55:00 +02:00
Armando Visconti 411dc003ee arch: arm: soc: stm32f4xx: Add LL include file also for I2S case
stm32f4xx_ll_spi.h include file is shared between I2S and SPI
(controller is same). So we need to include it even when I2S_STM32
is enabled.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-10-11 16:55:00 +02:00
Kumar Gala 0acc0fdd4b soc: silabs: efm32hg: Move USART fixups from board to SoC
The USART fixup in the board dir really are SoC level fixup's.  So move
them there and remove the board fixup file since there isn't anything in
it now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-10 13:04:09 -05:00
Yannis Damigos 84737529d3 dts: st: f2/l4: Add missing maximum-speed property
Add missing maximum-speed property to usb nodes
for F2 and L4 series.

Fixes: #10472

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-10-10 12:27:55 -05:00
Marcio Montenegro 17b2ac6967 arm: exx32: Add Silabs EFM32HG soc files
The Silicon Labs EFM32 Happy Gecko MCU includes:
        * Cortex-M0+ core at 24MHz
        * Up to 64KB of flash and 8KB of RAM
        * Full speed (12 MHz) USB 2.0 Device
        * Multiple low power peripherals

Signed-off-by: Marcio Montenegro <mtuxpe@gmail.com>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-10 12:00:06 -05:00
qianfan Zhao 3974978ea3 same70: Add SPI1, SPI2 support
Add SPI1/2 pinmap, dts.fixup for atmel sam series soc

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-10 11:29:49 -05:00
Kumar Gala c3076d6eb2 gpio: silabs gecko: Add device tree support for GPIO
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-09 22:34:56 -04:00
Yannis Damigos 1c4f22edaf arch: stm32f4/f7/l4: Add usb maximum speed defines to dts fixup
Add CONFIG_USB_MAXIMUM_SPEED defines to dts fixup files.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-10-09 12:59:34 -04:00
Daniel Leung 08c165f2b0 arm: cypress/psoc6: add SoC specific linker input sections
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Anas Nashif 071c9dc0f3 soc: logging: move soc tree to new logger
Use the new logger framework for soc related code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Pushpal Sidhu 3ed0375c8d arch: arm: mpu: add support for 640k SRAM
The STM32L4+ parts have 640k of SRAM.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Pushpal Sidhu f1d78d8f38 arm: st: add stm32l4r5xx support
New parts from ST. See http://www.st.com/en/microcontrollers/stm32l4r5-s5.html
for more details.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Sebastian Bøe 8eb734cd82 DT: Rename from dts.fixup to dts_fixup.h
The Zephyr configuration system uses many different files in many
different formats. It makes it a lot easier for users to understand
what these files do if when we use the correct file extensions.

To this end we rename the dts.fixup files to the correct file
extension '.h'.

This is a breaking change for out-of-tree fixup files. Such files will
be detected and given an appropriate error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-08 11:38:56 -04:00
Chen Han d7a6b7e101 dts: stm32f1: fix UART4 define
fix stm32f1 UART4 define in dst.fixup

Signed-off-by: Chen Han <qq1433255094@outlook.com>
2018-10-05 08:49:26 -05:00
Kumar Gala de78ecd79c arm: beetle: Use device tree for IRQs
Get the IRQs for the devices we define in the device tree from the dts
file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-03 09:47:25 -05:00
Vincent van der Locht b941561e74 soc: sam4s: added missing devices in sam4s range
added sam4s16b, sam4s8c, sam4s8b, sam4s4c, sam4s4b,
sam4s4a, sam4s2c, sam4s2b and sam4s2a.
Used the same order as in the data sheet and code structure
equal to same70. Updated the sam4s_xplained board to match
the altered .dtsi location of the specific SoC.

Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
2018-10-02 16:17:54 -05:00
Aurelien Jarno 335222d189 dts/arm/st_stm32: Add timers and PWM nodes to STM32 F7 series
This patch adds timers and PWM nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-10-02 14:08:00 -07:00
Maureen Helm 89ccead382 drivers: boards: Merge HAS_DTS_SPI_DEVICE with HAS_DTS_SPI
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_DEVICE and
HAS_DTS_SPI.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Maureen Helm 75bc6ba454 drivers: boards: Merge HAS_DTS_I2C_DEVICE with HAS_DTS_I2C
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Maureen Helm c73d5c7880 boards: mimxrt1050_evk: Enable lpuart3 for bluetooth hci
Enables instance 3 of the lpuart driver, adds dts fixups, and configures
pinmuxes to use bluetooth hci on the mimxrt1050_evk board. Updates board
documentation accordingly.

Tested with samples/bluetooth/peripheral_hr, with frdm_kw41z attached as
an arduino shield running the nxp hci controller application.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-27 05:55:55 +05:30
Maureen Helm 3b72a54506 soc: nxp_imx: Use generated clock controller in dts fixup
Use the generated "_CLOCK_CONTROLLER" macro for the lpuart clock name.
This change is similar to commit
e81d9b98fe, but applied to nxp_imx.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-27 05:55:55 +05:30
Ryan QIAN 5b62ea0e7a arch: arm: nxp: imxrt1060: add device support
- Add SoC information for RT1060

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2018-09-26 18:14:22 -05:00
Ioannis Glaropoulos ccffca4a5d soc: arm: mps2: remove un-necessary Kconfig option selection
Remove the selection of MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
in SOC_MPS2_AN3385, as this is selected automatically by
ARM_MPU option (for ARMv7-M MCUs).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-24 14:34:53 -05:00
Nazar Chornenkyy 93f938c44e arm: Add Cypress PSoC6 SoC support
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.

Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
2018-09-21 18:50:59 -04:00
Dominik Kilian 67ca29a0e7 dts: nrf: Expand nRF DTS to support ARM TrustZone CryptoCell 310
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.

Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
2018-09-21 00:29:58 -07:00
Adithya Baglody 0e60644ff8 soc: mps2_an385: Enable Memory Protection unit.
This patch will enable the MPU in MPS2_AN385 soc.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-20 20:35:25 -04:00
Adithya Baglody 023bc923b0 soc: mps2_an385: Added support for MPU
Added required files/support for the MPU in MPS2-AN358 (Cortex-M3).

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-20 20:35:25 -04:00
Ramakrishna Pallala f0a2f2b423 soc: arm: nrf52: Select the supported Power States
Select the Low Power States supported by nrf52 SoC series.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-20 10:20:23 -04:00
Piotr Zięcik 1c16cfcc30 arch: arm: Make ARM_MPU the sole option controlling MPU usage
This commit removes all MPU-related (ARM_CORE_MPU and NXP_MPU)
options exept ARM_MPU, which becomes master switch controlling
MPU support on ARM.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik d393186d51 arch: arm: Introduce CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options
This commit introduces CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options,
which indicate which flavour of MPU is supported by given SoC family.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik d9cc147c60 arch: nxp_kinetis: Remove HAS_SYSMPU option.
The HAS_SYSMPU option is just selecting NXP_MPU option,
which could be also controlled through menuconfig.

This commit removes the HAS_SYSMPU option and replaces
its usage by NXP_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik edfcab428b arch: nxp_imx: Remove ARM_MPU_IMX_RT option.
The ARM_MPU_IMX_RT option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the ARM_MPU_IMX_RT option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik 9331064ff9 arch: nrf52: Remove ARM_MPU_NRF52X option.
The ARM_MPU_NRF52X option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the ARM_MPU_NRF52X option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik c4cd4cfe7f arch: beetle: Remove ARM_MPU_ENABLE option.
The ARM_MPU_ENABLE option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the ARM_MPU_ENABLE option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik eb1ee5f1ee arch: stm32: Remove STM32_ARM_MPU_ENABLE option.
The STM32_ARM_MPU_ENABLE option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the STM32_ARM_MPU_ENABLE option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Maureen Helm ae8d4edede soc: arm: Enable the lpspi driver and clock for the imxrt soc
Enables the mcux lpspi shim driver and subsystem clock for the imxrt
soc.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-19 09:15:29 -04:00
Christian Taedcke 2eb347b174 arm: exx32: Use one common soc.c for all exx32 socs
The differentiation between the MCUs is handled in the HAL from Silabs.
So all EXX32 MCUs should use the same soc.c file.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-09-16 08:36:41 -05:00
Yannis Damigos 0c1725116a drivers/rtc: Enable RTC driver for STM32F3 series
Enable RTC driver for STM32F3 series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-09-14 22:48:54 -05:00
Yannis Damigos 10c763cfbc drivers/rtc: Enable RTC driver for STM32F4 series
Enable RTC driver for STM32F4 series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-09-14 22:48:54 -05:00
Sebastian Bøe d98e046a24 cmake: move ti_lm3s6965-specific code into the soc directory
As far as possible SoC-specific code should be contained to it's
directory and core systems should not be referencing specific
SoCs. This keeps the common code clean and makes it easier to maintain
out-of-tree SoCs.

To this end we move CONFIG_SOC_TI_LM3S6965_QEMU's soft-reset related
code out of arch/arm/core/cortex_m and into arch/arm/soc/ti_lm3s6965.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-14 10:22:20 -05:00
Anas Nashif 70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00