arm: cypress/psoc6: add SoC specific linker input sections
The Cypress PSoC6 specifies some input sections in the startup scripts. These sections (.heap, .stack, etc.) need to be placed at correct location. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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4 changed files with 26 additions and 0 deletions
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@ -114,6 +114,8 @@ SECTIONS
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KEEP(*(IRQ_VECTOR_TABLE))
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KEEP(*(.vectors))
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KEEP(*(.openocd_dbg))
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KEEP(*(".openocd_dbg.*"))
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@ -11,5 +11,7 @@ config SOC_SERIES_PSOC62
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select CPU_HAS_SYSTICK
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select HAS_CYPRESS_DRIVERS
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select SOC_NOINIT_LD
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select SOC_RWDATA_LD
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help
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Enable support for Cypress PSoC6 MCU series
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16
soc/arm/cypress/psoc6/soc-noinit.ld
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16
soc/arm/cypress/psoc6/soc-noinit.ld
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@ -0,0 +1,16 @@
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/*
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* Extracted from:
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* ext/hal/cypress/.../devices/psoc6/linker/gcc/cy8c6xx6_cm0plus.ld
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*
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* Size of sections are calculated in the startup scripts,
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* so they don't have to be specified here.
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*/
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. = ALIGN(8);
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KEEP(*(.ram_vectors))
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. = ALIGN(4);
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KEEP(*(.heap))
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. = ALIGN(4);
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KEEP(*(.stack))
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6
soc/arm/cypress/psoc6/soc-rwdata.ld
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6
soc/arm/cypress/psoc6/soc-rwdata.ld
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@ -0,0 +1,6 @@
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/*
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* Extracted from:
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* ext/hal/cypress/.../devices/psoc6/linker/gcc/cy8c6xx6_cm0plus.ld
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*/
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KEEP(*(.cy_ramfunc))
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