Commit graph

1033 commits

Author SHA1 Message Date
Daniel Leung 08c165f2b0 arm: cypress/psoc6: add SoC specific linker input sections
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Anas Nashif 071c9dc0f3 soc: logging: move soc tree to new logger
Use the new logger framework for soc related code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Pushpal Sidhu 3ed0375c8d arch: arm: mpu: add support for 640k SRAM
The STM32L4+ parts have 640k of SRAM.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Pushpal Sidhu f1d78d8f38 arm: st: add stm32l4r5xx support
New parts from ST. See http://www.st.com/en/microcontrollers/stm32l4r5-s5.html
for more details.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Sebastian Bøe 8eb734cd82 DT: Rename from dts.fixup to dts_fixup.h
The Zephyr configuration system uses many different files in many
different formats. It makes it a lot easier for users to understand
what these files do if when we use the correct file extensions.

To this end we rename the dts.fixup files to the correct file
extension '.h'.

This is a breaking change for out-of-tree fixup files. Such files will
be detected and given an appropriate error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-08 11:38:56 -04:00
Chen Han d7a6b7e101 dts: stm32f1: fix UART4 define
fix stm32f1 UART4 define in dst.fixup

Signed-off-by: Chen Han <qq1433255094@outlook.com>
2018-10-05 08:49:26 -05:00
Kumar Gala de78ecd79c arm: beetle: Use device tree for IRQs
Get the IRQs for the devices we define in the device tree from the dts
file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-03 09:47:25 -05:00
Vincent van der Locht b941561e74 soc: sam4s: added missing devices in sam4s range
added sam4s16b, sam4s8c, sam4s8b, sam4s4c, sam4s4b,
sam4s4a, sam4s2c, sam4s2b and sam4s2a.
Used the same order as in the data sheet and code structure
equal to same70. Updated the sam4s_xplained board to match
the altered .dtsi location of the specific SoC.

Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
2018-10-02 16:17:54 -05:00
Aurelien Jarno 335222d189 dts/arm/st_stm32: Add timers and PWM nodes to STM32 F7 series
This patch adds timers and PWM nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-10-02 14:08:00 -07:00
Maureen Helm 89ccead382 drivers: boards: Merge HAS_DTS_SPI_DEVICE with HAS_DTS_SPI
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_DEVICE and
HAS_DTS_SPI.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Maureen Helm 75bc6ba454 drivers: boards: Merge HAS_DTS_I2C_DEVICE with HAS_DTS_I2C
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Maureen Helm c73d5c7880 boards: mimxrt1050_evk: Enable lpuart3 for bluetooth hci
Enables instance 3 of the lpuart driver, adds dts fixups, and configures
pinmuxes to use bluetooth hci on the mimxrt1050_evk board. Updates board
documentation accordingly.

Tested with samples/bluetooth/peripheral_hr, with frdm_kw41z attached as
an arduino shield running the nxp hci controller application.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-27 05:55:55 +05:30
Maureen Helm 3b72a54506 soc: nxp_imx: Use generated clock controller in dts fixup
Use the generated "_CLOCK_CONTROLLER" macro for the lpuart clock name.
This change is similar to commit
e81d9b98fe, but applied to nxp_imx.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-27 05:55:55 +05:30
Ryan QIAN 5b62ea0e7a arch: arm: nxp: imxrt1060: add device support
- Add SoC information for RT1060

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2018-09-26 18:14:22 -05:00
Ioannis Glaropoulos ccffca4a5d soc: arm: mps2: remove un-necessary Kconfig option selection
Remove the selection of MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
in SOC_MPS2_AN3385, as this is selected automatically by
ARM_MPU option (for ARMv7-M MCUs).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-24 14:34:53 -05:00
Nazar Chornenkyy 93f938c44e arm: Add Cypress PSoC6 SoC support
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.

Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
2018-09-21 18:50:59 -04:00
Dominik Kilian 67ca29a0e7 dts: nrf: Expand nRF DTS to support ARM TrustZone CryptoCell 310
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.

Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
2018-09-21 00:29:58 -07:00
Adithya Baglody 0e60644ff8 soc: mps2_an385: Enable Memory Protection unit.
This patch will enable the MPU in MPS2_AN385 soc.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-20 20:35:25 -04:00
Adithya Baglody 023bc923b0 soc: mps2_an385: Added support for MPU
Added required files/support for the MPU in MPS2-AN358 (Cortex-M3).

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-20 20:35:25 -04:00
Ramakrishna Pallala f0a2f2b423 soc: arm: nrf52: Select the supported Power States
Select the Low Power States supported by nrf52 SoC series.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-20 10:20:23 -04:00
Piotr Zięcik 1c16cfcc30 arch: arm: Make ARM_MPU the sole option controlling MPU usage
This commit removes all MPU-related (ARM_CORE_MPU and NXP_MPU)
options exept ARM_MPU, which becomes master switch controlling
MPU support on ARM.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik d393186d51 arch: arm: Introduce CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options
This commit introduces CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options,
which indicate which flavour of MPU is supported by given SoC family.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik d9cc147c60 arch: nxp_kinetis: Remove HAS_SYSMPU option.
The HAS_SYSMPU option is just selecting NXP_MPU option,
which could be also controlled through menuconfig.

This commit removes the HAS_SYSMPU option and replaces
its usage by NXP_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik edfcab428b arch: nxp_imx: Remove ARM_MPU_IMX_RT option.
The ARM_MPU_IMX_RT option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the ARM_MPU_IMX_RT option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik 9331064ff9 arch: nrf52: Remove ARM_MPU_NRF52X option.
The ARM_MPU_NRF52X option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the ARM_MPU_NRF52X option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik c4cd4cfe7f arch: beetle: Remove ARM_MPU_ENABLE option.
The ARM_MPU_ENABLE option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the ARM_MPU_ENABLE option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik eb1ee5f1ee arch: stm32: Remove STM32_ARM_MPU_ENABLE option.
The STM32_ARM_MPU_ENABLE option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.

This commit removes the STM32_ARM_MPU_ENABLE option and replaces
its usage by ARM_MPU option.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Maureen Helm ae8d4edede soc: arm: Enable the lpspi driver and clock for the imxrt soc
Enables the mcux lpspi shim driver and subsystem clock for the imxrt
soc.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-19 09:15:29 -04:00
Christian Taedcke 2eb347b174 arm: exx32: Use one common soc.c for all exx32 socs
The differentiation between the MCUs is handled in the HAL from Silabs.
So all EXX32 MCUs should use the same soc.c file.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-09-16 08:36:41 -05:00
Yannis Damigos 0c1725116a drivers/rtc: Enable RTC driver for STM32F3 series
Enable RTC driver for STM32F3 series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-09-14 22:48:54 -05:00
Yannis Damigos 10c763cfbc drivers/rtc: Enable RTC driver for STM32F4 series
Enable RTC driver for STM32F4 series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-09-14 22:48:54 -05:00
Sebastian Bøe d98e046a24 cmake: move ti_lm3s6965-specific code into the soc directory
As far as possible SoC-specific code should be contained to it's
directory and core systems should not be referencing specific
SoCs. This keeps the common code clean and makes it easier to maintain
out-of-tree SoCs.

To this end we move CONFIG_SOC_TI_LM3S6965_QEMU's soft-reset related
code out of arch/arm/core/cortex_m and into arch/arm/soc/ti_lm3s6965.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-14 10:22:20 -05:00
Anas Nashif 70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00