cmake: move ti_lm3s6965-specific code into the soc directory
As far as possible SoC-specific code should be contained to it's directory and core systems should not be referencing specific SoCs. This keeps the common code clean and makes it easier to maintain out-of-tree SoCs. To this end we move CONFIG_SOC_TI_LM3S6965_QEMU's soft-reset related code out of arch/arm/core/cortex_m and into arch/arm/soc/ti_lm3s6965. Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Sebastian Bøe
Maureen Helm
parent
75780a8135
commit
d98e046a24
5 changed files with 114 additions and 84 deletions
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@ -15,7 +15,6 @@
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#include <toolchain.h>
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#include <linker/sections.h>
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#include <arch/cpu.h>
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#include <offsets_short.h>
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#include "vector_table.h"
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_ASM_FILE_PROLOGUE
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@ -104,53 +103,3 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
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isb
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b _PrepC
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#if defined(CONFIG_SOC_TI_LM3S6965_QEMU)
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GTEXT(_do_software_reboot)
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SECTION_FUNC(TEXT,_do_software_reboot)
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eors r0, r0
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/* move exception table back to 0 */
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ldr r1, =0xe000e000
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str r0, [r1, #0xd08] /* VTOR */
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ldr r0, [r0, #4]
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bx r0
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GTEXT(_force_exit_one_nested_irq)
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SECTION_FUNC(TEXT,_force_exit_one_nested_irq)
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ldr r0, =_SCS_ICSR_RETTOBASE
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ldr r1, =_SCS_ICSR
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ldr r1, [r1]
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ands.w r0, r1
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/*
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* If Z flag is set, we are nested, so un-nest one level and get back to
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* this function to unwind the next level; else, exit the last interrupt
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* by jumping to reboot code.
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*/
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ittee eq
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ldreq lr, =0xfffffff1
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ldreq r2, =_force_exit_one_nested_irq
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ldrne lr, =0xfffffffd
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ldrne r2, =_do_software_reboot
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ldr ip, =_interrupt_stack
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add.w ip, #(___esf_t_SIZEOF * 2) /* enough for a stack frame */
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ldr r1, =0xfffffffe
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and.w r2, r1
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str r2, [ip, #(6 * 4)]
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ldr r2, =0x01000000
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str r2, [ip, #(7 * 4)]
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ite eq
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moveq sp, ip
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msrne PSP, ip
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bx lr
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#endif
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@ -19,37 +19,6 @@
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#include <misc/util.h>
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#include <arch/arm/cortex_m/cmsis.h>
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#if defined(CONFIG_SOC_TI_LM3S6965_QEMU)
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/*
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* QEMU is missing the support for rebooting through the SYSRESETREQ mechanism.
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* Just jump back to __reset() of the image in flash, which address can
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* _always_ be found in the vector table reset slot located at address 0x4.
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*/
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static void software_reboot(void)
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{
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extern void _do_software_reboot(void);
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extern void _force_exit_one_nested_irq(void);
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/*
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* force enable interrupts locked via PRIMASK if somehow disabled: the
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* boot code does not enable them
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*/
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__asm__ volatile("cpsie i" :::);
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if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0) {
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_do_software_reboot();
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} else {
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__asm__ volatile(
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"ldr r0, =_force_exit_one_nested_irq\n\t"
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"bx r0\n\t"
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:::);
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}
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}
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#define DO_REBOOT() software_reboot()
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#else
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#define DO_REBOOT() NVIC_SystemReset()
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#endif
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/**
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*
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* @brief Reset the system
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@ -59,8 +28,9 @@ static void software_reboot(void)
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* @return N/A
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*/
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void sys_arch_reboot(int type)
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void __weak sys_arch_reboot(int type)
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{
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ARG_UNUSED(type);
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DO_REBOOT();
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NVIC_SystemReset();
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}
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@ -1,4 +1,6 @@
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zephyr_sources(
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soc.c
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soc_config.c
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reboot.S
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sys_arch_reboot.c
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)
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61
soc/arm/ti_lm3s6965/reboot.S
Normal file
61
soc/arm/ti_lm3s6965/reboot.S
Normal file
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@ -0,0 +1,61 @@
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/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <board.h>
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#include <toolchain.h>
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#include <linker/sections.h>
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#include <arch/cpu.h>
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#include <offsets_short.h>
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_ASM_FILE_PROLOGUE
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GDATA(_interrupt_stack)
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GTEXT(_do_software_reboot)
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SECTION_FUNC(TEXT,_do_software_reboot)
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eors r0, r0
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/* move exception table back to 0 */
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ldr r1, =0xe000e000
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str r0, [r1, #0xd08] /* VTOR */
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ldr r0, [r0, #4]
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bx r0
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GTEXT(_force_exit_one_nested_irq)
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SECTION_FUNC(TEXT,_force_exit_one_nested_irq)
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ldr r0, =_SCS_ICSR_RETTOBASE
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ldr r1, =_SCS_ICSR
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ldr r1, [r1]
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ands.w r0, r1
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/*
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* If Z flag is set, we are nested, so un-nest one level and get
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* back to this function to unwind the next level; else, exit the
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* last interrupt by jumping to reboot code.
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*/
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ittee eq
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ldreq lr, =0xfffffff1
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ldreq r2, =_force_exit_one_nested_irq
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ldrne lr, =0xfffffffd
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ldrne r2, =_do_software_reboot
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ldr ip, =_interrupt_stack
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add.w ip, #(___esf_t_SIZEOF * 2) /* enough for a stack frame */
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ldr r1, =0xfffffffe
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and.w r2, r1
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str r2, [ip, #(6 * 4)]
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ldr r2, =0x01000000
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str r2, [ip, #(7 * 4)]
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ite eq
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moveq sp, ip
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msrne PSP, ip
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bx lr
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48
soc/arm/ti_lm3s6965/sys_arch_reboot.c
Normal file
48
soc/arm/ti_lm3s6965/sys_arch_reboot.c
Normal file
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@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <misc/util.h>
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#include <arch/arm/cortex_m/cmsis.h>
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/**
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*
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* @brief Reset the system
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*
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* This routine resets the processor.
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*
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* @return N/A
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*/
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void sys_arch_reboot(int type)
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{
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ARG_UNUSED(type);
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/*
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* QEMU is missing the support for rebooting through the SYSRESETREQ
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* mechanism. Just jump back to __reset() of the image in flash,
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* which address can _always_ be found in the vector table reset slot
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* located at address 0x4.
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*/
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extern void _do_software_reboot(void);
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extern void _force_exit_one_nested_irq(void);
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/*
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* force enable interrupts locked via PRIMASK if somehow disabled: the
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* boot code does not enable them
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*/
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__asm__ volatile("cpsie i" :::);
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if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0) {
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_do_software_reboot();
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} else {
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__asm__ volatile(
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"ldr r0, =_force_exit_one_nested_irq\n\t"
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"bx r0\n\t"
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:::);
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}
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}
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