soc: mps2_an385: Added support for MPU

Added required files/support for the MPU in MPS2-AN358 (Cortex-M3).

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Adithya Baglody 2018-04-11 15:11:53 +05:30 committed by Anas Nashif
commit 023bc923b0
4 changed files with 30 additions and 0 deletions

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@ -1,3 +1,4 @@
zephyr_sources(
soc.c
arm_mpu_regions.c
)

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@ -0,0 +1,26 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <generated_dts_board.h>
#include <soc.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
static struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
REGION_FLASH_ATTR(REGION_4M)),
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
REGION_RAM_ATTR(REGION_2M))
};
struct arm_mpu_config mpu_config = {
.num_regions = ARRAY_SIZE(mpu_regions),
.mpu_regions = mpu_regions,
};

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@ -7,6 +7,7 @@
#ifndef _SOC_H_
#define _SOC_H_
#define __MPU_PRESENT 1
#include <soc_devices.h>
#endif /* _SOC_H_ */

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@ -9,8 +9,10 @@
#ifndef _ASMLANGUAGE
#include <stddef.h>
#include "soc_registers.h"
/* FPGA system control block (FPGAIO) */
#define FPGAIO_BASE_ADDR (0x40028000)
#define __MPS2_FPGAIO ((volatile struct mps2_fpgaio *)FPGAIO_BASE_ADDR)