soc: mps2_an385: Added support for MPU
Added required files/support for the MPU in MPS2-AN358 (Cortex-M3). Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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4 changed files with 30 additions and 0 deletions
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@ -1,3 +1,4 @@
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zephyr_sources(
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soc.c
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arm_mpu_regions.c
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)
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26
soc/arm/arm/mps2/arm_mpu_regions.c
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26
soc/arm/arm/mps2/arm_mpu_regions.c
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/*
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <generated_dts_board.h>
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#include <soc.h>
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#include <arch/arm/cortex_m/mpu/arm_mpu.h>
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static struct arm_mpu_region mpu_regions[] = {
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/* Region 0 */
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MPU_REGION_ENTRY("FLASH_0",
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CONFIG_FLASH_BASE_ADDRESS,
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REGION_FLASH_ATTR(REGION_4M)),
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MPU_REGION_ENTRY("SRAM_0",
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CONFIG_SRAM_BASE_ADDRESS,
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REGION_RAM_ATTR(REGION_2M))
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};
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struct arm_mpu_config mpu_config = {
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.num_regions = ARRAY_SIZE(mpu_regions),
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.mpu_regions = mpu_regions,
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};
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@ -7,6 +7,7 @@
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#ifndef _SOC_H_
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#define _SOC_H_
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#define __MPU_PRESENT 1
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#include <soc_devices.h>
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#endif /* _SOC_H_ */
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@ -9,8 +9,10 @@
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#ifndef _ASMLANGUAGE
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#include <stddef.h>
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#include "soc_registers.h"
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/* FPGA system control block (FPGAIO) */
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#define FPGAIO_BASE_ADDR (0x40028000)
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#define __MPS2_FPGAIO ((volatile struct mps2_fpgaio *)FPGAIO_BASE_ADDR)
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