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boards: same70: Enable SPI0 on dts

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Enable the SPI interface on Arduino Shield(J505 Header) default

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
This commit is contained in:
qianfan Zhao 2018-10-16 15:02:54 +08:00 • committed by Maureen Helm
commit 10bdfcfdbe
5 changed files with 23 additions and 0 deletions
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2
boards/arm/sam_e70_xplained/board.h
View file

@ -9,4 +9,6 @@
#include <soc.h>
#define PINS_SPI0_CS {PIN_SPI0_CS3_PD27}
#endif /* _INC_BOARD_H_ */

2
boards/arm/sam_e70_xplained/doc/sam_e70_xplained.rst
View file

@ -50,6 +50,8 @@ features:
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |

4
boards/arm/sam_e70_xplained/sam_e70_xplained.dts
View file

@ -65,6 +65,10 @@
status = "ok";
};
&spi0 {
status = "ok";
};
&usart1 {
current-speed = <115200>;
status = "ok";

1
boards/arm/sam_e70_xplained/sam_e70_xplained.yaml
View file

@ -9,3 +9,4 @@ supported:
- netif:eth
- adc
- gpio
- spi

14
soc/arm/atmel_sam/same70/soc_pinmap.h
View file

@ -137,10 +137,24 @@
/* Serial Peripheral Interface (SPI) */
#define PIN_SPI0_CS0_PB2 {PIO_PB2D_SPI0_NPCS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
#define PIN_SPI0_CS1_PA31 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_SPI0_CS1_PD25 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_SPI0_CS2_PD12 {PIO_PD12C_SPI0_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
#define PIN_SPI0_CS3_PD27 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PINS_SPI0_MASK \
(PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK)
#define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_SPI1_CS0_PC25 {PIO_PC25C_SPI1_NPCS0, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
#define PIN_SPI1_CS1_PC28 {PIO_PC28C_SPI1_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
#define PIN_SPI1_CS1_PD0 {PIO_PD0C_SPI1_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
#define PIN_SPI1_CS2_PC29 {PIO_PC29C_SPI1_NPCS2, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
#define PIN_SPI1_CS2_PD1 {PIO_PD1C_SPI1_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
#define PIN_SPI1_CS3_PC30 {PIO_PC30C_SPI1_NPCS3, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
#define PIN_SPI1_CS3_PD2 {PIO_PD2C_SPI1_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
#define PINS_SPI1_MASK \
(PIO_PC26C_SPI1_MISO | PIO_PC27C_SPI1_MOSI | PIO_PC24C_SPI1_SPCK)
#define PINS_SPI1 {PINS_SPI1_MASK, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}