Commit graph

5973 commits

Author SHA1 Message Date
Karol Lasończyk
22ffe4f531 soc: drivers: nrf: Add support for UARTE23 and UARTE24
Extends configuration to support instances used in new SOCs.

Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
2025-05-27 10:29:41 +02:00
Andrei Menzopol
88a180556d soc: nxp: mcxw: update macro in Kconfig.defconfig
Use IEEE802154 as it is set by the L2 macros too.

Signed-off-by: Andrei Menzopol <andrei.menzopol@nxp.com>
2025-05-27 09:16:04 +02:00
Ayush Singh
cb867a8afb soc: ti: k3: Add support for AM6232 A53 cores
- AM6232 is a dual core variant of AM6234 with everything being same.
- Used in the first batch of PocketBeagle 2

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-05-26 23:35:20 +02:00
Miguel Gazquez
be9549be60 soc: Add support for the WCH CH32V303
Adds support for building an image for the ch32v303.

Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
2025-05-24 18:03:53 +02:00
Sreeram Tatapudi
c4866ec68a soc: cyw20829: Initial integrate Cypress MCUBoot for 20829
Added custom mcuboot cmake for sign/encrypt by using cysecuretools

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2025-05-24 06:00:57 +02:00
Sreeram Tatapudi
968704e6b7 soc: cyw20829: add support of Secure LCS
Enable support of SECURE LCS stage. In this stage, the protection
state is set to “secure”. A secured device will boot only when the
authentication of its flash boot and application code succeeds

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-05-24 06:00:57 +02:00
Sreeram Tatapudi
7ef83fca97 soc: cyw20829: Use python script to generate app header
Instead of using app_header.c generate the app header using python
script and merge with final binary post build

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-05-24 06:00:57 +02:00
Jérôme Pouiller
d7f1c0ad5f drivers: wifi: siwx91x: Add support for Enhanced Legacy Power Save
Siwx91x support a specific mode slightly better than the old legacy PS
mode.

This mode has to be set on the NWP boot, so it is not easy to configure
it during the runtime. Hence, this patch only provide a compile time
option to enable it.

Co-authored-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-23 17:20:34 +02:00
Krzysztof Chruściński
80b9040146 soc: nordic: dmm: Add lock around sys_heap operations
sys_heap alloc and free are not thread safe so lock is needed to
prevent data corruption.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-05-23 15:31:25 +02:00
Jamie McCrae
270f5d6771 soc: nordic: Use proper devicetree entries for clock frequency
Sets the SYS_CLOCK_HW_CYCLES_PER_SEC Kconfig from devicetree
entries. Also fixes invalid configuration on nrf54h20 whereby it
attempts to take the clock frequency from a peripheral that does
not exist

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-05-23 14:04:32 +02:00
Sven Ginka
70ea3b115d drivers: pinctrl: added slew-rate setting for the sy1xx soc
With this commit we have the option to set the pad slew-rates
for all available pins on the soc.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-05-23 11:03:41 +02:00
Nazar Palamar
4c822b7e03 soc: modifications for cyw920829m2evk_02 power configuration
Added possibility to configure buck regulators according to
power profile.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2025-05-22 23:56:48 +02:00
Benson Huang
a20572703e soc: realtek: Modify image header to accelerate code loading
Use SPI frequency 50M to speedup code loading

Signed-off-by: Benson Huang <benson7633769@gmail.com>
2025-05-22 20:57:24 +02:00
Sebastian Bøe
d949932234 cpuconf: Boot the radiocore from the app in soc_late_init_hook
Boot the radiocore from the app in soc_late_init_hook.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-05-22 16:17:35 +02:00
Sebastian Bøe
c0c4170c42 soc: nrf54: Port SYS_INIT to use soc_early_init_hook
Port SYS_INIT to use soc_early_init_hook as SYS_INITs are legacy.

Due to moving dmm_init() from PRE_KERNEL_1 SYS_INIT to
soc_early_init_hook(), the DMM test is also updated to ensure that
its setup function runs before dmm_init().

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
2025-05-22 16:17:35 +02:00
Alvis Sun
9cf6d66062 soc: npcx: npcx9: disable CCDEV_SEL in early initialization.
Enabling CCDEV_SEL_EN may interfere with the expected behavior of
VCC1_RST#.
To prevent potential issues, this commit sets CCDEV_SEL_EN
to be disabled by default, ensuring reliable VCC1_RST# behavior.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-05-22 04:51:44 +02:00
Vit Stanicek
e253c3b57f soc: xtensa: Add mimxrt685s/hifi4
Add definitions, linker file and init code for mimxrt685s/hifi4 (i.MX
RT685's HiFi 4 DSP).

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-05-21 20:11:19 +02:00
Alexandre Rey
3b407609b4 soc: mcxn: formatting
Run clang-format on soc/nxp/mcx/mcxn/soc.c.

Signed-off-by: Alexandre Rey <alexandre.rey@swisstiming.com>
2025-05-21 19:56:47 +02:00
Alexandre Rey
59a23b57f6 soc: mcxn547: add support for MCXN547
Add MCXN547 support

Signed-off-by: Alexandre Rey <alexandre.rey@swisstiming.com>
2025-05-21 19:56:47 +02:00
Francois Ramu
ad0466f423 soc: st: stm32 Kconfig to retrieve the external Flash Base address
This commit is retrieving the config FLASH_BASE_ADDRESS
from the XSPI node of the stm32 device dtsi <reg> property of the
"st,stm32-xspi" node. For example the CONFIG_FLASH_BASE_ADDRESS
 is 0x90000000 and application is linked for that address.
Size is given by the size property of the "st,stm32-xspi-nor" node.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Chun-Chieh Li
369f15d8c9 soc: nuvoton: numaker: m55m1x: support mve feature
Nuvoton M55M1 series supports M-profile Vector Extension (MVE) (also
known as Arm Helium technology). This enables compute applications
such as DSP and machine learning.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-05-21 12:35:40 +02:00
Alberto Escolar Piedras
448eac13d4 soc/ambiq/apollo5x: Fix code compliance issues
Fix issues detected by checkpatch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-21 12:35:28 +02:00
Saravanan Sekar
258cc7e9cf drivers: pinctrl: mspm0: Add a pinctrl driver for TI MSPM0
Added a pinctrl driver support for MSPM0 Family.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
51bb5ddde4 drivers: clock: ti: Add initial support TI MSPM0 clock module
Add initial support TI MSPM0 clock module

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
ce2c8f2b99 soc: mspm0: Add a support for TI MSPM0-G series SoC
Add a support for Texas Instruments MSPM0 fmaily and
MSPM0-G series SoC.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Sadik Ozer
367cd74ed1 soc: Add the MAX32657 NS Peripheral
This commit adds MAX32657 Non-Secure peripheral support

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2025-05-21 08:01:25 +02:00
Peter Wang
dd1bc2434a boards: frdm_mcxa166, frdm_mcxa276: add hwinfo reset_cause support
1. enable hwinfo support
   - get_reset_cause
   - get_supported_reset_cause
   - clear_reset_cause
2. verified tests/drivers/hwinfo

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-05-20 18:27:56 +02:00
Krzysztof Chruściński
08d327d595 soc: nordic: nrf54h: Fix s2ram
Cache was not enabled when s2ram did not completed which
lead to system malfunction. Always power up cache when
returning from s2ram function.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-05-20 16:08:39 +01:00
Marcin Szymczyk
fe1b0e31b7 soc: nordic: allow setting VPR_LAUNCHER support for out of tree SoCs
Make the compilation of vpr_launcher dependent on sysbuild Kconfig
that can be set by SoC.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2025-05-20 15:24:58 +02:00
Arunmani Alagarsamy
2844850de8 soc: silabs: siwg917: Refactor siwx91x_get_nwp_config
Refactor siwx91x_get_nwp_config function to reduce its
Cognitive Complexity from 34 to below the allowed limit of 25
as per SonarQube guidelines. Extracted configuration logic into
smaller helper functions.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
88846ddc81 drivers: wifi: siwx91x: Add Wi-Fi mgmt events
- Implement event handling for AP and STA modes
- Enable configurations for security (PSK), aggregation,
  and hidden PSK credentials

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
4c1a91fa63 drivers: wifi: siwx91x: Enable AP configuration support
- Adds support for configuring client maximum inactivity timeout.
- Adds support for bandwidth, It supports 20MHZ only.
- Adds support for setting the maximum number of clients and
  hidden SSID mode by rebooting the NWP device.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Arunmani Alagarsamy
0459bd8638 drivers: wifi: siwx91x: Replace opermode flags
Replaced SL_SI91X_CLIENT_MODE and SL_SI91X_ACCESS_POINT_MODE with
WIFI_STA_MODE and WIFI_SOFTAP_MODE, respectively, for AP configuration
command intergration.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-05-20 15:24:06 +02:00
Oleh Kravchenko
4f69acc3d4 soc: stm32f1x: Add support for stop/standby modes
Add config and overlay to samples for testing stop/standby modes:

- samples/boards/st/power_mgmt/blinky
- samples/boards/st/power_mgmt/wkup_pins

I've measured consumption for each low-power mode:
- stop (regulator in run mode) ~217 uA
- stop (regulator in low-power mode) ~206 uA
- standby mode ~3.5 uA

Low-power mode wakeup timings from the datasheet,
but it barely meets these in reality:
- stop (regulator in run mode) 3.6 us
- stop (regulator in low-power mode) 5.4 us
- standby 50 us

It's possible to use RTC as idle timer to exit from stop mode.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
2025-05-20 10:16:20 +02:00
Martin Hoff
ea95e2d7f0 soc: silabs: siwx91x: add missing kconfig for ns16550 driver variant
The ns16550 UART driver has multiple variant Kconfig options. To
successfully run the uart_basic_api test, the correct variant must be
selected. This commit adds the missing Kconfig option.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-19 16:36:21 +02:00
Appana Durga Kedareswara rao
4f6b48ee6c soc: amd: Add support for AMD Versal Gen 2 RPU
Add support for the RPU, real-time processing unit on Versal Gen 2 SoC.
It is based on Cortext-R52 processor.

The patch contains initial wiring and configuration for generic board
with OCM(1MB) and DDR(2G) memories, cpu, interrupt controller, global
timer and UART.

versal2.dtsi contains common peripherals integrated into Versal Gen 2
SoC, and versal2_r52.dtsi has peripherals which are private to
Cortex-R52 processor.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-05-19 13:32:09 +02:00
Camille BAUD
7521971de8 dts: bflb: Enable efuse driver on bl60x
This enables the driver by default, it will be needed at init in the future

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 10:11:58 +02:00
Yunshao Chiang
8f8b223ff2 drivers: crypto: add it51xxx sha256 driver
Implement a crypto sha256 driver for it51xxx series.

Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
2025-05-16 19:07:37 +02:00
Chun-Chieh Li
7095608f7c drivers: usb: udc: support numaker m55m1x series soc
This supports nuvoton numaker m55m1x series soc. Besides, it also
has relevant modifications, including:
1. Fix failure to enable HICR48M, which is to clock usbd and phy
2. Support HWINFO for USB device serial number

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-05-16 16:11:54 +02:00
Anas Nashif
7e47227d87 boards: max10/nios2: remove remaining boards/socs
Remove remaining nios2 based boards and soc files.

Part of #89280

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-15 20:01:05 -04:00
Anas Nashif
d881fb334b boards: qemu_nios2: drop board definition
Remove qemu_nios2, more removals will follow.

Part of #89280

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-15 20:01:05 -04:00
Adrian Bonislawski
7918839ddd intel_adsp: ace30: Bring up ACE 3.0 (WCL)
This commit adds definition of ACE 3.0 Wildcat Lake board

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-05-15 22:14:44 +02:00
Manuel Aebischer
da6f39172f rp2350: Only add IMAGE_DEF for apps at start of flash.
The image_def header shall not be added to apps that are booted by a
bootloader, e.g. mcuboot. Added proper handling for UF2 by hanan619.

Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
2025-05-15 22:14:01 +02:00
Martin Hoff
cfb0a80df4 dts: arm: silabs: change siwg917 board ram start address
The first 1 KB is reserved for the NWP (Network Coprocessor). This
change also resolves the null pointer error issue, as a .data or a
_ramfunc might get the address 0x0.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-15 17:54:02 +02:00
Muzaffar Ahmed
a73f20214a drivers: wifi: siwx91x: Fix boot_config
Enable and rearrange some features in the boot config.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Muzaffar Ahmed
d6e106b5f0 drivers: wifi: siwx91x: Introduce flag for LIMIT_PACKET_BUF_PER_STA
Introduced WIFI_SILABS_SIWX91X_LIMIT_PACKET_BUF_PER_STA.
This flag limits packet queues in AP mode.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Jhan BoChao
7450a5249d driver: flash: add flash driver for rts5912
add flash driver for rts5912.

Signed-off-by: Jhan BoChao <jhan_bo_chao@realtek.com>
2025-05-15 11:18:22 +02:00
Harris Tomy
e31a6be0b0 soc: st: add stm32u535 support
Adds the u535 soc, similar to the u545 except without the AES HW
accelerator

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-05-14 19:36:26 +02:00
Aksel Skauge Mellbye
6a7cbff9b2 soc: silabs: siwx91x: Initialize NWP sufficiently early
The NWP provides Bluetooth, Wi-Fi and crypto services, and must
be initialized before any users of these. Mbed TLS is initialized
at priority level 40 (kernel default priority), ensure that the
NWP is initialized before that.

Make the priority configurable to allow users to tweak the init
sequence.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-14 16:27:27 +02:00
Bjarki Arge Andreasen
9dfeaf2054 soc: nordic: nrf54h: gpd: select PINCTRL
Select PINCTRL if SOC_NRF54H20_GPD is selected as it is dependent
on it.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-14 16:27:10 +02:00