drivers: pinctrl: added slew-rate setting for the sy1xx soc

With this commit we have the option to set the pad slew-rates
for all available pins on the soc.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
This commit is contained in:
Sven Ginka 2025-05-05 13:13:50 +02:00 committed by Benjamin Cabé
commit 70ea3b115d
2 changed files with 17 additions and 0 deletions

View file

@ -74,3 +74,19 @@ child-binding:
description: |
Pin mux selection. See the SOC level pinctrl header
for a defined list of these options.
slew-rate:
type: int
enum:
- 0 # 2pF
- 1 # 4pF
- 2 # 8pF
- 3 # 16pF
default: 0
description: |
Selects the output drive strength. Choices represent approximate capacitive load.
The default corresponds to the reset value of the register field.
- 0.. 2pF, Weakest drive
- 1.. 4pF, Low drive
- 2.. 8pF, Medium drive
- 3.. 16pF, Strongest drive

View file

@ -45,6 +45,7 @@ typedef struct {
(SY1XX_PULL_UP_ENABLE * DT_PROP(node, bias_pull_up)) << SY1XX_PAD_PULL_UP_OFFS | \
(SY1XX_PULL_DOWN_ENABLE * DT_PROP(node, bias_pull_down)) \
<< SY1XX_PAD_PULL_DOWN_OFFS | \
(DT_PROP(node, slew_rate) << SY1XX_PAD_DRIVE_OFFS) | \
(SY1XX_TRISTATE_ENABLE * DT_PROP(node, bias_high_impedance)) \
<< SY1XX_PAD_TRISTATE_OFFS | \
(SY1XX_OUTPUT_ENABLE & (1 - DT_PROP(node, input_enable))) << SY1XX_PAD_DIR_OFFS \