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soc: Add the MAX32657 NS Peripheral

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This commit adds MAX32657 Non-Secure peripheral support

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
This commit is contained in:
Sadik Ozer 2024-04-02 10:24:06 +03:00 • committed by Benjamin Cabé
commit 367cd74ed1
2 changed files with 48 additions and 0 deletions
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43
dts/arm/adi/max32/max32657_ns.dtsi Normal file
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@ -0,0 +1,43 @@
/*
* Copyright (c) 2024-2025 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <arm/armv8-m.dtsi>
#include <zephyr/dt-bindings/clock/adi_max32_clock.h>
/ {
soc {
sram: sram@20000000 {
ranges = <0x0 0x20000000 0x40000>;
};
peripheral: peripheral@40000000 {
ranges = <0x0 0x40000000 0x10000000>;
pinctrl: pin-controller@8000 {
ranges = <0x8000 0x40008000 0x1000>;
};
};
flc0: flash_controller@50029000 {
compatible = "adi,max32-flash-controller";
reg = <0x50029000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
status = "okay";
flash0: flash@1000000 {
compatible = "soc-nv-flash";
reg = <0x01000000 DT_SIZE_K(1024)>;
write-block-size = <16>;
erase-block-size = <8192>;
};
};
};
};
#include "max32657_common.dtsi"

5
soc/adi/max32/Kconfig
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@ -68,4 +68,9 @@ config MAX32_SECONDARY_RV32_BOOT_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_RV32_PARTITION))
depends on MAX32_SECONDARY_RV32
config BUILD_WITH_TFM
default y if TRUSTED_EXECUTION_NONSECURE
help
Auto set WITH_TFM for a Non-Secure version of the board,
endif # SOC_FAMILY_MAX32