soc: stm32f1x: Add support for stop/standby modes
Add config and overlay to samples for testing stop/standby modes: - samples/boards/st/power_mgmt/blinky - samples/boards/st/power_mgmt/wkup_pins I've measured consumption for each low-power mode: - stop (regulator in run mode) ~217 uA - stop (regulator in low-power mode) ~206 uA - standby mode ~3.5 uA Low-power mode wakeup timings from the datasheet, but it barely meets these in reality: - stop (regulator in run mode) 3.6 us - stop (regulator in low-power mode) 5.4 us - standby 50 us It's possible to use RTC as idle timer to exit from stop mode. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
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10 changed files with 182 additions and 5 deletions
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@ -15,11 +15,13 @@
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#include <zephyr/dt-bindings/adc/stm32f1_adc.h>
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#include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/power/stm32_pwr.h>
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#include <freq.h>
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/ {
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chosen {
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zephyr,flash-controller = &flash;
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zephyr,cortex-m-idle-timer = &rtc;
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};
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cpus {
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@ -29,8 +31,27 @@
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m3";
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cpu-power-states = <&stop0 &stop1>;
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reg = <0>;
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};
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power-states {
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stop0: stop0 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <0>;
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min-residency-us = <1000000>;
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exit-latency-us = <400>;
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};
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stop1: stop1 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <1>;
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min-residency-us = <1000000>;
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exit-latency-us = <600>;
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};
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};
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};
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sram0: memory@20000000 {
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@ -362,6 +383,22 @@
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};
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};
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pwr: power@40007000 {
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compatible = "st,stm32-pwr";
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reg = <0x40007000 0x400>; /* PWR register bank */
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status = "disabled";
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wkup-pins-nb = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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wkup-pin@1 {
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reg = <0x1>;
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wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_NOT_MUXED>;
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};
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};
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die_temp: dietemp {
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compatible = "st,stm32-temp";
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io-channels = <&adc1 16>;
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@ -0,0 +1,23 @@
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/*
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* Copyright (c) 2025 Oleh Kravchenko <oleh@kaa.org.ua>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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aliases {
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wkup-src = &wkup_button;
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};
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gpio_keys {
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wkup_button: wkup {
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label = "WKUP";
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gpios = <&gpioa 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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zephyr,code = <INPUT_KEY_POWER>;
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};
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};
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};
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&pwr {
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status = "okay";
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};
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@ -11,5 +11,6 @@ tests:
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- nucleo_u575zi_q
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- nucleo_u5a5zj_q
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- nucleo_wl55jc
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- nucleo_f103rb
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integration_platforms:
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- nucleo_l4r5zi
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@ -69,7 +69,11 @@ static int st_stm32_common_config(void)
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#if defined(CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP)
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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#if defined(SOC_SERIES_STM32F1X)
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LL_DBGMCU_EnableDBGSleepMode();
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LL_DBGMCU_EnableDBGStopMode();
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LL_DBGMCU_EnableDBGStandbyMode();
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#elif defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_DBGMCU_EnableD1DebugInStopMode();
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LL_DBGMCU_EnableD1DebugInSleepMode();
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#elif defined(CONFIG_SOC_SERIES_STM32MP1X)
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@ -85,7 +89,11 @@ static int st_stm32_common_config(void)
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#else
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/* keeping in mind that debugging draws a lot of power we explcitly disable when not needed */
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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#if defined(SOC_SERIES_STM32F1X)
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LL_DBGMCU_DisableDBGSleepMode();
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LL_DBGMCU_DisableDBGStopMode();
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LL_DBGMCU_DisableDBGStandbyMode();
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#elif defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_DBGMCU_DisableD1DebugInStopMode();
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LL_DBGMCU_DisableD1DebugInSleepMode();
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#elif defined(CONFIG_SOC_SERIES_STM32MP1X)
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@ -1,9 +1,10 @@
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# SPDX-License-Identifier: Apache-2.0
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zephyr_include_directories(${ZEPHYR_BASE}/drivers)
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zephyr_sources(
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soc.c
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)
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zephyr_sources(soc.c)
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zephyr_sources_ifdef(CONFIG_PM power.c)
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zephyr_sources_ifdef(CONFIG_POWEROFF poweroff.c)
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zephyr_include_directories(.)
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@ -8,5 +8,7 @@ config SOC_SERIES_STM32F1X
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select CPU_CORTEX_M3
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select CPU_CORTEX_M_HAS_DWT
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select HAS_STM32CUBE
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select HAS_PM
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select HAS_POWEROFF
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select HAS_SWO
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select SOC_EARLY_INIT_HOOK
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@ -14,4 +14,11 @@ config TASK_WDT_HW_FALLBACK_DELAY
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depends on TASK_WDT_HW_FALLBACK
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default 200
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if PM
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config COUNTER
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default y
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endif # PM
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endif # SOC_SERIES_STM32F1X
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65
soc/st/stm32/stm32f1x/power.c
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65
soc/st/stm32/stm32f1x/power.c
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@ -0,0 +1,65 @@
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/*
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* Copyright (c) 2025 Oleh Kravchenko <oleh@kaa.org.ua>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <clock_control/clock_stm32_ll_common.h>
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#include <stm32f1xx_ll_cortex.h>
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#include <stm32f1xx_ll_pwr.h>
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/pm/pm.h>
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LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
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__weak void pm_state_set(enum pm_state state, uint8_t substate_id)
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{
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switch (state) {
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case PM_STATE_SUSPEND_TO_IDLE:
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LL_LPM_DisableEventOnPend();
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LL_PWR_ClearFlag_WU();
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if (substate_id == 0) {
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/* 250 uA */
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LL_PWR_SetPowerMode(LL_PWR_MODE_STOP_MAINREGU);
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} else {
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/* 245 uA */
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LL_PWR_SetPowerMode(LL_PWR_MODE_STOP_LPREGU);
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}
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LL_LPM_EnableDeepSleep();
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k_cpu_idle();
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break;
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default:
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LOG_DBG("Unsupported power state %u", state);
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break;
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}
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}
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__weak void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
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{
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ARG_UNUSED(substate_id);
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switch (state) {
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case PM_STATE_SUSPEND_TO_IDLE:
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LL_LPM_DisableSleepOnExit();
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LL_LPM_EnableSleep();
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/* Restore the clock setup. */
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stm32_clock_control_init(NULL);
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break;
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default:
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LOG_DBG("Unsupported power substate-id %u", state);
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break;
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}
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/*
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* System is now in active mode. Reenable interrupts which were
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* disabled when OS started idling code.
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*/
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irq_unlock(0);
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}
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28
soc/st/stm32/stm32f1x/poweroff.c
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28
soc/st/stm32/stm32f1x/poweroff.c
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/*
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* Copyright (c) 2025 Oleh Kravchenko <oleh@kaa.org.ua>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stm32f1xx_ll_cortex.h>
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#include <stm32f1xx_ll_pwr.h>
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#include <zephyr/drivers/misc/stm32_wkup_pins/stm32_wkup_pins.h>
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#include <zephyr/sys/poweroff.h>
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void z_sys_poweroff(void)
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{
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#ifdef CONFIG_STM32_WKUP_PINS
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stm32_pwr_wkup_pin_cfg_pupd();
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LL_PWR_ClearFlag_WU();
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#endif /* CONFIG_STM32_WKUP_PINS */
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LL_LPM_DisableEventOnPend();
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LL_PWR_SetPowerMode(LL_PWR_MODE_STANDBY);
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LL_LPM_EnableDeepSleep();
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k_cpu_idle();
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CODE_UNREACHABLE;
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}
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@ -13,6 +13,7 @@
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#include <zephyr/init.h>
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#include <stm32_ll_system.h>
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#include <stm32f1xx_ll_bus.h>
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#include <cmsis_core.h>
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@ -31,4 +32,8 @@ void soc_early_init_hook(void)
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, system core clock is set to 8 MHz from HSI */
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SystemCoreClock = 8000000;
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#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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#endif
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}
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