`CONFIG_EXTRA_EXCEPTION_INFO` that was added in #78065 doesn't
seem necessary, as we were already storing and printing the
callee-saved-registers before that. All `CONFIG_EXTRA_EXCEPTION_INFO`
does in RISCV is to add an additional `_callee_saved_t *csf` in the
`struct arch_esf`, which overhead is negligible to what's being enabled
by `CONFIG_EXCEPTION_DEBUG`.
Let's remove `CONFIG_EXTRA_EXCEPTION_INFO`, and have that extra
`_callee_saved_t *csf` in the `struct arch_esf` as long as
`CONFIG_EXCEPTION_DEBUG` is enabled.
TL;DR: it doesn't make sense to not enable `CONFIG_EXTRA_EXCEPTION_INFO`
when `CONFIG_EXCEPTION_DEBUG` is enabled, so let's merge them.
Then, since `*csf` is always available in the `struct arch_esf` when
`CONFIG_EXCEPTION_DEBUG=y`, we can simply rely on that pointer in
`z_riscv_fatal_error()` instead of an additional argument in
`z_riscv_fatal_error_csf()`, rendering the latter redundant and thus
can be removed.
Additionally, save the callee-saved registers before jumping to
to `z_riscv_fault()`, so that callee-saved-registers are printed on
generic CPU exception as well.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Remove SOF-specific region mappings. These should be handled inside of
SOF (external module), instead of Zephyr. This way, we avoid creating
a cyclic dependency between the two.
Needed for #91061.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Changes initialization to use a function from hal_infineon. This
initialization function will initialize the AutAnalog system if needed
as well as the SystemInit.
Signed-off-by: John Batch <john.batch@infineon.com>
Use the zephyr,flash-controller node and the respective compatible
'st,stm32-xspi-nor' to detect if the device is running from external
flash, instead of assuming that the parent node of the flash is the
SPI controller. This fixes an issue when soc-nv-flash is used as the
zephyr,flash node.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Add coexistance support when enabling IEEE802.15.4 with another
radio device (BT or Wi-Fi), for ESP32-H2 and ESP32-C6.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
This reduced the amount of duplicate code and unifies the code
with other platforms.
With this change the caller and callee status registers are
stored separately. Also, a different set of status registers
are stored:
- FPSCR instead of FPDSCR. FPDSCR contains the default values
to be assigned to FPSCR when a new floating-point context
is created. It therefore seems more correct to store the
FPSCR.
- FPCCR and FPCAR are no longer stored.
FPU retention was originally added in:
8a5365c26c.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
This reduced the amount of duplicate code and unifies the code
with other platforms.
With this change fewer registers are stored and restored.
See also comment in scb.h for scb_context stating that
only essential registers are stored and restored.
No longer stored:
- ICSR
- SCR
- CFSR
- HFSR
- DFSR
- MMFAR
- BFAR
- AFSR
No longer used:
- SHPR[3..12]. This backup register was declared in the wrong way.
In core_cm33.h and core_cm4.h this is declared as an array of
12 uint8_t's. That is 3 uint32_t's.
Orignal SCB retention was added in
2055f7d595.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
This reduced the amount of duplicate code and unifies the code
with other platforms.
MPU retention was originally added in
ee9d23945f.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Correct the input section define for the device reset configuration
setting when enabling the CMake Linker Generator, which cause a build
failed when using the IAR build tool.
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
- Add support Renesas r7ka8d2kflcac SoC.
- Move sdram-controller node from r7ka8p1kflcac.dtsi to ra8x2.dtsi
since this device node is available for all RA8x2 SoCs
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
- create 'mcxe' as family and 'mcxe31x' as series
- add pinctrl_soc.h
- add soc.c/.h to do some soc level initialization
- add ecc initialization in mcxe31x_soc_initialization.S
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Some drivers need header file soc.h, according to Zephyr SoC Porting Guide
soc.h must be provided for each SoC, so created an empty one.
Signed-off-by: Lei Xu <lei.xu@nxp.com>
Signed-off-by: Jiafei Pan <jiafei.pan@nxp.com>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Update include of header file arm_mpu_mem_cfg.h which has been moved
to a Cortex-M/-R-agnostic include directory.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Only uart2 and uart6 were considered before, so if any other uart
was used, it wouldn't work and even worse, it would crash when
trying to access it because the RDC wasn't configured.
Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
When RISCV_ISA_EXT_A is enabled,
ATOMIC_OPERATIONS_BUILTIN automaticly enabled,
we don't need to do it at the soc level again.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The Kconfig symbols for selecting HAL content should be part
of the HAL module integration, not defined by the SoC. Split the
symbols between the Series 0/1 Gecko HAL and Series 2 SiSDK HAL
when moving them.
For now, the Series 0/1 HAL symbols retain their name, while new
names consistent with the symbols already defined in the module
integration layer are used for the Series 2 HAL.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Series 2 specific defconfigs for Bluetooth related options should
be set in the Series 2 specific defconfig file.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Move the Kconfig symbol for the SE HAL to hal_silabs.
Select the symbol in the entropy driver rather than unconditionally
at the SoC level.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
COUNTER_GECKO_STIMER is defined by the counter driver. It should
not be present in SoC Kconfig.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Kconfig symbols for selecting HAL content should be part of the
HAL module integration, not defined in the SoC tree.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The indirection through a backend symbol for PM implementation
isn't necessary. Define symbol for PM HAL in HAL Kconfig, and
leverage it at SoC level.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Kconfig symbols for selecting HAL content should be part of the
HAL module integration, not defined in the SoC tree. Define the
sleeptimer symbol for WiSeConnect and SiSDK since both use it.
In the future, WiSeConnect should include the SiSDK configuration
and reuse it instead of redefining everything itself. This is a
larger scale refactor that this commit doesn't start tackling.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
