New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
On the stm32u5 series, this commit will enable backup sram regulator
when the regulator is LDO, during SOC init. Then stm32_backup_sram_init
does not change the backup SRAM retention anymore.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enable IS_GEN_UICR_IMAGE by default for the gen_uicr image.
A recent change accidentally made this default n, and broke a bunch of
users.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
VIM is a vector interrupt manager that TI devices have and is used a
interrupt controller. the driver's Kconfig selection is created as "VIM"
and is resulting in the confusion with a Text Editor name.
Make the VIM Kconfig option to indicate the vendor TI name in it.
Signed-off-by: Mihira Madhava Bollapragada <madhava@ti.com>
Increase the slot size for secure applications to
support testing applications that require more than
the default size of 0x20000
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Starting in v2.21.0, the STM32 signing tool ('STM32_SigningTool_CLI')
stopped automatically adding padding bytes at the beginning of the
payload to align it to the 0x400 offset. To restore this behavior, the
'-align' flag must be passed to the signing tool post-build command.
This commit checks for signing tool version v2.21.0 or higher and
appends the '-align' flag to the post-build signing command. It also
changes local CMake variable names to lower case and corrects some
indentation issues.
Fixeszephyrproject-rtos/zephyr#99456
Signed-off-by: Chris Wilson <chris@binho.io>
Early init stack pointer can interfere with bss segments if grown
enought, therefore stack pointer is set to safe area before starting
init.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
The HAL used by the SiWx91x SoC implements a mechanism to protect
atomic sections. Since this HAL also supports a zero-latency
interrupt (ZLI) mechanism, we need to ensure the same number of
bits are used for ZLI interrupts.
The interrupt priority level (2) depends on a hardcoded value in the
Simplicity SDK (CORE_ATOMIC_BASE_PRIORITY_LEVEL).
Without this fix, arch_irq_lock (which sets the BASEPRI register to
0x4 when zero-latency interrupts are not enabled) is overridden by
CORE_EnterAtomic in the HAL, which sets BASEPRI to 0xC since the HAL
does not use the BASEPRI_MAX function. IRQ might then fires since it's
register with a lowest priority in Zephyr.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Allow placing a custom bicr.json file in the application source
folder which will be used instead of the default one in the
boards folder. Also allows setting a custom name to use for the
file so multiple files can be placed in either boards or app dirs
and selected with Kconfig (prj.conf or <board>.conf)
The following will take precedence over the bicr.json file in the
board folder:
- <app>/bicr.json
- <app>/bicr_foo.json + CONFIG_SOC_NRF54H20_BICR_NAME="bicr_foo.json"
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Added conditional compilication for 'power_state_set' function. The
changes ensure that mode of NBU domain is manually set only when
the NBU is not used. If NBU is enabled, the mode of NBU domain is
auto updated by software run on NBU.
Change include:
- Conditional checks around the NBU mode in sleep and deep sleep mode.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Adds devicetree nodes for IMR (Isolated Memory Regions)
information registers across all ACE platforms.
These registers provide information about the IMR memory region,
such as whether it is in use and its size.
Implements structures and utility functions to access
these registers and retrieve IMR information programmatically.
This allows dynamic detection of IMR availability and its size at runtime,
instead of relying on hardcoded values.
Removes the hardcoded IMR_L3_HEAP_SIZE definition since the size can now be
determined dynamically using the newly added ace_imr_get_mem_size() func.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This patch will extend MMU mapping range for hwreg1 entry
because it is required to access lower register addresses
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
In order for wake-up pins to behave properly in Standby mode on STM32WBA,
the I/O Standby Retention must be enabled. (It only comes in effect when
the SoC does enter Standby mode, and has no effect otherwise).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Fixing build errors related to reference to an incorrect define.
Adds missing headers to pinctrl_soc.h for Edge platform.
Signed-off-by: John Batch <john.batch@infineon.com>
SOC_RESET_HOOK is already too late because the code touches ram already
instead use the newer SOC_EARLY_RESET_HOOK so we can do ECC
initialization before using the memory
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
west: update hal_nxp to integrate mcux: middleware: ieee_802_15_4 MAC: Add
CONFIG_NXP_IEEE802154_MAC
zephyr: blobs: add MCXW71 & MCXW72 BLE controller and Host libraries
(ieee-802.15.4-mac) to MCUXSDK 25.09.00 release
This new version of the BLE controller is for ZigBee support and
implements ieee-802.15.4 MAC interface.
Update connectivity framework for MCXW71 & MCXW72 BLE controller
(ieee-802.15.4 MAC) from MCUXSDK 25.09 release.
Signed-off-by: Guillaume Legoupil <guillaume.legoupil@nxp.com>
Configure GPT timers as system tick source when PM is enabled to resolve
low power mode issues:
- Cortex-M SysTick loses state during mix power-off
- SysTick cannot maintain time during system suspend
Configuration changes:
- Disable Cortex-M SysTick when GPT timer is enabled
- Set GPT clock frequency to 32768 Hz for low power operation, 32k is
reserved in soc level system sleep mode
- Configure system tick rate to 1024 Hz
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree, and update all boards according to new
mechanism.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree.
Set the LDO as default to reduce out-of-tree breakage - most users were
relying on LDO being the default and it is harmless to use LDO if board
is designed for SMPS. (Existing SMPS users should break anyways since the
Kconfig symbol no longer exists, but this ensures they actively set the
power supply to SMPS in DT)
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree. Also update all boards that were defining
the Kconfig to no longer do so.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree. Also update all boards that were defining
the Kconfig to no longer do so.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Instantiate the wm8904 driver in rd_rw612_bga's DT. Add MCLK clock
configuration to rw612's soc.c. Modify pinmux definitions to route
those. Add DT and Kconfig fragments to the sample. Document output jack
utilised.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Modify board's pinctrl nodes to include the MCLK signal. Instantiate the
wm8904 driver. Add board specific Kconfig fragment and DT overlay. Set
up the MCLK signal.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Add access to functions in cold section for XTENSA_MMU_MAP_SHARED
(used for user-space threads). This allows to call functions marked
with "__cold" from user threads.
Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This patch fixes a compilation error when CONFIG_PM_DEVICE is enabled
without CONFIG_PM_DEVICE_RUNTIME and CONFIG_POWER_DOMAIN.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Add Cortex-A320 support to the unified FVP board structure with ARMv9.2-A
specific configuration parameters.
New board target:
- fvp_base_revc_2xaem/a320
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add ARMv9-A architecture support with Cortex-A510 CPU as the default
processor for generic ARMv9-A targets.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Reorganize fvp_aemv8a SOC into unified fvp_aem series with a v8a
architecture variants to enable cleaner board target naming. This also
sets the stage for upcoming ARMv9-A support.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Adds USE_INFINEON_LEGACY_HAL kconfig option to the PSOC6, CYW920829, and
xmc7200 series SOCs. These devices have not transitioned to newer HAL
based drivers yet.
Signed-off-by: John Batch <john.batch@infineon.com>
Enable p-state driver for nxp mcxn, currently tested
on frdm-mcxn236 but should be easily extendable to
other mcxn boards.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Use an override-able 'default' for CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP
rather than forcefully 'select'ing the symbol when CONFIG_DEBUG=y, as
there are situations where one might want CONFIG_DEBUG=y without inhibiting
low-power mode entry.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move the architecture-specific (but implementation dependent!) code which
performs entry in poweroff state (Shutdown/Standby without retention) to
a common implementation shared by all STM32 SoC series. This is a first
step and could be further refined at a later time; eventually, a unified
z_sys_poweroff() implementation may even be possible.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Zephyr default configuration for SYS_CLOCK_TICKS_PER_SEC
is 10000.
For smartbond this value was changed to frequency of lp_clk.
For XTAL32K SYS_CLOCK_TICKS_PER_SEC would increase to 32768
that would equal SYS_CLOCK_HW_CYCLES_PER_SEC.
One would expect SYS_CLOCK_TICKS_PER_SEC to be less then
HW clock cycles.
This restores default value for SYS_CLOCK_TICKS_PER_SEC
and changes it to 5000 only when rcx is used (that runs at
around 15kHz) and keeping it at 10000 would result in
big rounding errors.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
Add S2RAM (Suspend-to-RAM) support for i.MX943 M7_0/M7_1 cores.
When entering suspend mode, the CPU mix is powered off to save
power consumption while preserving RAM data.
Implementation follows S2RAM suspend/resume workflow:
- Save CPU context (NVIC and SCB registers)
- Configure resume vector for S2RAM detection
- Suspend to RAM preserving stack and heap context
- Enter CPU suspend mode with mix poweroff
- Resume via reset_handler -> S2RAM detection -> context restore
Core registers are lost during poweroff but RAM data is preserved.
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
