Reuse existing NXP LPSPI binding for this SoC since the hardware block
for this device is the same as the one supported for other NXP devices.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Do not select CONFIG_CACHE_MANAGEMENT in the Microchip SAM CAN driver
Kconfig but rather leave it up to the SoC/platform Kconfig to enable it as
needed and enable CACHE_MANAGEMENT by default for the Atmel SAM E70/V71 SoC
series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Currently on zephyr, RAIL is used only for bluetooth. RAIL library is
needed to use efr32 radio regardless of the protocol used. We add
SOC_GECKO_USE_RAIL kconfig option to indicate if we use radio.
FPU is needed when using RAIL, we configure it if SOC_GECKO_USE_RAIL
is set.
Signed-off-by: Antoine Bout <antoine.bout@silabs.com>
Add an option to control whether or not hpsram banks should
be switched off during the power down. This is particular useful
when running tests because we don't want to lose the contents
of the memory window before we capture it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Reuse existing MCUX-based shim driver for FlexCAN.
Enable flexcan0 for Zephyr canbus to run tests.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 8 (CCU8)
module. There are two CCU8 nodes with each one having four slices.
Each slice has two output channels.
Unlike CCU4, this module can generate complementary high-side/low-side
signals for each output channel. A variable dead time can be added
during the off to on transitions to make sure that the
high-side/low-side signals are not on at the same time.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 4 (CCU4)
module. There are four CCU4 with each one having four channels
Thus it's possible to have up to 16 pwm output signals. The output of
each channel can only be connected to a specific port/pin. The possible
connection and gpio configurations are defined using pinctrl.
The CCU4 module also has a capture mode. Capture support will be added
in the future.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Pinmuxing is now done by a pinctrl driver, not by board.c,
so the code used previously for pinmuxing can be removed.
Fixes#59186.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Introduces support for SoC-specific input-edge-detect configuration to
the CC13/26xx pinctrl driver.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
CC13/26xx's pinctrl_cc13xx_cc26xx.c driver included ioc.h and
(indirectly) pinctrl_soc.h which contained duplicate defines.
This change removes the header conflict and redundant definitions.
This prepares for subsequent changes in this change set that add
additional flags to the pinctrl driver which would otherwise trigger the
header conflict.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Add Kconfig RISCV_SOC_HAS_CUSTOM_SYS_IO symbol so that a riscv
SoC can set to specify that it has a custom implementation for
sys_io functions.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Some EFR32 build broke after 3d2194f11e with:
pm.c:152: undefined reference to `pm_state_exit_post_ops'
Add an extra empty function to make this one build again.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added dts additions for stm32f105xb cpu which is the same as existing
stm32f105xc with less flash.
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
The Keystone 3 (K3) family encompasses a wider variety of SoC's.
This aligns the soc/arm64 naming with the soc/arm directory.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add a new pinctrl type to control peripheral modules' specific IO
characteristics such as tri-state, the power supply type selection (3.3V
or 1.8V), and so on. In NPCX series, the corresponding registers/fields
are irregular. This CL wraps these definitions to dt nodes and put them
in pinctrl property if needed.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The PM hooks were guarded with CONFIG_PM_POLICY_CUSTOM, however, they
need to be guarded (if file is always compiled) with CONFIG_PM. In fact,
CONFIG_PM_POLICY_CUSTOM requires to implement a custom policy hook,
something this module did not provide.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Remove unnecessary __weak attribute from power management functions.
These functions are now defined once, globally, and mandatory for
systems that support CONFIG_PM.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add a new Kconfig option that has to be selected by SoCs providing PM
hooks. This option will be now required to enable CONFIG_PM. Before this
change, CONFIG_PM could always be enabled, regardless of SoC providing
any kind of low-power support.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The clock rates for ACE series of Intel Audio DSP have changed.
The values come from the SOF project in their board configs.
CONFIG_XTENSA_CCOUNT_HZ is also set so the arch timing test
can pass.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Updated the clock init to reflect the sdk also
updated the clock frequencies to reflect the
respective soc clock values, this file originally
contained unexpected clock values, updated comments
to reflect changes and got rid of doxygen style
comments
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add CONFIG_SOC_ANDES_V5_IOCP to indicate Andes I/O Coherence Port handle
cache coherency between cache and external non-caching master, such as DMA
controller.
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
