soc: quicklogic_eos_s3: remove unneeded code

Pinmuxing is now done by a pinctrl driver, not by board.c,
so the code used previously for pinmuxing can be removed.

Fixes #59186.

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This commit is contained in:
Wojciech Sipak 2023-07-06 12:20:21 +02:00 committed by Carles Cufí
commit 69d0f03ebd
3 changed files with 0 additions and 28 deletions

View file

@ -20,20 +20,6 @@ void eos_s3_lock_disable(void)
MISC_CTRL->LOCK_KEY_CTRL = 1;
}
int eos_s3_io_mux(uint32_t pad_nr, uint32_t pad_cfg)
{
volatile uint32_t *p = (uint32_t *)IO_MUX_BASE;
if (pad_nr > EOS_S3_MAX_PAD_NR) {
return -EINVAL;
}
p += pad_nr;
*p = pad_cfg;
return 0;
}
static void eos_s3_cru_init(void)
{
/* Set desired frequency */

View file

@ -46,11 +46,7 @@
#define OSC_SET_FREQ_INC(FREQ) (AIP->OSC_CTRL_1 = ((FREQ / 32768) - 3) & 0xFFF)
#define OSC_GET_FREQ_INC() (((AIP->OSC_CTRL_1 & 0xFFF) + 3) * 32768)
#define EOS_S3_MAX_PAD_NR 45
void eos_s3_lock_enable(void);
void eos_s3_lock_disable(void);
int eos_s3_io_mux(uint32_t pad_nr, uint32_t pad_cfg);
#endif /* _SOC__H_ */

View file

@ -9,14 +9,4 @@
#include <soc.h>
/* Set UART TX to PAD44 */
#define UART_TXD_PAD44 (UART_TXD_SEL_PAD44 | PAD_CTRL_SEL_AO_REG \
| PAD_OEN_NORMAL | PAD_P_Z | PAD_SR_SLOW \
| PAD_E_4MA | PAD_REN_DISABLE | PAD_SMT_DISABLE)
/* Set UART RX to PAD45 */
#define UART_RXD_PAD45 (UART_RXD_SEL_PAD45 | PAD_CTRL_SEL_AO_REG \
| PAD_OEN_DISABLE | PAD_P_Z | PAD_SR_SLOW \
| PAD_E_4MA | PAD_REN_ENABLE | PAD_SMT_DISABLE)
#endif /* _QUICKLOGIC_EOS_S3_SOC_PINMAP_H_ */