drivers: adc: add ADC driver for EFM32
This adds a driver for ADCs available on EFM32 Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This commit is contained in:
Wojciech Sipak
Fabio Baltieri
parent
b3c46083fb
commit
c811a4f430
6 changed files with 356 additions and 0 deletions
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@ -37,6 +37,7 @@ zephyr_library_sources_ifdef(CONFIG_ADC_ADS114S0X adc_ads114s0x.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_RPI_PICO adc_rpi_pico.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_XMC4XXX adc_xmc4xxx.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_ESP32 adc_esp32.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_GECKO_ADC adc_gecko.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_GECKO_IADC iadc_gecko.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_INFINEON_CAT1 adc_ifx_cat1.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_SMARTBOND_GPADC adc_smartbond_gpadc.c)
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@ -11,3 +11,12 @@ config ADC_GECKO_IADC
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select ADC_CONFIGURABLE_INPUTS
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help
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Enable the driver implementation for the Silabs GeckoEXX32 Incremental ADC
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config ADC_GECKO_ADC
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bool "Gecko ADC driver"
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default y
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depends on DT_HAS_SILABS_GECKO_ADC_ENABLED
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select SOC_GECKO_ADC
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select ADC_CONFIGURABLE_INPUTS
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help
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Enable the driver implementation for the Silabs GeckoEFM32 ADC
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315
drivers/adc/adc_gecko.c
Normal file
315
drivers/adc/adc_gecko.c
Normal file
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@ -0,0 +1,315 @@
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/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT silabs_gecko_adc
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#include <zephyr/drivers/adc.h>
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#include <em_adc.h>
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#include <em_cmu.h>
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(adc_gecko, CONFIG_ADC_LOG_LEVEL);
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/* Number of channels available. */
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#define GECKO_CHANNEL_COUNT 16
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struct adc_gecko_channel_config {
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bool initialized;
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ADC_Ref_TypeDef reference;
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ADC_PosSel_TypeDef input_select;
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};
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struct adc_gecko_data {
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const struct device *dev;
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struct adc_context ctx;
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uint16_t *buffer;
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uint16_t *repeat_buffer;
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uint32_t channels;
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uint8_t channel_id;
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ADC_Res_TypeDef resolution;
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struct adc_gecko_channel_config channel_config[GECKO_CHANNEL_COUNT];
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};
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struct adc_gecko_config {
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ADC_TypeDef *base;
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void (*irq_cfg_func)(void);
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uint32_t frequency;
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};
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static void adc_gecko_set_config(const struct device *dev)
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{
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struct adc_gecko_data *data = dev->data;
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struct adc_gecko_channel_config *channel_config = NULL;
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const struct adc_gecko_config *config = dev->config;
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ADC_TypeDef *adc_base = (ADC_TypeDef *)config->base;
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ADC_Init_TypeDef init = ADC_INIT_DEFAULT;
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ADC_InitSingle_TypeDef initSingle = ADC_INITSINGLE_DEFAULT;
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channel_config = &data->channel_config[data->channel_id];
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init.prescale = ADC_PrescaleCalc(config->frequency, 0);
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init.timebase = ADC_TimebaseCalc(0);
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initSingle.diff = false;
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initSingle.reference = channel_config->reference;
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initSingle.resolution = data->resolution;
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initSingle.acqTime = adcAcqTime4;
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initSingle.posSel = channel_config->input_select;
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ADC_Init(adc_base, &init);
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ADC_InitSingle(adc_base, &initSingle);
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}
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static int adc_gecko_check_buffer_size(const struct adc_sequence *sequence,
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uint8_t active_channels)
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{
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size_t needed_buffer_size;
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needed_buffer_size = active_channels * sizeof(uint16_t);
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if (sequence->options) {
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needed_buffer_size *= (1 + sequence->options->extra_samplings);
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}
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if (sequence->buffer_size < needed_buffer_size) {
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LOG_DBG("Provided buffer is too small (%u/%u)",
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sequence->buffer_size, needed_buffer_size);
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return -ENOMEM;
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}
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return 0;
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}
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static int start_read(const struct device *dev, const struct adc_sequence *sequence)
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{
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struct adc_gecko_data *data = dev->data;
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uint32_t channels;
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uint8_t channel_count;
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uint8_t index;
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int res;
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/* Check if at least 1 channel is requested */
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if (sequence->channels == 0) {
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LOG_DBG("No channel requested");
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return -EINVAL;
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}
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if (sequence->oversampling) {
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LOG_ERR("Oversampling is not supported");
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return -ENOTSUP;
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}
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/* Verify all requested channels are initialized and store resolution */
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channels = sequence->channels;
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channel_count = 0;
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while (channels) {
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/* Iterate through all channels and check if they are initialized */
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index = find_lsb_set(channels) - 1;
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if (index >= GECKO_CHANNEL_COUNT) {
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LOG_DBG("Requested channel index not available: %d", index);
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return -EINVAL;
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}
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if (!data->channel_config[index].initialized) {
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LOG_DBG("Channel not initialized");
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return -EINVAL;
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}
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channel_count++;
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channels &= ~BIT(index);
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}
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res = adc_gecko_check_buffer_size(sequence, channel_count);
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if (res < 0) {
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return res;
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}
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data->buffer = sequence->buffer;
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adc_context_start_read(&data->ctx, sequence);
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res = adc_context_wait_for_completion(&data->ctx);
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return res;
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}
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static void adc_gecko_start_channel(const struct device *dev)
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{
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const struct adc_gecko_config *config = dev->config;
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struct adc_gecko_data *data = dev->data;
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ADC_TypeDef *adc_base = (ADC_TypeDef *)config->base;
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data->channel_id = find_lsb_set(data->channels) - 1;
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adc_gecko_set_config(data->dev);
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ADC_IntEnable(adc_base, ADC_IEN_SINGLE);
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ADC_Start(adc_base, adcStartSingle);
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct adc_gecko_data *data = CONTAINER_OF(ctx, struct adc_gecko_data, ctx);
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data->channels = ctx->sequence.channels;
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adc_gecko_start_channel(data->dev);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx, bool repeat_sampling)
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{
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struct adc_gecko_data *data = CONTAINER_OF(ctx, struct adc_gecko_data, ctx);
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if (repeat_sampling) {
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data->buffer = data->repeat_buffer;
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}
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}
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static void adc_gecko_isr(void *arg)
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{
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const struct device *dev = (const struct device *)arg;
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const struct adc_gecko_config *config = dev->config;
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struct adc_gecko_data *data = dev->data;
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ADC_TypeDef *adc_base = config->base;
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uint32_t sample = 0;
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uint32_t flags, err;
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flags = ADC_IntGet(adc_base);
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__ASSERT(flags & ADC_IF_SINGLE, "unexpected ADC IRQ (flags=0x%08x)!", flags);
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err = flags & (ADC_IF_EM23ERR | ADC_IF_PROGERR | ADC_IF_VREFOV | ADC_IF_SINGLEOF);
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if (!err) {
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sample = ADC_DataSingleGet(adc_base);
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*data->buffer++ = (uint16_t)sample;
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data->channels &= ~BIT(data->channel_id);
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if (data->channels) {
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adc_gecko_start_channel(dev);
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} else {
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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} else {
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LOG_ERR("ADC conversion error, flags=%08x", err);
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adc_context_complete(&data->ctx, -EIO);
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}
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ADC_IntClear(adc_base, ADC_IF_SINGLE | err);
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}
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static int adc_gecko_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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struct adc_gecko_data *data = dev->data;
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int error;
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adc_context_lock(&data->ctx, false, NULL);
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error = start_read(dev, sequence);
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adc_context_release(&data->ctx, error);
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return error;
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}
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static int adc_gecko_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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struct adc_gecko_data *data = dev->data;
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struct adc_gecko_channel_config *channel_config = NULL;
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if (channel_cfg->channel_id < GECKO_CHANNEL_COUNT) {
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channel_config = &data->channel_config[channel_cfg->channel_id];
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} else {
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LOG_DBG("Requested channel index not available: %d", channel_cfg->channel_id);
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return -EINVAL;
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}
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channel_config->initialized = false;
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channel_config->input_select = channel_cfg->input_positive;
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switch (channel_cfg->gain) {
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case ADC_GAIN_1:
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break;
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default:
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LOG_ERR("unsupported channel gain '%d'", channel_cfg->gain);
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return -ENOTSUP;
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}
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switch (channel_cfg->reference) {
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case ADC_REF_VDD_1:
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channel_config->reference = adcRef5V;
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break;
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case ADC_REF_VDD_1_2:
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channel_config->reference = adcRef2V5;
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break;
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case ADC_REF_VDD_1_4:
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channel_config->reference = adcRef1V25;
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break;
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default:
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LOG_ERR("unsupported channel reference type '%d'", channel_cfg->reference);
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return -ENOTSUP;
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}
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channel_config->initialized = true;
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return 0;
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}
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static int adc_gecko_init(const struct device *dev)
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{
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const struct adc_gecko_config *config = dev->config;
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struct adc_gecko_data *data = dev->data;
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CMU_ClockEnable(cmuClock_HFPER, true);
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CMU_ClockEnable(cmuClock_ADC0, true);
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data->dev = dev;
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data->resolution = adcRes12Bit;
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config->irq_cfg_func();
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api api_gecko_adc_driver_api = {
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.channel_setup = adc_gecko_channel_setup,
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.read = adc_gecko_read,
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};
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#define GECKO_ADC_INIT(n) \
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\
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static void adc_gecko_config_func_##n(void); \
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\
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const static struct adc_gecko_config adc_gecko_config_##n = { \
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.base = (ADC_TypeDef *)DT_INST_REG_ADDR(n), \
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.irq_cfg_func = adc_gecko_config_func_##n, \
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.frequency = DT_INST_PROP(n, frequency), \
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}; \
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static struct adc_gecko_data adc_gecko_data_##n = { \
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ADC_CONTEXT_INIT_TIMER(adc_gecko_data_##n, ctx), \
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ADC_CONTEXT_INIT_LOCK(adc_gecko_data_##n, ctx), \
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ADC_CONTEXT_INIT_SYNC(adc_gecko_data_##n, ctx), \
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}; \
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static void adc_gecko_config_func_##n(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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adc_gecko_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}; \
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DEVICE_DT_INST_DEFINE(n, \
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&adc_gecko_init, NULL, \
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&adc_gecko_data_##n, &adc_gecko_config_##n,\
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POST_KERNEL, CONFIG_ADC_INIT_PRIORITY, \
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&api_gecko_adc_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(GECKO_ADC_INIT)
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25
dts/bindings/adc/silabs,gecko-adc.yaml
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25
dts/bindings/adc/silabs,gecko-adc.yaml
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@ -0,0 +1,25 @@
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# Copyright (c) 2023 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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description: Silicon Labs Gecko Series 1 ADC
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compatible: "silabs,gecko-adc"
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include: adc-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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frequency:
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type: int
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required: true
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"#io-channel-cells":
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const: 1
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io-channel-cells:
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- input
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@ -39,6 +39,11 @@ config SOC_GECKO_CORE
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help
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Set if the Core interrupt handling (CORE) HAL module is used.
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config SOC_GECKO_ADC
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bool
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help
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Set if the Analog to Digital Converter (ADC) HAL module is used.
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config SOC_GECKO_IADC
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bool
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help
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@ -19,5 +19,6 @@ config SOC_SERIES_EFM32PG12B
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select SOC_GECKO_EMU
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select SOC_GECKO_GPIO
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select SOC_GECKO_TRNG
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select SOC_GECKO_ADC
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help
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Enable support for EFM32 PearlGecko MCU series
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