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drivers: i2c_mcux: update to compatible with S32K344

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Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
This commit is contained in:
Cong Nguyen Huu 2023-07-10 13:37:46 +07:00 • committed by Mahesh Mahadevan
commit 3d1285bc40
7 changed files with 74 additions and 5 deletions
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16
boards/arm/mr_canhubk3/doc/index.rst
View file

@ -51,6 +51,7 @@ SIUL2 on-chip | pinctrl
LPUART on-chip serial
QSPI on-chip flash
FLEXCAN on-chip can
LPI2C on-chip i2c
============ ========== ================================
The default configuration can be found in the Kconfig file
@ -175,6 +176,21 @@ flexcan5 | 8 bytes | 32 MBs | 32 MBs
accomplished using one of the included CAN termination boards. For more details, refer
to the section ``6.3 CAN Connectors`` in the Hardware User Manual of `NXP MR-CANHUBK3`_.
I2C
===
I2C is provided through LPI2C interface with 2 instances ``lpi2c0`` and ``lpi2c1``
on corresponding connectors ``P4``, ``P3``.
========= ===== ============
Connector Pin Pin Function
========= ===== ============
P3.2 PTD9 LPI2C1_SCL
P3.3 PTD8 LPI2C1_SDA
P4.3 PTD14 LPI2C0_SCL
P4.4 PTD13 LPI2C0_SDA
========= ===== ============
FS26 SBC Watchdog
=================

18
boards/arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi
View file

@ -176,4 +176,22 @@
output-enable;
};
};
lpi2c0_default: lpi2c0_default {
group1 {
pinmux = <(PTD13_LPI2C0_SDA_I | PTD13_LPI2C0_SDA_O)>,
<(PTD14_LPI2C0_SCL_I | PTD14_LPI2C0_SCL_O)>;
input-enable;
output-enable;
};
};
lpi2c1_default: lpi2c1_default {
group1 {
pinmux = <(PTD8_LPI2C1_SDA_I | PTD8_LPI2C1_SDA_O)>,
<(PTD9_LPI2C1_SCL_I | PTD9_LPI2C1_SCL_O)>;
input-enable;
output-enable;
};
};
};

12
boards/arm/mr_canhubk3/mr_canhubk3.dts
View file

@ -308,3 +308,15 @@
sample-point-data = <875>;
sjw-data = <1>;
};
&lpi2c0 {
pinctrl-0 = <&lpi2c0_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
};
&lpi2c1 {
pinctrl-0 = <&lpi2c1_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
};

1
boards/arm/mr_canhubk3/mr_canhubk3.yaml
View file

@ -13,3 +13,4 @@ supported:
- gpio
- uart
- can
- i2c

10
drivers/i2c/i2c_mcux_lpi2c.c
View file

@ -494,6 +494,11 @@ static int mcux_lpi2c_init(const struct device *dev)
return -ENODEV;
}
error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (error) {
return error;
}
if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
&clock_freq)) {
return -EINVAL;
@ -513,11 +518,6 @@ static int mcux_lpi2c_init(const struct device *dev)
return error;
}
error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (error) {
return error;
}
config->irq_config_func(dev);
return 0;

21
dts/arm/nxp/nxp_s32k344_m7.dtsi
View file

@ -7,6 +7,7 @@
#include <arm/armv7-m.dtsi>
#include <mem.h>
#include <zephyr/dt-bindings/clock/nxp_s32k344_clock.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
/ {
cpus {
@ -484,6 +485,26 @@
interrupt-names = "ored", "ored_0_31_mb";
status = "disabled";
};
lpi2c0: i2c@40350000 {
compatible = "nxp,imx-lpi2c";
reg = <0x40350000 0x10000>;
clocks = <&clock NXP_S32_LPI2C0_CLK>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <161 0>;
status = "disabled";
};
lpi2c1: i2c@40354000 {
compatible = "nxp,imx-lpi2c";
reg = <0x40354000 0x10000>;
clocks = <&clock NXP_S32_LPI2C1_CLK>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <162 0>;
status = "disabled";
};
};
};

1
soc/arm/nxp_s32/s32k/Kconfig.series
View file

@ -17,5 +17,6 @@ config SOC_SERIES_S32K3_M7
select HAS_MCUX
select HAS_MCUX_LPUART
select HAS_MCUX_FLEXCAN
select HAS_MCUX_LPI2C
help
Enable support for NXP S32K3 MCUs family on Cortex-M7 cores