reset data->scan_cb on fail, otherwise we can't
try it again, because we check it at the begining
and return when it is already set.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
pd_mac_sap_handler gPdDataInd_c case shouldn't free msg
as it is already freed by the rx_thread. The msg is put
in rx_msgq queue through k_msgq_put which does a shallow
copy.
Signed-off-by: Andrei Menzopol <andrei.menzopol@nxp.com>
nRF USBD peripheral allows only one DMA to/from isochronous endpoint in
between two SOF packets. nRF UDC driver enforces this limitation using
m_ep_ready variable that has respective endpoint bit set to 1 inside SOF
handler. While this works most of the time, there is a corner case where
the DMA can start before SOF and finish after SOF.
Prevent issuing two DMA to/from isochronous endpoint within one frame by
not setting m_ep_ready bit if isochronous endpoint DMA was active during
SOF. This avoids failed assertion for iso IN endpoint being armed and
ready at the same time.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Endpoint dequeue is inherently racing against bus transactions. It is
possible that transfer finishes right before dequeue. When this happens
it was possible for the endpoint queue to be empty during xfer finished
handling. Resolve the software thread race by performing dequeue in the
same thread that handles finished transfers.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The counter_api_get_pending_int typedef returns uint32_t, but the
public counter_get_pending_int API, its inline implementation, and
its syscall handler all return int. Several drivers return raw hardware
register bitmasks that can have upper bits set; the implicit cast to
int would make those values appear negative, which callers could
misinterpret as error codes.
Change the public API, inline impl, and syscall handler to return
uint32_t to match the driver API typedef.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Fixes:
zephyr/drivers/usb/common/nrf_usbd_common/nrf_usbd_common.c:414:23:
warning: unused function 'ep_to_hal' [-Wunused-function]
zephyr/drivers/usb/common/nrf_usbd_common/nrf_usbd_common.c:816:22:
warning: unused function 'usbd_ep_iso_capacity' [-Wunused-function]
When compiling with LLVM:
west build -p -b nrf52840dk/nrf52840 samples/subsys/usb/hid-keyboard --
-DTOOLCHAIN_VARIANT_COMPILER=llvm
Drop ep_to_hal since it's static and unused, usbd_ep_iso_capacity is
used in an assert just flag it as maybe unused.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
When the device is connected to the host, but the application shuts down
and initialize USB device again, there will be no UDC_EVT_VBUS_READ
event generated from USB VBUS regulator on nRF52840 and nRF5340
controller. We can track the state in the driver and resubmit the event
just at the beginning of the initialization. If the device gets
disconnected in between, there will be subsequent UDC_EVT_VBUS_REMOVED
event. Perhaps it could also be solved in more generic way, but other
controllers could behave differently. Also, it could be considered that
the application should track the state of the VBUS.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Fix a dangling pointer warning in adc_shell.c by placing the
help text in a static variable instead of returning a pointer
to a local variable.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Some systems can have board layout that can cause PHY
reset to be slower. So add more checkes to make sure
PHY is completely out of reset. We basically check
1) Power down bit from BMCR register
2) Reset bit from BMCR register
3) Factory Bit in OMSO register
Tested:
Verified that on a system with slow PHY
reset, the bit verification logic helps
ensure PHY is out of reset.
If the PHY takes longer thann 0.5s, then the
PHY bit checking logic helps surface the problem.
Signed-off-by: Nikhil Namjoshi <nikhilnamjoshi@google.com>
The infineon dmic driver did not correctly track the address offset into
the current receive buffer and there were also issues with the transfer
size calculations. This change corrects these issues.
Signed-off-by: Brett Peterson <brett.peterson@infineon.com>
set band info in scaned aps.
As the esp32-c5 supports 5 Ghz, the info can there otherwise
be wrong.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The driver never enabled the transfer error interrupt. If a transfer error
occurred, the ISR would not be called which could result in a deadlock.
Make sure the transfer error interrupt is enabled.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add driver support for MCAN module on TI's MSPM0 G-Series MCUs.
The MCAN module supports both classic CAN and CAN FD protocols.
Signed-off-by: Santhosh Charles <santhosh@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
Signed-off-by: Tomasz Bursztyka <tobu@bang-olufsen.dk>
Add support for the CANCLK source for MSPM0. `mspm0_canclk_cfg`
config struct is used to get rate.
Signed-off-by: Santhosh Charles <santhosh@linumiz.com>
The Cadence SPI driver relied on a conditional guard around software RX
accounting (tx_remain_entry/fifo_diff) in spi_cdns_send(). During
opcode/address/dummy phases (e.g., SPI NOR reads), the RX segment may be
NULL (discard), causing the guard to evaluate false. This prevented the
driver from tracking RX entries generated by each TX entry and could
lead to RX FIFO overflow.
Fix this by always decrementing tx_remain_entry and incrementing
fifo_diff for every TX FIFO entry pushed. Since SPI is full‑duplex, each
TX entry clocks in one RX entry, regardless of whether the client
provides an RX buffer for that phase. The ISR drains RX while fifo_diff
> 0, so keeping fifo_diff accurate prevents overflow.
Also update spi_cdns_recv() RX context handling to be mode-aware:
- In slave mode, advance RX context only when an RX buffer is present.
- In master mode, advance RX context for each received frame.
This keeps slave receive accounting consistent while preserving correct
master behavior, and aligns with the software-tracking approach used to
avoid unreliable RX_NOT_EMPTY status (AR#65885).
As part of this change, refactor spi_cdns_recv() to reduce cognitive
complexity and improve readability, without changing functional behavior.
Signed-off-by: Srikanth Boyapally <srikanth.boyapally@amd.com>
Register a pm_action callback that disconnects RF GPIO pins
(antenna enable, TX/RX FE_CTRL) on suspend and reconfigures
them on resume.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
When CONFIG_LORA_SX126X_NATIVE_SLEEP=n, sx126x_ensure_ready() returned
immediately without re-enabling the DIO1 interrupt. On the STM32WL the
radio ISR disables itself on entry (irq_disable), so the interrupt must be
explicitly re-armed before each TX/RX operation.
This caused every send after the first to time out because the TX_DONE
interrupt was never delivered.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Includes file for mapping DFP macros to follow a common macro
name for sercom spi g1 driver
Optimizes the driver
Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
Wire the Kinetis LMEM-capable SoCs into the generic cache
management path by selecting the LMEM driver, enabling the
available instruction and system-bus cache capabilities, and
defaulting these parts to CACHE_MANAGEMENT with the external
cache backend.
Keep MCUX eDMA descriptors in the default SRAM placement on
SYSMPU-based Kinetis parts. Their SRAM region remains outside
the cached LMEM area, so they do not use the generic
NOCACHE_MEMORY path.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Add LMEM data-cache operations to the NXP LMEM cache driver for
SoCs that expose the system-bus cache and select CONFIG_DCACHE.
Rely on SoC Kconfig capability selection instead of driver-local
unsupported stubs so instruction-only LMEM parts only build
instruction-cache support.
This keeps one driver for both instruction-only LMEM parts and
SoCs that also expose the LMEM system-bus cache.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
After #99399 the workaround for errata 58 in nRF52 chips is removed from
zephyr RTOS and is now part of the nrfx sdk. The initial glue code
between zephyr->nrfx 4.0.0 missed the initializatio of the errata 58
workaround. This commit adds the initialization to the glue code. Given
the errata only applies to nRF52 chips, is safe to assume there is a
single GPIOTE instance present.
Signed-off-by: Jose Morales <josfemova@gmail.com>
In order to use HIBERNATE sleep mode, retention of RAM block used
for hibernating the VPR core need to be enabled. Contrary to all other
blocks, retention for this block is usually by default disabled.
Add property to vpr coprocessor node which indicates if hibernation
is going to be used. It need to be used on nRF54L to achieve low
idle current. On nRF54H20 it is not needed as DEEPSLEEP mode gives
good idle current (~5 uA).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Fix swapped dev_id and clk_id arguments in the calls to
tisci_cmd_clk_is_on() and tisci_cmd_clk_is_off() within
tisci_get_status(), aligning them with the TISCI API signature.
Signed-off-by: Dave Joseph <d-joseph@ti.com>
Change format specifier to %zu for size_t. While at it, also change
required_size to size_t, for better compatibility. This prevents
compilation warnings.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Use CAN_MCAN_DT_INST_MRAM_ADDR() for setting the Bosch M_CAN message RAM
address from DTS as this takes the message RAM offset into account.
Fixes: #105113
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename "_msg" variable to "msg" to avoid shadowing the "_msg" variable used
in the LOG_* macros.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Start/stop functions should return -EALREADY is the setup is already set.
If start/stop functions are called multiple times they trigger an assert.
Signed-off-by: Andrei Menzopol <andrei.menzopol@nxp.com>
Update the MCUX WWDT driver to partially use the Zephyr clock control API
instead of direct HAL clock APIs for clock on and get rate.
Keep using HAL clock APIs for set clock divider because the set rate API
accepts clock frequency and it may cause two external calls to get WWDT
frequency.
Support multiple instances.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Add clock control support for MCUX WWDT instances (wwdt0 and wwdt1)
in the MCUX SYSCON clock control driver. This enables proper clock
gating and frequency retrieval for WWDT peripherals across multiple
NXP SoC families.
The patch add support for turn on WWDT clock and get it's rate.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Update the MCUX i.MX WDOG driver to support multiple device instances
instead of being hardcoded to instance 0.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Update the MCUX WDOG32 driver to support multiple device instances
instead of being hardcoded to instance 0.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
The Arducam mega is a low power, rolling shutter camera, supports
connecting one or more cameras to any microcontroller. It provides
high-quality image capture and processing capabilities, making it
highly suitable for various application fields, including machine
vision, image recognition, and robotics, among others. In current
implementation connecting multiple instances of the same camera
system is problematic.
Co-authored-by: Lee Jackson <lee.jackson@arducam.com>
Signed-off-by: Krystian Balicki <kristos_b@wp.pl>
In driver file flash_stm32wba_fm.c, rename ble_ctrl_work_q
to ble_ctle_work_q and make ble_ctle_work_q non-static
in SoC code
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
Add WWDG support for STM32C5. Replace the IS_WWDG_COUNTER macro (that
doesn't exist in the STM32C5 LL) by the IN_RANGE macro.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add the *_FreezePeriph function for STM32C5. While at it, fix the driver
for C0/F0/G0/L0 by calling the *_FreezePeriph function once the DBGMCU
clock is enabled (a #endif was missing). It is done the same
way for WWDG driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Some macros used in the IWDG driver are no longer present in HAL2. Replace
them by doing the same operation directly.
Also make some clean up/cosmetic changes.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
As net_if_set_link_addr() is now already done by the
overlaying net_mgmt, we no longer need to do it
in the drivers
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Refactor read and write functions to handle large transfers with chunking.
Adjust the buffer size to the default 128 bytes. Simplify start/stop
condition logic.
Signed-off-by: Sven Ginka <s.ginka@sensry.de>
Implement proper support for isochronous operation when "st,stm32-usb" IP
is used. Previously, the driver did not take into account specificities of
this IP regarding isochronous endpoints resulting in invalid transfers.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Update the copyright notice to use SPDX-FileCopyrightText. While at it, add
STMicroelectronics to the list of copyright holders as we have made
numerous contributions to this driver recently.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move options such that all generic options go toghether, followed by
hardware-specific ones and wrap the HW-specific options in dedicated menus.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add sleep hold flag to allow setting groups of pins to
automatically hold pad value during low power states (light/deep sleep).
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
