drivers: debug: silabs_pti: Add driver for Packet Trace Interface
The Packet Trace Interface is a debug interface that emits TX and RX packet data over a serial connection in real time. Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
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4 changed files with 90 additions and 0 deletions
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@ -4,4 +4,5 @@
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zephyr_library()
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# zephyr-keep-sorted-start
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zephyr_library_sources_ifdef(CONFIG_DEBUG_SILABS_PTI debug_silabs_pti.c)
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# zephyr-keep-sorted-stop
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@ -15,6 +15,7 @@ config DEBUG_DRIVER_INIT_PRIORITY
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Debug drivers initialization priority.
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# zephyr-keep-sorted-start
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source "drivers/debug/Kconfig.silabs"
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# zephyr-keep-sorted-stop
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module = DEBUG_DRIVER
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12
drivers/debug/Kconfig.silabs
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12
drivers/debug/Kconfig.silabs
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@ -0,0 +1,12 @@
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# Copyright (c) 2025 Silicon Laboratories Inc.
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# SPDX-License-Identifier: Apache-2.0
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config DEBUG_SILABS_PTI
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bool "Silicon Labs Packet Trace Interface"
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default y
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depends on DT_HAS_SILABS_PTI_ENABLED
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depends on PINCTRL
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depends on SOC_GECKO_USE_RAIL
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help
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Enable the Packet Trace Interface, providing a mechanism for viewing
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transmitted and received radio packets for network sniffing or debugging.
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76
drivers/debug/debug_silabs_pti.c
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76
drivers/debug/debug_silabs_pti.c
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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/pinctrl.h>
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#include <rail.h>
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#define DT_DRV_COMPAT silabs_pti
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struct silabs_pti_config {
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const struct pinctrl_dev_config *pcfg;
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RAIL_PtiMode_t mode;
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uint32_t baud;
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};
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int silabs_pti_init(const struct device *dev)
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{
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const struct silabs_pti_config *config = dev->config;
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const struct pinctrl_state *state;
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RAIL_PtiConfig_t pti_config = {
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.mode = config->mode,
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.baud = config->baud,
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};
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RAIL_Status_t status;
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int err;
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/* The RAIL API to configure PTI requires GPIO port and pin as part of its configuration
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* struct, and does the pin configuration itself internally. Create the configuration
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* struct from the pinctrl node instead of using pinctrl_apply_state().
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*/
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err = pinctrl_lookup_state(config->pcfg, PINCTRL_STATE_DEFAULT, &state);
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if (err < 0) {
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return err;
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}
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for (int i = 0; i < state->pin_cnt; i++) {
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switch (state->pins[i].en_bit) {
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case _GPIO_FRC_ROUTEEN_DCLKPEN_SHIFT:
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pti_config.dclkPort = state->pins[i].port;
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pti_config.dclkPin = state->pins[i].pin;
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break;
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case _GPIO_FRC_ROUTEEN_DFRAMEPEN_SHIFT:
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pti_config.dframePort = state->pins[i].port;
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pti_config.dframePin = state->pins[i].pin;
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break;
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case _GPIO_FRC_ROUTEEN_DOUTPEN_SHIFT:
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pti_config.doutPort = state->pins[i].port;
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pti_config.doutPin = state->pins[i].pin;
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break;
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default:
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return -EINVAL;
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}
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}
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status = RAIL_ConfigPti(RAIL_EFR32_HANDLE, &pti_config);
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if (status != RAIL_STATUS_NO_ERROR) {
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return -EIO;
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}
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return 0;
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}
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#define SILABS_PTI_INIT(idx) \
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PINCTRL_DT_INST_DEFINE(idx); \
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\
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static const struct silabs_pti_config silabs_pti_config_##idx = { \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
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.mode = DT_INST_ENUM_IDX(idx, mode), \
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.baud = DT_INST_PROP(idx, clock_frequency), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(idx, &silabs_pti_init, NULL, NULL, &silabs_pti_config_##idx, \
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POST_KERNEL, CONFIG_DEBUG_DRIVER_INIT_PRIORITY, NULL);
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DT_INST_FOREACH_STATUS_OKAY(SILABS_PTI_INIT)
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