In order to write into some ADC registers, it is necessary to have no
on-going conversions (either regular, injected, or both). Until now, each
time such a write was needed, the ADC was disabled unconditionally,
stopping any potential on-going conversion.
With the introduction of the injected mode, this could lead to problems
if for example an injected is configured differently than a running
regular one. In that case it would stop the regular conversion. If the
application is waiting the result before starting another one, it will be
stuck waiting forever.
To avoid cases like this, return an error rather than stopping conversion
and disabling the ADC. This reworks many functions to return an error in
case it was not possible to safely disable the ADC.
It stays possible to force an ADC disable even though a conversion is
running, this is useful at init where we don't want this to fail.
This also creates a dedicated function for the preselection register to
avoid duplication.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add injected mode support for STM32 ADC driver. To avoid potential
conflicts when configuring the ADC registers, some settings (like presel)
are moved into the channel_setup function when injected is enabled.
Also configures an ISR when DMA and injected mode are enabled. The reason
is that DMA is not available for injected sequence, so an ISR is still
necessary in this case.
Factorizes the "start_read_xxx" functions to avoid needless duplication
between sync/async and regular/injected mode.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add sequence priority support in the ADC API.
The priority assigned to a sequence reflects how time-sensitive it is
compared to other sequences. The number of priority levels supported
and the exact behavior obtained by assigning a specific priority to a
sequence are hardware-specific.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This adds a very simple output only console driver for
the consoleio provided by Whisper ISS for simulating
SweRV SoCs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...relying on direct pointer access. This avoids compiler
complain about casting to pointer from integer of
different size.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There is a macro RISCV_MAX_GENERIC_IRQ in the code which is not
defined anywhere. The assumption is that this would come from
the SoC configuration. However, since we have been moving away
from including soc.h in drivers, instead we introduce another
kconfig CONFIG_SWERV_PIC_MAX_GENERIC_IRQ for this.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The SweRV naming is under Cadence now so rename to have
a proper vendor prefix, and removes the EH1 naming as
this can be used for multiple family of SoCs.
The old compatible "swerv,pic" can still be used but
cannot be used together with "cdns,swerv-pic".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add keyscan driver support for Realtek Bee series SoCs,
including RTL87x2G and RTL8752H.
This driver supports:
- Maximum 12 * 20 matrix keyboard scanning
- Ghost key detecting
- Manual/Auto scanning mode configuration
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Make input_kbd_matrix_ghosting() and input_kbd_matrix_update_state()
non-static so that keyboard matrix drivers could reuse the common
ghost-key detection and per-key debouncing logic.
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Change macro STM32_HSE_CSS to be defined (to 1) only when HSE clock
security system is enabled, as stated by the HSE DT node css-enabled
property. Consequently only use #ifdef STM32_HSE_CSS (or #if defined())
and IS_ENABLED(STM32_HSE_CSS) to test whether or not it's enabled.
No functional change but may prevent build warnings since prior
this change was STM32_HSE_CSS value tested while the macro may
not be defined.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
It is unnecessary since it is never set to continuous (and single is the
default value), and causes issues on STM32F1 by starting conversions out
of turn (setting ADON bit while it is already set, without changing
any other bit in the register start a conversion).
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Fixes:
zephyrproject/zephyr/drivers/flash/flash_stm32_ex_op.c:348:3: warning:
label followed by a declaration is a C23 extension [-Wc23-extensions]
348 | int rv2;
| ^
when compiling with llvm.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Previously, nv-flash nodes were used as the flash controller and
contained APIs. But currently, to support mapped-partitions
and allow MCUboot to run on RA8x2 devices, this MRAM driver need
to correct the node that used for flash controller.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
The nrf_rram_write() and nrf_rram_erase() functions were missing
input validation for address and length alignment.
nrf_rram_write() did not verify that addr and len are multiples of
WRITE_LINE_SIZE (16 bytes), allowing unaligned writes to succeed
when they should return -EINVAL.
nrf_rram_erase() did not verify that addr and len are multiples of
PAGE_SIZE (4096 bytes), allowing unaligned erases to succeed when
they should return -EINVAL.
Add alignment checks to both functions to correctly reject invalid
operations as required by the flash API contract.
Assisted-by: Claude:claude-sonnet-4-6
Fixes#102511
Signed-off-by: Mohit Talwar <talwarmohit2005@gmail.com>
Adds implementation of the PWM_EVENT api options. The Infineon TCPWM
Module supports the PWM_EVENT_TYPE_COMPARE_CAPTURE and
PWM_EVENT_TYPE_PERIOD events.
Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
Generalize the Hynitron CST816S touchscreen driver to support the
broader CST8xx controller family.
Changes include:
- Renaming the driver from input_cst816s.c to input_cst8xx.c
- Renaming drivers/input/Kconfig.cst816s to drivers/input/Kconfig.cst8xx
- Updating the Devicetree compatible from hynitron,cst816s to
hynitron,cst8xx
- Updating the Devicetree binding description and compatible field
- Updating board DTS files and test overlays to use the new compatible
These changes align the driver, Devicetree bindings, and compatible
strings with the actual hardware support, which covers the CST8xx
family rather than only the CST816S variant.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
In uart_ra_sci_irq_tx_enable() it clears the Transmit Data Empty and
Transmit End flags. Doing this results in the uart re-sending the last
byte written to the TDR if the fifo is not being used. Avoid clearing the
status in the fifo-disabled case.
Signed-off-by: Aaron Brice <aaron@embeddedts.com>
Added support for GT912, GT927, GT9271, GT928, and GT967 devices.
Changed if-comparison logic to switch-case for clarity.
Removed unnecessary braces.
Resolved previous compliance issues with commit messages.
Signed-off-by: Benjamin Ali <benjamin.ali@soluware.de>
Remove unused `buf` variable in udc_bflb_v1_ep_dequeue() that causes
a build error with -Werror=unused-variable.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Fixes:
zephyr/drivers/input/input_gpio_qdec.c:359:3: error: label followed by a
declaration is a C23 extension [-Werror,-Wc23-extensions]
359 | struct k_work_sync sync;
| ^
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix zephyrproject/zephyr/drivers/input/input_cf1133.c:280:38: warning:
format specifies type 'int' but the argument has type 'const struct
gpio_dt_spec *' [-Wformat] when compiling with llvm:
west build -p -b nrf52dk/nrf52832 tests/drivers/build_all/input -- \
-DTOOLCHAIN_VARIANT_COMPILER=llvm
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Following the convention of other driver libraries, allow the library
to be empty, so there is no build warning if CONFIG_WATCHDOG is
enabled, but no driver is selected.
<!-- ps-id: 2581e043-e366-4115-b6d2-73ca070add8b -->
Signed-off-by: James Walmsley <james@fullfat-fs.co.uk>
The OpenRISC 1000 Tick Timer is tightly coupled to the or1k CPU core, and
is explicitly designed to facilitate task scheduling and high-resolution
timing.
The timer is documented in Chapter 14 of the OpenRISC 1000 Architecture
Manual:
https://openrisc.io/or1k.html#__RefHeading__504849_595890882
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
Move variant-specific behavior out of shared HL78xx logic and into
variant ops callbacks, while using hidden capability symbols for
compile-time shape differences.
Key changes:
- Expand variant ops to cover URC handling, LPM routing, RAT policy,
GNSS routing, and socket wake/restore decisions.
- Replace shared variant-name ifdefs with ops dispatch and capability
symbols.
- Add hidden capability symbols for KSTATEV, KPSMEV, RRC query, and
WDSI default profile selection.
- Keep unsupported callbacks explicit via NULL in ops tables.
- Add explicit HL7812 await_registered_timeout_lpm callback.
- Add architecture notes for future variant onboarding.
This keeps HL7800 and HL7812 behavior aligned with existing flows while
reducing shared-file preprocessor branching and improving scalability.
Signed-off-by: Zafer SEN <zafersn93@gmail.com>
Added DMA support for transcieve_async using k_work for multi-buffer
transfers. Fixed bug where error isn't reported to spi_context_complete
when DMA callback receives an errorby ensuring it's invoked and the
transceive exits gracefully. Fixed bug where transceive would
loop infinitely when data size less than dma word size by skipping
the buffer that is too short.
Signed-off-by: Ryan Wiebe <ryan.wiebe@analog.com>
The max149x6_config struct declared config_do/config_di with swapped
names, inverting semantics. Both fields are not yet used by the driver,
which is likely the reason why this went unnoticed.
Fixed by assigning each field its matching config union type.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
max14916_pars_spi_diag() wrongly uses same mask as for MAX14906. On
4 channel MAX14906 SDO byte1 upper nibble is DoiLevel bits. On 8 channel
MAX14916, those are fault bits for channels 5-8.
Fixed by checking the full fault byte in the MAX14916 diagnostic parser.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
MAX14916/915 defines GPIO channel specific DT properties, but the driver
does not apply them at init and programs zero values instead. Secondly, the
build test overlay for MAX14916 only sets 4 channels out of 8.
Fixed by initializing OW-on, OW-off, and short-to-VDD from DT during
config and setting the correct channel count in the test overlay.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
gpio_max14916_config_diag() writes ow_on_en to wrong register
(OW_OFF_EN_REG instead of OW_ON_EN_REG).
Fixed by writing to correct register.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
MAX14906/916 diagnostic helpers handle error propagation differently
across diag_chan_get(), pars_spi_diag(), and reg_trans_spi_diag(). This
creates asymmetry in parser/wrapper flows.
Additionally, the parser overwrites transport errors, obfuscating their
source.
Fixed by aligning helpers to standard errno-style return semantics and
failing fast consistently, propagating nested transport errors.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Both MAX14906/916 diag_chan_get paths keep previously cached channel fault
values when the corresponding interrupt bits are not set in later calls.
This leaves stale fault data such that diag_chan_get keeps reporting faults
after they have cleared.
Fixed by clearing fault caches before updating them from current interrupt
status.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Both MAX14906/916 pars_spi_diag paths can lose an captured FAULT1 error
when diag_chan_get() returns 0.
Fixed by only updating the parser return status when diag_chan_get()
returns nonzero.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
max14906_ch_func(), gpio_max14906_config(), and gpio_max14916_config()
ignore return values from lower level register update/write helpers.
This leads to reports of successful pin configuration even when SPI
transactions fail.
Fixed by propagating the first error (effectively forwarding SPI errors)
to the caller, with no behaviour change in success path.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Several MAX14906/916/915 SPI write paths ignore MAX149xx_REG_WRITE()
return values and proceed silently after SPI write failures.
Fixed by propagating SPI write errors in the affected paths.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Several MAX14906/916/915 Read/ReadModifyWrite update paths use
MAX149xx_REG_READ() return values directly without validating SPI read
errors first. This leaves SPI read errors unnoticed and corrupts registers
by writing return values unconditionally.
Fixed by early returning on SPI read errors.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
When max149x6_reg_transceive is called with rw=WRITE and rx_diag_buff=NULL,
the SPI diagnostic response byte is returned instead of 0, even though the
write was proper and successful.
Fixed by restricting the offending branch to READ only.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
This field is not used anywhere and was probably added in error.
Callback registration is done via tcpc_set_alert_handler_cb().
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
