drivers: bluetooth: add BT-CAL data load for NXP IW612/IW416 SoC
- Add support for default Annex-55 Bluetooth calibration data load for both IW612 and IW416 SoC. - Add support for default Annex-100 Bluetooth calibration data load for both IW612 and IW416 SoC. Signed-off-by: Nirav Agrawal <nirav.agrawal@nxp.com>
This commit is contained in:
Nirav Agrawal
Daniel DeGrasse
parent
f1931bb813
commit
ffe8daa767
2 changed files with 217 additions and 7 deletions
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@ -13,14 +13,14 @@ config HCI_NXP_ENABLE_AUTO_SLEEP
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message to the Controller as the Host will need to wake it up.
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config HCI_NXP_SET_CAL_DATA
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bool "BLE Controller calibration data"
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bool "Bluetooth Controller calibration data"
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help
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If enabled, the Host will send calibration data to the BLE Controller during HCI init.
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If enabled, the Host will send calibration data to the Bluetooth Controller during HCI init.
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config HCI_NXP_SET_CAL_DATA_ANNEX100
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bool "BLE Controller calibration data annex 100"
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bool "Bluetooth Controller calibration data annex 100"
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help
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If enabled, the Host will send calibration data annex 100 to the BLE Controller during HCI
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If enabled, the Host will send calibration data annex 100 to the Bluetooth Controller during HCI
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init.
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config HCI_NXP_RX_THREAD
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@ -29,13 +29,25 @@ LOG_MODULE_REGISTER(bt_nxp_ctlr);
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#define DT_DRV_COMPAT nxp_bt_hci_uart
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#define FW_UPLOAD_CHANGE_TIMEOUT_RETRY_COUNT 6
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#define FW_UPLOAD_CHANGE_TIMEOUT_RETRY_COUNT 6
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#define HCI_CMD_STORE_BT_CAL_DATA_ANNEX100_OCF 0xFF
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#define HCI_CMD_STORE_BT_CAL_DATA_PARAM_ANNEX100_LENGTH 16
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#define HCI_CMD_STORE_BT_CAL_DATA_OCF 0x61
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#define HCI_CMD_STORE_BT_CAL_DATA_PARAM_LENGTH 32
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extern const unsigned char *bt_fw_bin;
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extern const unsigned int bt_fw_bin_len;
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static const struct device *uart_dev = DEVICE_DT_GET(DT_INST_GPARENT(0));
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#if !defined(CONFIG_HCI_NXP_SET_CAL_DATA)
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#define bt_nxp_set_calibration_data_annex55() 0
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#endif
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#if !defined(CONFIG_HCI_NXP_SET_CAL_DATA_ANNEX100)
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#define bt_nxp_set_calibration_data_annex100() 0
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#endif
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#if DT_NODE_HAS_PROP(DT_DRV_INST(0), sdio_reset_gpios)
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struct gpio_dt_spec sdio_reset = GPIO_DT_SPEC_GET(DT_DRV_INST(0), sdio_reset_gpios);
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#endif /* DT_NODE_HAS_PROP(DT_DRV_INST(0), sdio_reset_gpios) */
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@ -1171,6 +1183,189 @@ static int bt_nxp_ctlr_init(void)
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return 0;
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}
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#if defined(CONFIG_HCI_NXP_SET_CAL_DATA)
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static int bt_nxp_set_calibration_data_annex55(void)
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{
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int ret = 0;
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uint16_t opcode = BT_OP(BT_OGF_VS, HCI_CMD_STORE_BT_CAL_DATA_OCF);
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const uint8_t hci_cal_data_annex55[HCI_CMD_STORE_BT_CAL_DATA_PARAM_LENGTH] = {
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#if defined(CONFIG_BT_NXP_NW612)
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0x00, /* Sequence Number : 0x00 */
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0x01, /* Action : 0x01 */
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0x01, /* Type : Not use CheckSum */
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0x1C, /* File Length : 0x1C */
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0x37, /* BT Annex Type : BT CFG */
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0x33, /* Checksum : 0x71 */
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0x1C, /* Annex Length LSB: 0x001C */
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0x00, /* Annex Length MSB: 0x001C */
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0x00, /* Pointer For Next Annex[0] : 0x00000000 */
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0x00, /* Pointer For Next Annex[1] : 0x00000000 */
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0x00, /* Pointer For Next Annex[2] : 0x00000000 */
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0x00, /* Pointer For Next Annex[3] : 0x00000000 */
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0x01, /* Annex Version : 0x01 */
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0x81, /* External Xtal Calibration Value : 0x7d */
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0x0D, /* Initial TX Power : 13 */
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0x07, /* Front End Loss : 0x07 */
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0x28, /* BT Options : */
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/* BIT[0] Force Class 2 operation = 0 */
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/* BIT[1] Disable Pwr-ctrl for class 2=0 */
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/* BIT[2] MiscFlg(to indicate ext.XTAL)=0 */
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/* BIT[3] Used Internal Sleep Clock = 1 */
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/* BIT[4] BT AOA location support = 0 */
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/* BIT[5] Force Class 1 mode = 1 */
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/* BIT[7:6] Reserved */
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0x00, /* AOANumberOfAntennas: 0x00 */
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0x00, /* RSSI Golden Low : 0 */
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0x00, /* RSSI Golden High : 0 */
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0xC0, /* UART Baud Rate[0] : 0x002DC6C0(3000000) */
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0xC6, /* UART Baud Rate[1] : 0x002DC6C0(3000000) */
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0x2D, /* UART Baud Rate[2] : 0x002DC6C0(3000000) */
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0x00, /* UART Baud Rate[3] : 0x002DC6C0(3000000) */
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0x00, /* BdAddress[0] : 0x000000000000 */
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0x00, /* BdAddress[1] : 0x000000000000 */
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0x00, /* BdAddress[2] : 0x000000000000 */
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0x00, /* BdAddress[3] : 0x000000000000 */
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0x00, /* BdAddress[4] : 0x000000000000 */
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0x00, /* BdAddress[5] : 0x000000000000 */
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0xF0, /* Encr_Key_Len[3:0]: MinEncrKeyLen = 0x0 */
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/* ExEncrKeyLen = 0xF */
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0x00, /* RegionCode : 0x00 */
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#elif defined(CONFIG_BT_NXP_IW416)
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0x00, /* Sequence Number : 0x00 */
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0x01, /* Action : 0x01 */
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0x01, /* Type : Not use CheckSum */
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0x1C, /* File Length : 0x1C */
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0x37, /* BT Annex Type : BT CFG */
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0x33, /* Checksum : 0x71 */
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0x1C, /* Annex Length LSB: 0x001C */
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0x00, /* Annex Length MSB: 0x001C */
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0x00, /* Pointer For Next Annex[0] : 0x00000000 */
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0x00, /* Pointer For Next Annex[1] : 0x00000000 */
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0x00, /* Pointer For Next Annex[2] : 0x00000000 */
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0x00, /* Pointer For Next Annex[3] : 0x00000000 */
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0x01, /* Annex Version : 0x01 */
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0x00, /* External Xtal Calibration Value */
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0x03, /* Initial TX Power : 0x03 */
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0x03, /* Front End Loss : 0x03 */
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0x00, /* BT Options : */
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/* BIT[0] Force Class 2 operation = 0 */
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/* BIT[1] Disable Pwr Ctrl for class 2=0 */
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/* BIT[2] MiscFlg(to indicate ext.XTAL)=0 */
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/* BIT[3] Used Internal Sleep Clock = 0 */
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/* BIT[4] BT AOA localtion support = 0 */
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/* BIT[5] Force Class 1 mode = 0 */
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/* BIT[7:6] Reserved */
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0x00, /* AOANumberOfAntennas: 0x00 */
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0xBA, /* RSSI Golden Low : 0 */
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0xCE, /* RSSI Golden High : 0 */
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0xC0, /* UART Baud Rate[0] : 0x002DC6C0(3000000) */
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0xC6, /* UART Baud Rate[1] : 0x002DC6C0(3000000) */
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0x2D, /* UART Baud Rate[2] : 0x002DC6C0(3000000) */
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0x00, /* UART Baud Rate[3] : 0x002DC6C0(3000000) */
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0x00, /* BdAddress[0] : 0x000000000000 */
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0x00, /* BdAddress[1] : 0x000000000000 */
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0x00, /* BdAddress[2] : 0x000000000000 */
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0x00, /* BdAddress[3] : 0x000000000000 */
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0x00, /* BdAddress[4] : 0x000000000000 */
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0x00, /* BdAddress[5] : 0x000000000000 */
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0xF0, /* Encr_Key_Len[3:0]: MinEncrKeyLen = 0x0 */
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/* ExEncrKeyLen = 0xF */
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0x00, /* RegionCode : 0x00 */
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#else
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#error "BT Calibration data (annex-55) is not given for selected chipset"
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#endif
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};
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if (IS_ENABLED(CONFIG_BT_HCI_HOST)) {
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struct net_buf *buf;
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buf = bt_hci_cmd_create(opcode, HCI_CMD_STORE_BT_CAL_DATA_PARAM_LENGTH);
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if (buf == NULL) {
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LOG_ERR("Unable to allocate command buffer");
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return -ENOMEM;
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}
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net_buf_add_mem(buf, hci_cal_data_annex55, HCI_CMD_STORE_BT_CAL_DATA_PARAM_LENGTH);
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ret = bt_hci_cmd_send_sync(opcode, buf, NULL);
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if (ret) {
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LOG_ERR("Failed to send set-calibration cmd (err %d)", ret);
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return ret;
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}
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(void)k_msleep(CONFIG_BT_H4_NXP_CTLR_WAIT_TIME_AFTER_BAUDRATE_UPDATE);
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}
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return ret;
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}
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#endif /*CONFIG_HCI_NXP_SET_CAL_DATA*/
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#if defined(CONFIG_HCI_NXP_SET_CAL_DATA_ANNEX100)
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static int bt_nxp_set_calibration_data_annex100(void)
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{
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int ret = 0;
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const uint8_t hci_cal_data_annex100[HCI_CMD_STORE_BT_CAL_DATA_PARAM_ANNEX100_LENGTH] = {
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#if defined(CONFIG_BT_NXP_NW612)
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0x64, /* Annex Type : 0x64 */
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0x83, /* Checksum */
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0x10, 0x00, /* Length */
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0x00, 0x00, 0x00, 0x00, /* Pointer for next Annex-Structure */
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0x01, /* Ext PA Present (1 bit) + */
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/* Ext. PA Gain (7 bits) */
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0x00, /* Ext Antenna Gain(1 bit) + */
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/* Ext. Antenna Gain Val(4 bits) */
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0x04, 0x00, /* BT / LE Ext PA FEM CTRL Bitmask */
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0x01, /* Ext LNA Present (1 bit) + */
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/* Ext LNA Gain (7 bits) */
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0x00, /* Reserved */
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0x04, 0x00 /* BT / LE Ext LNA FEM CTRL Bitmask */
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#elif defined(CONFIG_BT_NXP_IW416)
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0x64, /* Annex Type : 0x64 */
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0x83, /* Checksum */
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0x10, 0x00, /* Length */
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0x00, 0x00, 0x00, 0x00, /* Pointer for next Annex-Structure */
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0x01, /* Ext PA Present (1 bit) + */
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/* Ext. PA Gain (7 bits) */
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0x00, /* Ext Antenna Gain(1 bit) + */
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/* Ext. Antenna Gain Val (4 bits) */
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0x0C, 0x00, /* BT / LE Ext PA FEM CTRL Bitmask */
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0x01, /* Ext LNA Present (1 bit) + */
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/* Ext LNA Gain (7 bits) */
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0x00, /* Reserved */
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0x0C, 0x00 /* BT/LE Ext LNA FEM CTRL Bitmask */
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#else
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#error "BT Calibration data (annex-100) is not given for selected chipset"
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#endif
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};
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uint16_t opcode = BT_OP(BT_OGF_VS, HCI_CMD_STORE_BT_CAL_DATA_ANNEX100_OCF);
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if (IS_ENABLED(CONFIG_BT_HCI_HOST)) {
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struct net_buf *buf;
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buf = bt_hci_cmd_create(opcode, HCI_CMD_STORE_BT_CAL_DATA_PARAM_ANNEX100_LENGTH);
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if (buf == NULL) {
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LOG_ERR("Unable to allocate command buffer");
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return -ENOMEM;
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}
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net_buf_add_mem(buf, hci_cal_data_annex100,
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HCI_CMD_STORE_BT_CAL_DATA_PARAM_ANNEX100_LENGTH);
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ret = bt_hci_cmd_send_sync(opcode, buf, NULL);
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if (ret) {
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LOG_ERR("Failed to send set-calibration cmd (err %d)", ret);
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return ret;
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}
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}
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return ret;
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}
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#endif /* defined(CONFIG_HCI_NXP_SET_CAL_DATA_ANNEX100) */
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int bt_hci_transport_setup(const struct device *dev)
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{
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int ret = 0;
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@ -1231,6 +1426,7 @@ int bt_h4_vnd_setup(const struct device *dev)
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flowcontrol_of_hci = (bool)DT_PROP_OR(DT_DRV_INST(0), hw_flow_control, false);
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if (operation_speed == default_speed) {
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fw_upload.is_setup_done = true;
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return 0;
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}
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@ -1240,7 +1436,7 @@ int bt_h4_vnd_setup(const struct device *dev)
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return err;
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}
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/* BT waiting time after controller bandrate updated */
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/* BT waiting time after controller bandrate updated */
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(void)k_msleep(CONFIG_BT_H4_NXP_CTLR_WAIT_TIME_AFTER_BAUDRATE_UPDATE);
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}
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@ -1250,7 +1446,21 @@ int bt_h4_vnd_setup(const struct device *dev)
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return err;
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}
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fw_upload.is_setup_done = true;
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if (!fw_upload.is_setup_done) {
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err = bt_nxp_set_calibration_data_annex55();
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if (err) {
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LOG_ERR("Fail to load annex-55 calibration data");
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return err;
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}
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err = bt_nxp_set_calibration_data_annex100();
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if (err) {
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LOG_ERR("Fail to load annex-100 calibration data");
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return err;
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}
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fw_upload.is_setup_done = true;
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}
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return 0;
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}
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