drivers: cache: Add barriers to nrf driver
On Cortex-M33 the access to peripheral registers doesn't act as a data synchronization barrier for memory accesses to normal memory. So before triggering any TASKS for cache operations we need to make sure the core doesn't have any pending memory transactions. Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
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drivers/cache/cache_nrf.c
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drivers/cache/cache_nrf.c
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@ -5,6 +5,7 @@
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/cache.h>
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#include <zephyr/sys/barrier.h>
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#include <hal/nrf_cache.h>
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#include <zephyr/logging/log.h>
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@ -67,6 +68,8 @@ static inline int _cache_all(NRF_CACHE_Type *cache, enum k_nrf_cache_op op)
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wait_for_cache(cache);
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barrier_dsync_fence_full();
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switch (op) {
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#if NRF_CACHE_HAS_TASK_CLEAN
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@ -101,6 +104,8 @@ static inline void _cache_line(NRF_CACHE_Type *cache, enum k_nrf_cache_op op, ui
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nrf_cache_lineaddr_set(cache, line_addr);
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barrier_dsync_fence_full();
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switch (op) {
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#if NRF_CACHE_HAS_TASK_CLEAN
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