Commit graph

25038 commits

Author SHA1 Message Date
Etienne Carriere
1beb3d36dd drivers: mdio: stm32: don't mix HAL return value and errno
Correct mdio_stm32_read() and mdio_stm32_write() to return a valid errno
instead of mixing HAL return values and errno return values.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-13 11:27:34 -04:00
Etienne Carriere
617335951f drivers: ethernet: stm32: add missing empty line
Add missing empty line between local variable definitions and
instructions in eth_stm32_set_mac_config().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-13 11:27:34 -04:00
Etienne Carriere
97ec44c909 drivers: ethernet: stm32: clean HAL_ETH_{Set|Get}DMAError() value test
Clean tests on HAL_ETH_SetDMAError() and HAL_ETH_GetDMAError() return
value to explicitly test against 0.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-13 11:27:34 -04:00
Etienne Carriere
83b1e12f4a drivers: ethernet: stm32: test HAL return value
Add missing test of some HAL functions return value

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-13 11:27:34 -04:00
Guillaume Gautier
88735a4aa1 drivers: adc: stm32: remove useless check of internal regulator state
Disabling the internal regulator is immediate so there is no need to check
the state of the Enable bit in the register.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
67906ce049 drivers: adc: stm32: use the new differential support property
Use the new differential support property instead of relying on the series
name to determine if the ADC supports differential input channels.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
7acd045e62 drivers: adc: stm32: use the new channel preselection property
Use the new channel preselection property instead of relying on the series
name to determine if the ADC channels need to be preselecting.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
77be4b72eb drivers: adc: stm32: use the new deep powerdown property
Use the new deep powerdown property instead of relying on the series name
to determine if the ADC needs to be be put out or into deep powerdown mode.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
7c719cefd5 drivers: adc: stm32: use the new internal regulator property
Use the new internal regulator property instead of relying on series name
to determine if the regulator should be enabled, and how to check that it
is ready.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
a0cadb03c7 drivers: adc: stm32: relies on a ll define rather than series names
For managing the CCRDY flag, rely on the presence of the LL constant
LL_ADC_FLAG_CCRDY rather than a list of series.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Chris Friedt
ee3402321f drivers: smbus: stm32: support packet-error-checking (pec)
Add support for SMBus packet error checking (PEC) to the stm32 driver.
This feature allows SMBust communication to be slightly more robust in
the presence of noise, in that packet errors can be detected on the
receive side.

Signed-off-by: Andrew Lewycky <alewycky@tenstorrent.com>
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-10-13 11:27:13 -04:00
Chris Friedt
52ae0c5ed9 drivers: smbus: provide packet-error-checking (pec) routines
In the case that SMBus hardware does not automatically perform packet
error checking (PEC), provide generic inline functions in
`zephyr/drivers/smbus.h` that can be used by drivers to perform PEC in
software.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Signed-off-by: Andrew Lewycky <alewycky@tenstorrent.com>
2025-10-13 11:27:13 -04:00
Jimmy Zheng
679ce42f15 arch: riscv: custom: add Andes CSR support
Rework Andes-specific CSR to use RISC-V custom CSR common code.
Move these stuff to 'arch/riscv/custom/andes':

1. Rename 'soc_v5.h' to 'andes_csr.h' for CSR definitions.
2. Replace '_start' with '__reset' hook for low-level CSR initialization.
3. Move CSR context to common macro '__custom_csr_save/restore_context'.
4. Move 'EXECIT' CSR support to common code.
5. Move PMA CSR driver to common code.
6. Use RISC-V common linker.ld instead of SoC-specific linker.ld.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2025-10-13 11:26:28 -04:00
Marcelo Roberto Jimenez
47e7b7b2b5 drivers: ethernet: Add promiscuous mode to slip interface
Slip is naturally promiscuous, so this patch does nothing but
acknowledge that. Promiscuous mode in slip is important to allow
the interface to be added to a bridge.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2025-10-13 09:37:56 -04:00
Marcelo Roberto Jimenez
074f4db67a drivers: ethernet: Run clang-format before applying a patch
This patch just formats the file before the real patch so that
whitespace changes do not mix with the real code changes.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2025-10-13 09:37:56 -04:00
Ben Marsh
2a0fb72c6a drivers: flash: stm32_qspi: Fix special behaviour for Microchip QSPIs
Commit 539928d introduced a special behaviour for Microchip QSPI flash
memories into the STM32 QSPI flash driver, to handle the fact that these
memories use the PP_1_1_4 opcode (32H) for the PP_1_4_4 operation
(usually 38H).

The special Microchip-specific behaviour introduced in that commit sets
the address mode for a QSPI 1-1-4 write operation to 4 address lines,
rather than 1 address line, when the write command is configured as
SPI_NOR_CMD_PP_1_1_4. If the write command is configured as
SPI_NOR_CMD_PP_1_4_4, nothing is done and the operation will not succeed.

This behaviour is a bit backwards, as it results in a QSPI flash memory
configured in 1-1-4 write mode using 4 address lines (1-4-4 operation).
It should be the other way round, so that a QSPI flash memory configured
in 1-4-4 mode uses 4 address lines (1-4-4 operation).

This commit changes the Microchip-specific special behaviour to set the
opcode for the specified write mode, rather than using a different write
mode to that which is configured in order to use a valid opcode. This
means that a QSPI flash memory configured in 1-4-4 mode, or without the
writeoc DT property set (defaults to 1-4-4 for quad mode), will operate
in 1-4-4 mode. 1-1-4 mode is unsupported, as before.

Also update the Kconfig option description for
CONFIG_USE_MICROCHIP_QSPI_FLASH_WITH_STM32 to remove references to the
Global Block Protection Unlock instruction - this was added at the same
time as the Microchip-specific special behaviour for the 1-1-4 / 1-4-4
opcode but is distinct from this and is not affected by
CONFIG_USE_MICROCHIP_QSPI_FLASH_WITH_STM32.

Signed-off-by: Ben Marsh <ben.marsh@helvar.com>
2025-10-13 09:37:21 -04:00
Sang Tran
7b9fd54052 drivers: watchdog: Support Renesas RX independent watchdog timer driver
Add initial support for independent watchdog driver for Renesas RX
with r_iwdt_rx RDP HAL

Signed-off-by: Sang Tran <sang.tran.jc@renesas.com>
2025-10-13 09:33:35 -04:00
Andrzej Głąbek
7ff2be07f2 drivers: mspi_dw: Remove needless TXEIR check
This is a follow-up to commit f0f5f8cdef.

There is no need to check if TXE interrupt flag is set before
calling tx_dummy_bytes(), as the function can handle the case
when it is called even though there is no room in the TX FIFO.
On the other hand, the check may be actually harmful, as it may
prevent adding more items to the TX FIFO while the SSI controller
is waiting until the FIFO achieves its transfer start level.
Remove the check then and exit the ISR loop when no dummy bytes
could be written into the TX FIFO.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-10-13 08:56:39 +02:00
Marcelo Roberto Jimenez
7899951c94 drivers: ethernet: Add promiscuous mode to xmc4xxx
This patch adds promiscuos mode to the XMC4xxx SOC's ethernet driver.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2025-10-13 08:55:05 +02:00
Marcelo Roberto Jimenez
ef42928c50 drivers: ethernet: Run clang-format before applying a patch
This patch just formats the file before the real patch, otherwise
the changes would be hard to read.

The only addition was a third parameter (NULL) to all the usages
of the macro WAIT_FOR, since the dangling comma triggered conflicts
between clang-format and check_compliance.py.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2025-10-13 08:55:05 +02:00
Jordan Yates
892013a5c6 fuel_gauge: composite: fix unreleased PM constraint
Fix the PM constraint not being released when the sample fetch API call
fails.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-13 08:54:24 +02:00
Siddhant Modi
41a35defc6 drivers: ethernet: eth_w5500
Fixes zephyrproject-rtos/zephyr#97217

Added new MONITOR_PERIOD config for W5500 driver
to remove dependency from ETH_PHY_DRIVER.

Signed-off-by: Siddhant Modi <siddhant.modi@gmail.com>
2025-10-10 20:50:50 -04:00
Dawid Niedzwiecki
406675da24 drivers: flash: andes_xip: rename define
Rename the PAGE_SIZE to avoid conflicts.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2025-10-10 20:49:55 -04:00
Declan Snyder
bba57b2f1e drivers: bluetooth: hci spi: Add missing semicolon
Adds a missing semicolon.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-10-10 20:49:39 -04:00
Arthur Gay
b62be03552 drivers: memc: stm32_xspi_psram: fix command size in x8 mode
This patch fixes PSRAM initialization logic in x8 mode by ensuring that
the data line mode configuration accurately reflects the io-x16-mode
property specified in the device tree.

Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
2025-10-10 12:59:42 -04:00
McAtee Maxwell
c83c6df512 drivers: uart: update ifx uart_pdl driver for kit_pse84_eval
- update ifx uart driver for kit_pse84_eval board

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-10-10 12:59:33 -04:00
McAtee Maxwell
69c64929b3 drivers: add ifx pinctrl driver updates for kit_pse84_eval
- add drive-strength capability for kit_pse84_eval

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-10-10 12:59:33 -04:00
McAtee Maxwell
281e52f6bf drivers: clock_control: add clock_control support for kit_pse84_eval
- add support for kit_pse84_eval board
- refactor infineon,fixed-clock binding
- refactor infineon,fixed-factor binding
- refactor infinein,peri-div binding

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-10-10 12:59:33 -04:00
McAtee Maxwell
5d3741caaf drivers: clock_control: rename files related to ifx clock_control
- rename ifx clock_control drivers
- rename infineon,cat1-peri-div yaml
- rename ifx clock dt-binding .h file

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-10-10 12:59:33 -04:00
Mathieu Choplain
1609f10082 drivers: usb: udc: stm32: configure OTGFS/HS RxFIFO size using Kconfig
Create a new Kconfig option allowing to tweak the RxFIFO size on OTG_FS
and OTG_HS instances, and replace the old hardcoded method with this new
mecanism.

The default value of 600 bytes yields a similar size to the the previous
hardcoded default of 160 words (= 640 bytes) when combined with the fixed
overhead computed by the driver (~56 bytes on OTG_FS with 6 endpoints).

Also fix a tiny error in a logging message (DRAM size in bytes, not bits).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-10 12:56:58 -04:00
Mathieu Choplain
6efa7f31fc drivers: usb: udc: stm32: allow EP max packet size up to HW capabilities
The maximal packet size (for non-control endpoints) was obtained by the
driver from HAL definitions which appear to not properly reflect hardware
capabilities.

Update driver to allow endpoints with wMaxPacketSize up to the maximal
value allowed by the USB Specification depending on operation mode, since
all STM32 USB controllers always support these values. Also move the EP
max packet size field in the 'struct udc_stm32_config' to avoid implicit
padding and add a documentation comment.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-10 12:56:58 -04:00
Mathieu Choplain
bbb8aba17d drivers: usb: udc: stm32: accept non-word-aligned MaxPacketSize or FIFOs
STM32 OTG USB controllers use word-addressable RAM with a 32-bit word size
so all allocations from the USB SRAM must be 32-bit aligned. The driver did
not accept unaligned values of wMaxPacketSize, and FIFO allocation code was
implicitly expecting FIFO sizes to be aligned as well (since it allocated
"bytes / 4" without rounding up).

Update driver to accept values of wMaxPacketSize that aren't word-aligned
and to allocate properly sized FIFOs sizes when an unaligned size has been
requested.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-10 12:56:58 -04:00
Mathieu Choplain
ac998f7109 drivers: usb: udc: stm32: clean up handling of USB buffer table
The ST USB controller (compatible 'st,stm32-usb') is fitted with private
SRAM called the Private Memory Area or PMA. This is primarily used to hold
data transfered over USB, but it also contains the so-called 'buffer table'
(a.k.a. BTABLE) which holds the base address and size of buffers in the PMA
allocated to each endpoint. The BTABLE is placed by the driver at the start
of the PMA and occupies a fixed size ('USB_BTABLE_SIZE'), which was stored
in the driver configuration field 'pma_offset'. This mechanism is unused on
non-ST USB controllers from STM32 microcontrollers, but USB_BTABLE_SIZE is
still defined (to a dummy value) and stored in the 'pma_offset' field which
becomes unused.

Remove the 'USB_BTABLE_SIZE' definition and the 'pma_offset' field from the
driver configuration, and update the ST USB controller-specific verison of
'udc_stm32_mem_init' to derive the BTABLE size from the number of endpoints
that the controller has instead.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-10 12:56:58 -04:00
Mathieu Choplain
3788b2c0a6 drivers: usb: udc: stm32: turn EP0 max packet size into a constant
The EP0 max packet size was de facto a constant because its value was the
same regardless of which USB IP was in use. However, it was stored as part
of the instance configuration anyways which is wasteful and slower.

Create new "UDC_STM32_EP0_MAX_PACKET_SIZE" driver-level constant with which
all usage of the per-instance configuration field is replaced.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-10 12:56:58 -04:00
Pieter De Gendt
4fa4329a16 shell: Add user data argument to shell_set_bypass
Allow passing some context to the shell bypass callback function by
providing a void pointer user data argument.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-10-10 12:53:55 -04:00
Phi Bang Nguyen
517e13cae5 drivers: video: st_mipid02: Drop caps' min_vbuf_count
The mipid02 is just a bridge driver which does not deal with memory so
should not expose caps' min_vbuf_count.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-10-10 12:53:28 -04:00
Phi Bang Nguyen
ade4e05969 drivers: video: Set format size
Receiver drivers now need to set the format's size to expose it to
the application.

Application should base on the format size to allocate buffers. The
caps' min/max_line_count (which are needed only for HWs that cannot
support the whole image frame) can hence be dropped.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-10-10 12:53:28 -04:00
Phi Bang Nguyen
21fec46971 drivers: video: Add helper to estimate format size
Add a helper to estimate format size and pitch.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-10-10 12:53:28 -04:00
Tahsin Mutlugun
6b45182d6d drivers: i2c_rtio: max32: Fix variable naming in initialization macros
Fixes incorrect usage of n instead of _num as the instance identifier
in several lines of the driver initialization macros. This mismatch
caused build errors when multiple I2C instances were enabled, due to
redefinition of the same variable.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-10-10 12:52:46 -04:00
Muhammad Waleed Badar
c2384c5a5d wifi: esp32: simplify DHCP4 auto-negotiation Kconfig
Remove redundant NET_DHCPV4 dependency and add default
behavior.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2025-10-09 20:35:58 -04:00
Camille BAUD
6430ad458c drivers: serial: increase FIFO threshold for BFLB uart driver
Increases the fifo threshold for tx, should increase speed a bit.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-10-09 20:35:34 -04:00
Camille BAUD
b20d3432e3 drivers: serial: Improve BFLB UART driver: add runtime configuration
This adds the ability to do runtime configuration of the BFLB
UART driver.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-10-09 20:35:34 -04:00
Camille BAUD
a7bf03cec5 drivers: serial: Add De-init to bflb uart driver
Allows BFLB uart peripheral to de-init.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-10-09 20:35:34 -04:00
Hugues Fruchet
fd1115d88f drivers: video: introduction of the stm32 venc driver
The STM32 video encoder (VENC) peripheral is a hardware
accelerator allowing to compress RGB/YUV frames into
H264 video bitstream chunks.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
2025-10-09 22:56:37 +03:00
Bjarki Arge Andreasen
1f294febf2 drivers: serial: nrfx_uarte: Default DIRECT_ISR if MULTITHREADING=n
Default to using DIRECT_ISR if nothreading. This allows the SW ISR
table to be excluded if nothreading.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-09 22:56:09 +03:00
Tom Chang
298ebb7aa7 drivers: espi: npcx: add espi taf support for npck3
This commit adds eSPI TAF support for npck3, including initialization
settings for flash operation mode. It also updates the mechanism to
release FLASH_NP_FREE, preventing a possible race condition between
automatic and standard requests.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-10-09 22:55:48 +03:00
Tom Chang
ee48ccaacf drivers: espi: npcx: add espi support for npck3
This commit adds eSPI support for npck3, including support for the
maximum frequency of 66MHz. The method to read the level of eSPI reset
pin differs on npck3, so the definition of eSPI_RST has been updated
accordingly.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-10-09 22:55:48 +03:00
Tom Chang
18423dec9f drivers: espi: npcx: update OOB maximum payload size
This commit updates the OOB payload size. The maximum payload size in
the OOB chapter represents the protocol payload embedded whithin the
packet. The total size should also include the header length, so the
header length needs to be added when checking the overall size.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-10-09 22:55:48 +03:00
Tom Chang
5549f5e93f drivers: espi: npcx: add support for SLP_LAN and SLP_WLAN VW signals
This commit adds support for SLP_LAN and SLP_WLAN virtual wire signals
to notify the system.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-10-09 22:55:48 +03:00
Tom Chang
c4aaf6151e soc: nuvoton: npcx: update register name
This commit updates the register name to match the datasheet.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-10-09 22:55:48 +03:00