NRF_GRTC_TIMER_SOURCE had two unconditional defaults so second
one was never used. When synth clock source is used then GRTC source
clock should default to system lfclk.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
A temporarily empty input FIFO can leave active_buf NULL for
a subsequent callback. Skip the metadata update and output enqueue
when there is no buffer to deliver.
Fixes#117173
Assisted-by: Copilot:GPT-6 Luna
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
The MDC and MDIO pins can be part of the pinctrl state of the Ethernet
MAC node, which is applied when the MAC is initialized, before the
MDIO controller and the PHY. Make the pinctrl state of the mdio node
optional, like in the DWMAC MDIO driver.
Assisted-by: Claude:claude-opus-5.5
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The driver does not acquire the device power-policy lock. With
CONFIG_PM_POLICY_DEVICE_CONSTRAINTS, states named by
zephyr,disabling-power-states can therefore be entered while measuring.
On frdm_mcxa577, a cycle carried into Deep Sleep completes with zero
counted edges, reporting CLOCK_MONITOR_EVT_CLOCK_LOST and -EIO.
Acquire the lock before starting either mode. Release it on MEASURE
completion, stop or successful SUSPEND, after hardware is stopped and
gated. Reacquire it before RESUME restarts WINDOW monitoring.
Keep the lock when failed gate closure restores a running WINDOW.
Release it when restoration also fails or MEASURE remains stopped.
Serialize changes with the state lock and keep this policy reference
separate from the consumer-owned runtime reference.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
With CONFIG_PM_DEVICE_RUNTIME, an application can call configure(),
start() or set_source() while the device is suspended. These entry points
would access a gated block without checking the PM state.
Return -EBUSY from those entry points when the device is not active.
Recheck hardware access under the state lock to cover PM transitions and
failed gate recovery. An inactive stop() clears software state without
accessing registers and retains its documented return of 0.
Keep get_rate() available while suspended. It reads only dev->data, and
the result remains retained until the next configure().
Report -EIO rather than -EBUSY when gate-clock rollback failed. A
successful PM resume clears the fault; cached results remain readable.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
CORE-domain power loss resets the FREQME parameters and INPUTMUX routes.
Device resume does not rerun init(), and start() does not restore them.
Implement TURN_ON through the bring-up helper. Temporarily open the gate
to restore the selected routes and cached configuration, then stop
measurement and close the gate. Clean up the temporary gate on errors.
RESUME opens it again before restoring active operation.
Move init-time bring-up into TURN_ON. A runtime-auto instance can remain
suspended after initialization without receiving another SUSPEND.
TURN_OFF needs no register access: SUSPEND stopped measurement, disabled
interrupts and closed the gate. Configuration and results remain in RAM.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The driver registers no PM device. With CONFIG_PM_DEVICE, system-managed
PM cannot suspend a running FREQME measurement or close its gate.
Implement SUSPEND and RESUME. Stop measurement, disable peripheral and
NVIC interrupts, clear status and close the gate on SUSPEND. Open the gate
before restoring interrupts and WINDOW monitoring on RESUME. An
interrupted MEASURE stays stopped; its consumer handles the timeout.
Serialize register access against the ISR. Reject SUSPEND during a
configuration transaction and restore active hardware if gate closure
fails. Leave register access blocked if reopening the gate also fails.
The consumer owns the runtime reference in both modes. Keep unconfigured
instances out of the register block, which can remain held in reset on
MCX A. Close the init-time gate before handing state to the PM core.
Latch a gate-clock rollback failure until a later PM transition enables
the gate successfully. Keep hardware access disabled when SUSPEND cannot
restore the clock, even though the PM core leaves the device Active.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
init() enables the peripheral clock and routes the default reference and
target sources inline. The same hardware setup is about to be needed for
power restoration.
Extract the setup into nxp_freqme_hw_bringup(), using the selected source
indices. Restore the cached hardware parameters when configured is set,
and keep IRQ configuration in init().
No functional change.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
configure() derives REF_SCALE, the MIN and MAX counter thresholds and the
interrupt-enable mask from the consumer's clock_monitor_config and from the
reference clock rate, writes them into the block, and keeps only ref_hz and
ref_scale in dev->data. MIN, MAX and the interrupt mask then exist only in
the registers.
The block is about to need rebuilding from RAM after it has lost power, and
deriving the values again at that point would not reproduce what the
consumer configured if the reference rate has changed meanwhile.
Retain the whole resolved freqme_hw_params set, and record whether a
configure() has been applied at all. set_source() clears that record
because it already drops the device back to the unconfigured state.
No functional change.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
MCUX_FREQME_CLK is handled by on() but not off(). Calling
clock_control_off() leaves the peripheral gate open while returning
success.
Disable the matching HAL clock for each existing FREQME on() mapping.
Keep the existing family guards and leave other clocks unchanged.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The generic companion is armed only by sys_clock_set_timeout(0, true).
The default idle-entry hook passes the actual tick deadline instead, so a
nonzero deadline programs only the OS Timer. A state that stops that timer
then has no companion alarm for the deadline.
Implement sys_clock_idle_enter() to program the deadline first and hand it
to the generic companion for a configured handoff state. Keep the legacy
companion on the SoC zero-tick path, and avoid rearming a generic companion
if that poke follows the new hook.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
mcux_flexcomm_transfer() returned -EIO for each failed HAL transfer.
A caller could not tell an address NACK from a data NACK or from a
bus error.
Convert the HAL status to the error codes that Linux documents in
Documentation/i2c/fault-codes.rst:
- kStatus_I2C_Addr_Nak: -ENXIO
- kStatus_I2C_ArbitrationLost: -EAGAIN
- kStatus_I2C_StartStopError and kStatus_I2C_BitError: -EPROTO
- kStatus_I2C_Timeout, kStatus_I2C_EventTimeout and
kStatus_I2C_SclLowTimeout: -ETIMEDOUT
- kStatus_I2C_Busy when the transfer does not start: -EBUSY
- all other values, kStatus_I2C_Nak included: -EIO
One helper converts each status, kStatus_Success to 0 included. Both
call sites then only test the result.
The cdns and npcx I2C drivers also return -ENXIO for a NACK of the
address.
The error stays negative, so a caller that only tests for a negative
value sees no change.
Build-tested for frdm_rw612, lpcxpresso55s69/lpc55s69/cpu0 and
mimxrt685_evk/mimxrt685s/cm33 with CONFIG_I2C=y. Tested on custom
RW612 hardware.
Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Johan Eklund <Johan@meck.se>
Notify the user when a target IBI request times out. There's no way to
stop an IBI request once started on this IP (it'll keep sending until
ACK'd or DISEC'd), so all we can do is alert the user to it
Assisted-by: Claude:claude-opus-5
Signed-off-by: Zayne Stites <Zayne.Stites@infineon.com>
With a channel reserved for set_top_value(), the configured wrap lives in
the reserved match register. A power-down clears it along with the rest of
the block and the driver kept no copy, so the counter came back wrapping
at its full range and the top callback stopped arriving.
Keep the configured wrap in RAM and reprogram the reserved match from the
turn-on action. Only a build with device PM can lose it, so the restore is
not built without one.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The per-channel bookkeeping was reset as part of the hardware
configuration sequence, so every turn-on rewrote it whether or not
anything could have invalidated it. At boot that rewrites data which
already starts out zeroed.
Only device PM can take the block through a power-down, and that is the
one thing that invalidates the bookkeeping: the match channels come back
reset while the copy in RAM still names matches that no longer exist, so
a channel armed before the power-down would return -EBUSY when it is
armed again even though the hardware is idle.
Move the loop into the turn-on action under CONFIG_PM_DEVICE, after the
block is reconfigured, so it is built only where it can matter and
configuring the hardware is all mcux_lpc_ctimer_configure() does.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The turn-on action runs whenever the block is powered up: once at boot
through pm_device_driver_init(), and again after a power domain cuts its
power, once the devicetree puts the CTIMERs on a domain later in this
series. Configuring the block needs the function clock, but keeping it
afterwards would clock an instance that runtime device PM leaves
suspended at boot.
Give the action its own function, which configures the block and then
hands the clock back. A resume always follows a turn-on, so the resume
action is what clocks the block. The turn-off action only ever follows a
suspend, which gated the clock already, so it has nothing to do.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
mcux_lpc_ctimer_init_common() ran from one place, PM_DEVICE_ACTION_TURN_ON,
and mixed two things with different lifetimes. The clock device only has to
be checked for readiness once, when the driver is initialized, while the
bring-up it guarded has to run again every time the block is powered back
up.
Move the check to mcux_lpc_ctimer_init() and rename what is left to
mcux_lpc_ctimer_configure(), which is what the rest of it does: bring a
register block that came up reset into the state the devicetree asks for.
The configure failure the action callback used to discard is now returned
to pm_device_driver_init().
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
A suspended CTIMER kept its function clock running, which is the one thing
suspend can give back on this SoC: the block has no low-power control of
its own.
Gate the clock from the suspend action and take it again on resume. Gating
the clock stops the counter without touching its registers, so an armed
alarm and the count it was waiting for are still there when the clock comes
back.
Hand the power lock over at the same two points. A suspended counter is not
running, so holding off the states it declares would keep the system out of
them for a block that has nothing to lose there; a resume that finds the
counter still enabled is restoring a run the consumer never stopped, and
takes the lock back for it.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
With CONFIG_PM_POLICY_DEVICE_CONSTRAINTS the policy is free to enter a
state that stops the CTIMER function clock while the counter is running,
and the driver says nothing, so the counter loses however long the system
stayed there and an armed alarm misses its match. Nothing reports it: the
counter comes back and keeps counting from where it stopped.
Take a pm_policy device power lock while the counter is running, against
exactly the states the node declares in zephyr,disabling-power-states, and
release it when the counter stops. A running counter then holds off the
states that would gate its clock, so a runtime-PM suspend only ever reaches
a state that keeps the block powered and its count intact. A flag in driver
data records whether the lock is held, which keeps the count balanced when
start or stop is called twice. The window is start to stop because the
counter has no completion event that could close a shorter one.
A node that declares nothing takes no lock, so a board or an application
that knows its CTIMER keeps counting through one of these states can drop
that state from the list, or leave the property out, without touching the
driver.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
mcux_lpc_ctimer_set_alarm() registered the callback and then left the
whole arming step to CTIMER_SetupMatch(). That HAL function writes MCR
before MR, so it enables the channel's match interrupt while the match
register still holds the value left behind by the previous, cancelled
alarm. If the counter reaches that stale value in the few cycles before
MR is rewritten, the ISR runs with alarm_callback already set and
delivers a spurious expiry. The status flag CTIMER_SetupMatch() clears
right after writing MR comes too late to prevent that.
Ask CTIMER_SetupMatch() to leave the interrupt alone, so the match value
is replaced while the channel stays masked, and enable the interrupt
only once the channel describes the alarm being armed. The first match
that can reach the callback is then the one just programmed. Dropping
the status flag before CTIMER_SetupMatch() is no longer needed either,
because it already clears the flag once the new value is in place.
Leaving .enableInterrupt clear also skips the EnableIRQ() that
CTIMER_SetupMatch() would do, which costs nothing here: the NVIC line is
enabled by irq_config_func() and is never disabled.
Found with tests/drivers/counter/counter_basic_api, where
test_cancelled_alarm_does_not_expire reports "Expected 0 callbacks,
got 1" on ctimer@40004000 for the alarm it just cancelled.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
CTIMER_DisableInterrupts() takes a mask in MCR/CCR space, where each
channel holds three bits and the interrupt enable is MRnI at bit 3n for
match and CAPnI at bit 3n+2 for capture. The alarm paths pass
1 << chan_id, which is IR space, where the match flags are bits 0 to 3.
Only channel 0 lands on its own enable bit; channel 1 lands on no bit at
all, channel 2 on CAP0I and channel 3 on MR1I.
Cancelling an alarm on channel 3 therefore disables the match interrupt
of channel 1, and an alarm pending there never fires. Cancelling on
channel 2 disables capture channel 0. Channels 1 to 3 never get their
own match interrupt disabled.
Use the per-channel shift the capture paths already use.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
MCUX_CTIMER0_CLK through MCUX_CTIMER7_CLK have no case in either on() or
off(), so a driver that asks for its CTIMER clock is answered 0 and
nothing happens. The clock is left wherever CTIMER_Init() put it: on,
for the lifetime of the board.
That makes a CTIMER the one MCX timer whose clock cannot be released.
counter_mcux_ctimer.c names the gate in its clocks property on every MCXA,
MCXN, MCXW23x, LPC54xx, LPC55xx, RW6xx and i.MX RT part this driver
serves, and on none of them can it act on it.
Map the devicetree cell to the gate the part names it. The name differs by
family: kCLOCK_Timer on MCXN, LPC55xx and MCXW23x, kCLOCK_GateCTIMER on
MCXA, kCLOCK_Ct32b on LPC54xx, RW6xx and the i.MX RT5xx/6xx/7xx parts.
Built for frdm_mcxn947, frdm_mcxa156, lpcxpresso55s69, lpcxpresso54628,
frdm_rw612, frdm_mcxw23 and mimxrt700_evk, which covers all three names.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The CHT8305 is register-compatible with the TI HDC1000 family, only
IDs and conversion time differ. It can also stretch the I2C clock
during conversion, used by default instead of sleeping.
Also add a heater property for both compatibles.
Signed-off-by: Camille BAUD <mail@massdriver.space>
On SoCs that gate the TRGMUX register interface, touching TRGCFG
before the clock is on raises a bus fault. Enable it at init when the
node provides a clocks property; ungated SoCs are unaffected.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Assisted-by: Claude:claude-opus-5
TRGMUX sits behind an MC_ME COFB clock gate on MCXE31x, so add
MCUX_TRGMUX_CLK and route it to CLOCK_EnableClock/CLOCK_DisableClock
in the _on()/_off() paths.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Assisted-by: Claude:claude-opus-5
Adopt existing pdl based pwm driver to support CYT4DN and
adapted the clock implemetation of cyt4dn to this pwm
driver.
Signed-off-by: Alexpandi Muniyandi <alexpandi@linumiz.com>
Report the SPI bus and GPIO ports that are not ready with
LOG_ERR_DEVICE_NOT_READY() instead of open-coded messages, which also
drops the "SPI master port" wording.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-5.5
Packets sent over an interface using the dummy L2 skip the IP send
checks in net_if_try_send_data(), so a datagram larger than the
loopback MTU is delivered whole and the fragmentation and reassembly
code never runs. That is the right behavior for normal loopback use,
but it means a loopback benchmark or test of fragmented traffic does
not measure what it claims to: the zperf loopback selftest's
udp4_frag and udp6_frag transfers never fragment.
Add CONFIG_NET_LOOPBACK_FRAGMENT, off by default. When it is set, the
dummy L2 bypass runs the fragmentation step of the IP send checks, so
oversized datagrams are fragmented on send and reassembled on receive.
Raw IP sockets still skip it, as they do on other interfaces.
Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
If a `SHUTDOWN` event arrives while waiting for the modem to switch into
CMUX mode, wait for that process to complete before actioning the event.
Without this deferral, the shutdown event tries to disconnect a
not-connected cmux pipe in `init_power_off_state_enter` and never sends
the shutdown script.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Start the PPP dead timer in the state entry, instead of in the callers
that start the state transition. This is less code, and catches missed
entry paths into the state (`MODEM_CELLULAR_EVENT_DEREGISTERED`).
Signed-off-by: Jordan Yates <jordan@embeint.com>
Handle `MODEM_CELLULAR_EVENT_SUSPEND` while waiting in
`MODEM_CELLULAR_STATE_AWAIT_PPP_DEAD`. Failure to do so can lead to the
modem never powering down once `MODEM_CELLULAR_EVENT_PPP_DEAD` does
arrive.
Assisted-by: Claude:opus-5.5
Signed-off-by: Jordan Yates <jordan@embeint.com>
rf2xx_trx_rx() takes the frame length from the PHR byte reported by
the transceiver and uses it to size the frame buffer read into the
132 byte stack buffer rx_buf and to index the LQI, ED and TRAC bytes
that follow the PSDU. Bit 7 of the PHR is reserved and is not masked,
and the value was only checked against the minimum length, and only
outside promiscuous mode.
A PHR between 128 and 250 makes the frame read overrun rx_buf. A
larger PHR wraps the uint8_t frame_len and the following accesses
read past the end of rx_buf.
Drop frames whose length exceeds RF2XX_MAX_PSDU_LENGTH in every mode.
Tested by building drivers.ieee802154.build.external on native_sim.
Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
The PCA/PCAL series I2C GPIO expanders have a polarity inversion
register on every supported part, but the driver has it fully
commented out ("unused, omitted") in the register tables, cache maps
and reg_type enum, so it was never wired up.
Add a polarity-inversion devicetree property (32b, default 0, covering
up to 4 ports / p3.7..p0.0) and write it to the polarity inversion
register during reset, alongside the existing output_port/configuration
reset writes. The value is converted with sys_cpu_to_le32() before the
write, matching how every other multi-byte register write in this
driver already handles byteorder (e.g. the 2b_interrupt_edge write),
since the register spans up to 4 bytes depending on part_cfg->port_no.
Enabling the register also makes it cacheable like output_port and
configuration, so the cache-map arrays for all three register table
families (pca953x, pcal953x, pcal65xx) have every subsequent cache
slot index shifted by one, and the base cache-size count used by
GPIO_PCA_GET_CACHE_SIZE_BY_PART_NO_NO_INT goes from 2 to 3. The
per-part register address tables only needed the already-documented
address uncommented, since those are fixed hardware addresses.
Verified by hand that the cache-size formula still matches the
highest cache-map index for both the smallest (pca953x, no latch/pull)
and largest (pcal65xx, latch+pull+int_extend, up to 4 ports) part
families after the shift.
Signed-off-by: Jens Korinth <jnsk@tuta.io>
Shell dictionary entries encode enum constants as pointer-sized user data.
Recover the integer before converting to an enum so Clang can build the ADC
shell on 64-bit native_sim without a void-pointer-to-enum-cast error.
Assisted-by: OpenCode:gpt-5.6-sol
Signed-off-by: Tobias Meyer <tobias.meyer@hula.earth>
A zero period used to return -ENOTSUP, so a channel set up once had
no way back -- the pin stayed driven for the life of the instance.
Treat zero period as a release: drop to kFTM_NoPwmSignal, clear
ELSB:ELSA, and forget the saved setup. A zero pulse still means a
constant level, not a release, so a mismatched pulse now fails
-EINVAL instead. The counter keeps running throughout.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
A PWM waveform has no completion event -- nothing bounds how long it
must keep coming out except the consumer asking for something else,
and the system can otherwise idle the FTM mid-drive. A capture is in
the same spot: the busy flag only holds off system PM with
CONFIG_PM_NEED_ALL_DEVICES_IDLE=y, so the SoC could still enter a
state that stops the counter halfway through a measurement.
Hold a power state lock against the node's zephyr,disabling-power-states
for as long as a channel drives or a pair captures, keyed on a held flag
so every path stays balanced. A one-shot capture ends in the ISR, so the
flag sits behind a spinlock. Inert without a declared state.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
The driver only brought itself up once from init(), with no PM
hooks, so the clock and counter kept running through every low
power transition.
Implement all four PM actions: SUSPEND halts the counter, gates the
clock and tears down any capture; RESUME reprograms from scratch and
replays the saved setup. TURN_OFF and TURN_ON are no-ops; RESUME
always follows TURN_ON. Capture is never replayed -- a restarted
counter invalidates it.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
A dual edge capture reads the counter at both edges, so it can't
halt mid-measurement -- but nothing told PM that, leaving a reading
free to be cut in half by a low power transition.
Hold pm_device_busy_set() while a pair is armed, and drop it once no
pair is capturing, checking mcux_ftm_capture_pending() rather than
assuming. The flag is advisory outside CONFIG_PM_NEED_ALL_DEVICES_IDLE=y,
but a capture needs the whole instance left alone.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
CNTIN sits at zero, so a period lasts MOD + 1 ticks, but the driver
loaded the tick count straight into MOD: one tick too long, and 100%
unreachable, since output only holds high the full period once CnV
exceeds MOD -- leaving a one-tick notch at 100%.
Subtract one on both paths that program MOD. The capture path now
rolls over every 0xFFFF ticks, matching the period_cycles it records.
The capture math made the same mistake: it counted each rollover as
MOD ticks, so every overflow between the two edges lost one tick.
Count it as MOD + 1.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add memc drivers for the NXP Smart External Memory Controller (SEMC)
and for SDRAM devices attached to it. The controller driver provides
reconfigure/soft-reset and SDRAM/SRAM/NOR/NAND configuration entry
points, while the SDRAM device driver is configured from devicetree
timing properties and implements the generic memc API
(get_mem_base/get_size; read/write default to a memcpy).
Switch the imxrt SoC dtsi files to the new nxp,semc compatible and
keep the SEMC node disabled by default, since the ROM boot code may
already initialize external memory that the kernel runs from.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
IF_ENABLED expands UART_NRF_UARTE_DEVICE before discarding declarations
for disabled instances. Select the declaration macro before invoking it
to avoid this work.
For blinky on nrf54l15dk/nrf54l15/cpuapp, uncached compilation of
uart_nrfx_uarte.c drops from approximately 4.7 s to 1.3 s.
Assisted-by: Codex:GPT-6
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Using new symbol if available to select proper clock
source. Reqires nrfx API version bump to 4.7.0.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
The one-shot decoder wrote struct sensor_value results, while callers
pass a struct sensor_three_axis_data for the accel channels as with
every other decoder, and it returned 0 instead of the number of
decoded frames.
Decode one-shot samples to q31 with the same shift as the stream
decoder, fill the header, and return 1.
Tested on an apard32690 with the eval_adxl372_ardz shield: the
one_shot_read tests of the RTIO stream suite in #123186 now get one
decoded frame, and its values match the mean of the streamed frames.
Assisted-by: Claude:claude-opus-5.5
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
When a stream ends with an error, for example because the RTIO
mempool has no buffer for the next FIFO drain, the FIFO is left full
and INT1 stays asserted. fifo_full_irq stays set, so the next
adxl372_submit_stream() skips the FIFO flush and reconfiguration, and
the new stream never gets an edge.
Clear fifo_full_irq on every error exit so the next stream flushes
and restarts the FIFO.
Tested on an apard32690 with the eval_adxl372_ardz shield: the
restart_after_pool_exhausted test of the RTIO stream suite in #123186
fails without this change and passes with it.
Assisted-by: Claude:claude-opus-5.5
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
Once a stream is cancelled the FIFO keeps filling and INT1 fires with
no stream pending. The interrupt handler and the status callback then
return without clearing fifo_full_irq, so the next
adxl372_submit_stream() skips the FIFO flush and reconfiguration,
INT1 stays high and the new stream never gets an edge.
Clear fifo_full_irq on those early returns, as the ADXL345 driver does
since commit c627cf26d1 ("drivers: sensor: adxl345: RTIO stream
fix").
Tested on an apard32690 with the eval_adxl372_ardz shield: the
restart_after_idle and restart_cycles tests of the RTIO stream suite
in #123186 fail without this change and pass with it.
Assisted-by: Claude:claude-opus-5.5
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
When a stream ends with an error, for example because the RTIO
mempool has no buffer for the next FIFO drain, the FIFO is left above
its watermark and the edge-triggered interrupt line stays asserted.
fifo_watermark_irq stays set, so the next adxl345_submit_stream()
skips the reconfiguration that flushes the FIFO, and the new stream
never gets an interrupt.
Clear fifo_watermark_irq on every error exit, as is already done when
an interrupt arrives with no stream pending, so the next stream
flushes and restarts the FIFO.
Tested on an apard32690 with the pmod_acl shield: the
restart_after_pool_exhausted test of the RTIO stream suite in #123186
fails without this change and passes with it; the other tests of the
suite pass either way.
Assisted-by: Claude:claude-opus-5.5
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
nxp_mrt_init_common() enables the MRT bus clock and leaves it on. The
module's suspend and resume actions do not change the clock.
Per MCX N23x RM Rev. 4_RC2 section 36.3.2 ("Clocking"), the single bus
clock controls register access and clocks the MRT counters. Gate it on
SUSPEND and enable it on RESUME.
TURN_ON borrows the clock while resetting and initializing all channels,
then returns it. TURN_OFF has nothing to release after SUSPEND. Channel
runtime references acquire the module through their power-domain
relationship and keep the shared clock enabled.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Runtime requests acquire a channel's power domain only when runtime PM is
enabled on that channel and power-domain support is enabled. A request on a
channel without runtime PM returns without claiming the module.
Require power-domain support and automatic runtime PM on every enabled
channel when the module automatically enables runtime PM. Check both per-
node and global automatic enablement and leave disabled channels out of the
requirement.
Keep channel-only runtime PM valid when the module remains active.
Applications changing enablement explicitly must maintain the same
dependency.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
