Commit graph

8801 commits

Author SHA1 Message Date
Khaoula Bidani
496517c032 dts: arm: st: add stm32u385 dtsi files
Provide support for the ST32U385 series

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Amneesh Singh
c7a21c3da5 soc: ti: k3: add AM2434 support
Add SoC support and device trees for Texas Instruments AM2434 SoC. Both R5
and M4 cores are supported here.

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Alvis Sun
35faf60c94 dts: timer: npcx: add clock-frequency property
Add clock-frequency property for SYS_CLOCK_HW_CYCLES_PER_SEC .

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-06-16 14:13:55 +02:00
Tim Lin
a62f157118 drivers/espi: ite: Add it51xxx compatibility with it8xxx2 support retained
The driver originally supported only it8xxx2 series. This updates
introduces compatibility allow it to also support it51xxx series
with minimal changes.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-06-16 14:12:44 +02:00
Rene Colato
7fa815c929 regulator: Updated function call use flag that initalizes GPIO.
Fixes bug where GPIO_ACTIVE_LOW would not initialize properly.

Signed-off-by: Rene Colato <rcolato@boston-engineering.com>
2025-06-16 14:12:03 +02:00
S Mohamed Fiaz
aaf21a4c9e soc: silabs: siwx91x: Add configurable power profile support via DeviceTree
This commit adds support for configuring the power/performance
profile for the siwx91x device using a generic
'power-profile' property in DeviceTree.
The property is available for NWP nodes,
allowing flexible selection of power management
profiles per application or board via overlay.

Signed-off-by: S Mohamed Fiaz <fiaz.mohamed@silabs.com>
2025-06-13 10:08:38 -07:00
S Mohamed Fiaz
132247e2cd soc: silabs: siwx91x: Add siwx91x Power Manager driver
This commit enables the Power Manager driver
support for the siwx91x device.

Signed-off-by: S Mohamed Fiaz <fiaz.mohamed@silabs.com>
2025-06-13 10:08:38 -07:00
Aksel Skauge Mellbye
a688b9112a dts: bindings: debug: Add Silicon Labs Packet Trace Interface
Add bindings and DTS nodes for the Packet Trace Interface of the radio.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-06-13 11:12:20 +02:00
Khanh Nguyen
c6de306949 drivers: pwm: Update Renesas RA PWM driver to integrate Renesas ELC
Update the Renesas RA PWM driver to integration
with the Renesas Event Link Controller.

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-06-13 10:09:35 +02:00
Khanh Nguyen
83fe349ad5 dts: arm: renesas: ra: add ELC node and enums for RA SoCs
Add ELC nodes to RA SoC DTS files and provide
device-specific ELC signal enums for Devicetree bindings

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-06-13 10:09:35 +02:00
Khanh Nguyen
ed757ca290 drivers: misc: add Renesas RA ELC driver
Add support for the Renesas RA Event Link Controller, including
driver sources, Kconfig, and Devicetree bindings.

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-06-13 10:09:35 +02:00
Adam Kondraciuk
8cc7c2992a dts: nordic: Add channels property for local DPPI
Add number of channels implemented by the local DPPIC instances.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
2025-06-13 07:36:19 +02:00
Kevin Shaju
7e56d134c2 drivers: net: phy: Add tja11xx driver
Adds the c22 tja11xx driver.

Signed-off-by: Kevin Shaju <kevin.shaju@accenture.com>
2025-06-12 15:04:32 -07:00
Marcin Wierzbicki
67edf2292a boards: nxp: add support for S32K148 evaluation board
Support for NXP S32K148 evaluation board (s32k148_evb).

Adapt samples: adc_dt, adc_sequence.
Adapt tests: adc_api, gpio_basic_api, gpio_hogs.

Signed-off-by: Marcin Wierzbicki <marcin.wierzbicki@accenture.com>
2025-06-12 15:04:32 -07:00
Andrej Butok
0ec2f5ad6f dts: nxp: rt1024: fix jedec-id for on-chip flash
Fixes the JEDEC-ID value of the W25Q32JVWJ on-chip flash of RT1024.
It was incorrectly set to the value for the different IS25WP064 chip.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-06-12 09:40:31 -07:00
Scott Worley
ef02567cc1 dts: arm: microchip: Organize MEC parts into a subfolder
Microchip is adding more non-MEC devices to Zephyr such as
SAM and PIC32. Each device family will have its own subfolder.
We moved the existing MEC DTSI files into a new mec subfolder.
We also updated the existing MEC boards include paths.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-06-12 09:35:29 -07:00
Krzysztof Chruściński
9caab5b23f dts: bindings: nordic-nrf-nfct-v2: Extend description
Add information about nfct node status. For cpuapp status is irrelevant
because NFCT is by default assigned to cpuapp but for cpurad node needs
to have reserved status.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-06-12 11:46:21 +02:00
Krzysztof Chruściński
b84dd5b600 dts: vendor: nordic: Fix nfct compatible
Use nordic,nrf-nfct-v2 compatible in the main nrf54h20 devicetree
description.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-06-12 11:46:21 +02:00
Fin Maaß
dfb5a31b3e drivers: ethernet: phy: add dt prop for default speeds
add dt prop for default speeds, that the phy is
configured on init by default.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-06-12 11:44:46 +02:00
Jordan Yates
5dcaf077e7 regulator: npm1300: configure active discharge
Configure the active discharge feature for both the BUCK and LDO/LDSW
blocks through the appropriate registers.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-12 11:40:32 +02:00
Jordan Yates
c458d92cf1 dts: nordic: rng_hci disabled by default
As a software construct that depends upon Bluetooth being enabled,
this device should not be enabled by default. Most nRF SoC's have
internal `RNG` hardware that is much more efficient to access.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-12 11:28:43 +02:00
Jordan Yates
864d818a41 dts: nordic: nrf5340: enable rng_hci
Explicitly enable `rng_hci` on nRF5340 application core boards, as the
application core dos not have access to a dedicated RNG hardware
peripheral (limited to the network core).

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-12 11:28:43 +02:00
Neil Chen
ab3d2dc830 boards: frdm_mcxa153,frdm_mcxa156: add hwinfo support
1. enable hwinfo support
   - device_id_get
   - get_reset_cause
   - get_supported_reset_cause
   - clear_reset_cause
2. verified tests/drivers/hwinfo

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-06-12 10:24:40 +02:00
Jiafei Pan
42ae45c1f9 dts: nxp_mimx943_a55: add GPIO device nodes
Added all GPIO device nodes in i.MX 943 Cortex-A Core SoC dts.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-06-11 18:31:10 -07:00
Silicon Signals
ba36bf6c0a audio: codec: Add driver for MAX98091 codec
This patch adds a minimal driver for the MAX98091 audio codec.
Currently, playback functionality is supported.

Co-developed-by: Rutvij Trivedi <rutvij.trivedi@siliconsignals.io>
Signed-off-by: Rutvij Trivedi <rutvij.trivedi@siliconsignals.io>
Co-developed-by: Tarang Raval <tarang.raval@siliconsignals.io>
Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
Signed-off-by: Silicon Signals <siliconsignalsforgit@gmail.com>
2025-06-11 16:17:08 -07:00
Julien Panis
2d98ac0f0b dts: arm: ti: cc23x0: Add DMA mode support to AES module
Add support to use DMA mode with cc23x0 AES module. This consists in
specifying the DMA channels and peripherals.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-11 16:06:55 -07:00
Julien Panis
e0f02d93a6 drivers: crypto: cc23x0: Add support for DMA mode
Two DMA channels are assigned to AES channels A and B respectively.
Each channel A/B has an interface to control the conditions that will
generate requests on the related DMA channel: trigger condition,
R/W address, and DMA done action.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-11 16:06:55 -07:00
Johann Fischer
79a80730b2 usb: device_next: allow to use label as interface string descriptor
The intention was to use the "interface-name" string property in the
interface string descriptor, but using the label property is acceptable
again. Therefore, allow the use of the DT label property string in the
interface string descriptor.

Follow exactly the same approach as in the CDC ACM implementation
introduced in the commit b0791400f6
("usb: device_next: cdc_acm: allow setting the interface description").

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-06-11 08:18:30 +02:00
Yangbo Lu
030d5bd735 dts: arm: nxp: add i.MX943 M33 dtsi file
Added i.MX943 M33 dtsi file for basic support.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-06-10 22:07:17 +02:00
Shreyas Shankar
73e6ca23eb ti: j722s: Fix reg length in pinctrl as per TRM description
In j722s_main.dtsi, the pinctrl block must have reg length 0x2b0
As per TRM, PADCONFIG registers range from 0 to 171.
Thus, length = (171-0+1)*4 = 172*4 = 0x2b0.

Reference: https://www.ti.com/lit/ds/symlink/tda4ven-q1.pdf
Table 5.1 contains data on PADCONFIG registers.

Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
2025-06-10 22:06:50 +02:00
Saravanan Sekar
3fe1eda7fb dts: arm: ti: mspm0: Add a support for TI MSPM0 Timer Counter
Add a support for TI MSPM0 Timer which has sub module for Counter,
Timer Capture and Timer Compare.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-06-10 10:25:10 -04:00
Saravanan Sekar
7a3f79ef86 drivers: counter: Add a support for TI MSPM0 Timer counter
TI MSPM0 SoC series has General Purpose Timer and Advanced control timers
with Counting module, Capture block (measure input signal period/time) and
Compare block (to generate time expiry, output waveform like PWM).

Add a support for counter driver with alarm and counter top functions.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-06-10 10:25:10 -04:00
Krzysztof Chruściński
28cfb3fecd dts: pwm: nordic: Add idleout-supported property
Add property which indicates that PWM instance supports IDLEOUT
feature. Add property to all instances that supports it.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-06-10 10:24:16 -04:00
Romain Jayles
778b2dfc40 dts: stm32wba: split temperature calibration address between socs
The temperature calibration addresses of ts-cal1-addr and ts-cal2-addr
are not shared between stm32wba5 and stm32wba6 these addresses are now
separated to the dedicated device-tree

Signed-off-by: Romain Jayles <romain.jayles@st.com>
2025-06-10 13:29:47 +02:00
Jérôme Pouiller
033ffd1a2c boards: silabs: siwx91x: Fix test for memory controller
tests/drivers/memc/ram requires the board contains a node labeled
"memc"/.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-06-10 13:28:48 +02:00
Julien Panis
a92339b8cd dts: arm: ti: cc23x0: Add DMA mode support to UART module
Add support to use DMA mode with cc23x0 UART module. This consists in
specifying the DMA channels and peripherals.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:08:22 +02:00
Julien Panis
fa199b6f6c drivers: serial: cc23x0: Add support for DMA mode
Two DMA channels are assigned to TX and RX respectively:
- A TX DMA request is asserted when there is space in the FIFO.
- A RX DMA request is asserted when data is in the FIFO.

When DMA is enabled for a peripheral, the DMA transfer completion is
signaled on the peripheral's interrupt only (here UART's interrupt).
It is not signaled on the DMA dedicated interrupt.

Also, when DMA is enabled for a peripheral, the DMA controller stops
the normal transfer interrupts for this peripheral from reaching the
NVIC (the interrupts are still reported in the interrupt registers of
the peripheral). Thus, when a large amount of data is transferred using
DMA, instead of receiving multiple interrupts from the peripheral as
data flows, the NVIC receives only one interrupt when the transfer
completes (unmasked peripheral error interrupts continue to be sent
to the NVIC).

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:08:22 +02:00
Julien Panis
b3a32a95d1 dts: arm: ti: cc23x0: Add DMA mode support to ADC module
Add support to use DMA mode with cc23x0 ADC module. This consists in
specifying the DMA channel and peripheral.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:07:54 +02:00
Julien Panis
45a8a0f0c6 drivers: adc: cc23x0: Add support for DMA mode
The ADC has a dedicated interface for communicating with the DMA.
The ADC module provides four interrupt sources (one for each
conversion result storage register) which can be configured to
source the DMA trigger.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:07:54 +02:00
Sai Santhosh Malae
34982b1465 drivers: adc: siwx91x: DTS changes for siwx91x ADC driver
1. Create a YAML file for ADC node
2. Add ADC node in the siwx917.dtsi

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-06-10 12:07:33 +02:00
Adam Mitchell
dcf94aaf7b dts: arm: st: h7: Add support for STM32H742
Adds base Devicetree files for H742Xi/g variants

Signed-off-by: Adam Mitchell <adam.mitchell@brillpower.com>
2025-06-10 08:51:45 +02:00
Furkan Akkiz
e5fb161de4 dts: arm: adi: Add MAX32657 DMA instances and binding file
Add DMA0 and DMA1 nodes to MAX32657 dtsi file and add binding file
for DMA slots.

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
2025-06-10 08:47:42 +02:00
Raffael Rostagno
0dd3274a92 dts: esp32c2: esp8684: Add GDMA support
Add GDMA peripheral to device tree.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-06-09 14:35:51 -07:00
Sudan Landge
5a3c4941a2 pinctrl: add support for mps4
Add MPS4 pinctrl support by referring to
`mps4/common/partition/platform_base_address.h`
from TF-M's main branch.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-06-09 14:35:12 -07:00
Harris Tomy
ab6c6b44f3 dts: stm32u5: Removes trailing 'U's in dt props
Integers in devicetree are always signed.
See https://github.com/zephyrproject-rtos/zephyr/pull/89978#discussion_r2124113613

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Harris Tomy
d280d89214 dts/kconfig: stm32u5: add f9 and clean up dts node locations
Adds skeleton dtsi for u5f9 for u5g9 to inherit from

Moves the peripheral nodes into dtsi's that actually has the peripheral
and includes them for SoC's higher in the series where applicable.

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Harris Tomy
97876b5d1e dts: stm32u5: add memory package variants
Corrects stm32u53/45xx variants and adds u575Xg and u599Xi

Signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Jordan Yates
25249a010a dts: st: stm32l4p5: re-add SDMMC idma property
The `idma` property added in 94847be1 was removed in the re-organisation
in 306dea6f. Re-add the property at a more generic location.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-09 10:27:03 +01:00
Phuc Pham
14ab7d8494 drivers: gpio: Add support for RZ/G2UL
Add GPIO support for RZ/G2UL

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-06-09 10:26:45 +01:00
Phuc Pham
da26dbd08a drivers: pinctrl: Add support for Renesas RZ/G2UL
Add pinctrl support for Renesas RZ/G2UL

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-06-09 10:26:45 +01:00