Commit graph

10,053 commits

Author SHA1 Message Date
Mathieu Choplain
5a7c028041 dts: arm: st: stm32l4: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
0a26950285 dts: arm: st: stm32l1: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
535c056d3e dts: arm: st: stm32l0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
4581596a16 dts: arm: st: stm32h7rs: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
2a14f656ca dts: arm: st: stm32h7: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
20136226eb dts: arm: st: stm32h5: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
4413b3b170 dts: arm: st: stm32g4: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
817632a8c9 dts: arm: st: stm32g0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
a6a5793c87 dts: arm: st: stm32f7: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
445fe1be66 dts: arm: st: stm32f4: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
2f983bc9c7 dts: arm: st: stm32f3: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
0b68eb1d60 dts: arm: st: stm32f2: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
00d1308013 dts: arm: st: stm32f1: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
4ae7819b0c dts: arm: st: stm32f0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
c0ac2199ee dts: arm: st: stm32c0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant.

There is no consistency about which level of the DTSI inclusion hierarchy
the macros from this header start being used, so including it from the root
file ensures they are always visible and available without headache. Today,
there are places where the header is included twice or more at different
DTSI inclusion hierarchy levels because of this ambiguity - this commit
solves the issue once and for all.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Tony Han
fc42cc662f dts: arm: microchip: sama7g5: add DMA Controller (XDMAC) support
Add dma nodes to sama7g5.dtsi file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Tony Han
f373992271 dts: microchip: add the DTSI file for sama7d6 SoCs
Add the base DTSI file for Microchip sama7d6 SoCs.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:09 +03:00
Lin Yu-Cheng
fed6a9d9b5 driver: espi: implement espi PM function
1. add cs pin as espi driver wake up reference
2. removed the unnecessary update of the cached date
3. removed the unnecessary busy wait in notify funciton

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-10-21 17:25:10 +03:00
Dag Erik Gjørvad
de402cb465 boards: nordic: Add initial support for nRF54LM20A/ns
Add board files for nRF54LM20A/ns.
Update existing nRF54LM20A board files to support this.

Signed-off-by: Dag Erik Gjørvad <dag.erik.gjorvad@nordicsemi.no>
2025-10-21 17:24:11 +03:00
Hieu Nguyen
6ca258e9cc dts: renesas: Add SPI support for Renesas RZ/V2L, A3UL
Add SPI nodes to Renesas RZ/V2L, A3UL

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-10-21 17:23:23 +03:00
Muhammed Asif
3c93b11a74 dts: arm: microchip: add tcc node for pwm peripheral
Adds the dts nodes for pwm driver using tcc peripheral.

Signed-off-by: Muhammed Asif <Muhammed.Asif@microchip.com>
2025-10-21 17:23:02 +03:00
Muhammed Asif
accc980a47 dts: bindings: microchip: add tcc node for pwm peripheral
Adds binding YAMLs for pwm peripheral

Signed-off-by: Muhammed Asif <Muhammed.Asif@microchip.com>
2025-10-21 17:23:02 +03:00
Fin Maaß
fc7a01a8b1 boards: litex: move changeable peripherals to board
move changeable peripherals from dtsi to board, as
in litex these can change and might be on
different registers on custom out of tree
boards. So we limit riscv32-litex-vexriscv.dtsi
to just the interrupt controller and the cpu,
which don't change.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-10-21 17:22:40 +03:00
Tim Pambor
91d3d95313 drivers: ethernet: adin1100: add support for hardware reset
Add support for hardware reset via GPIO in the ADIN1100 PHY driver.

The reset pin is configured via device tree using the reset-gpios
property.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-10-21 14:16:38 +03:00
farsin NASAR V A
e37c115c36 dts: arm: microchip: add RSTC node and binding for G1 IP
Add the device tree node and the binding file for
microchip RSTC G1 IP.

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-10-21 14:15:33 +03:00
Tony Han
cf694d7bf1 dts: microchip: sam: sama7g5: add node for TRNG
Add node TRNG (True Random Number Generator) to sama7g5.dtsi file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 11:43:39 +03:00
Andrew Featherstone
0848fd98c1 dts: bindings: clock: rpi_pico: Update default value to match v2.2.0 SDK
v2.1.1 onwards of the SDK increases the default. Update the binding to
match. See https://github.com/raspberrypi/pico-sdk/pull/2245

Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
2025-10-21 11:43:28 +03:00
Immo Birnbaum
cc44834d02 dts: xilinx: zynq7000: zynqmp: remove amba-ahb-dbus-width parameter
Remove the obsolete DT parameter "amba-ahb-dbus-width" from all GEM
controller instance declarations for both the Zynq-7000 and the
ZynqMP.

The value matching the current target SoC is now being read at
run-time from a design configuration register

Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
2025-10-21 11:43:03 +03:00
Immo Birnbaum
cdc8325307 dts: bindings: remove AMBA AHB bus width parameter from xlnx,gem binding
This parameter no longer needs to be configured at the SoC level in
the declarations of the GEM controller instances (used to require
different values for the Zynq-7000 and the ZynqMP) as the value matching
the current target SoC is now being read at run-time from a design
configuration register.

Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
2025-10-21 11:43:03 +03:00
Hou Zhiqiang
998011cec6 dts: arm: imx93: add DT node for MU1
Add device-tree node for MU1 (Message Unit instance 1), which is used
for communication between Cortex-A55 and Cortex-M33.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-10-21 11:42:38 +03:00
Zhaoxiang Jin
96e70b08ef drivers: audio: Add dialog da7212 driver
Add dialog da7212 driver. dialog da7212
datasheet:https://www.farnell.com/datasheets/3962888.pdf

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-10-21 11:42:06 +03:00
Tony Han
399ba3d373 dtsi: microchip: sam: add PWM nodes for sama7g5
Add the PWM node to sama7g5.dtsi file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-20 19:19:20 -04:00
COUSSEMENT Stijn
523eed2d08 drivers: sensor: ti: Add TI temp sensor HDC302x
The HDC302X sensor driver is added,
you can use this driver to read temperature and humidity.
Also set an offset, upper and lower limits to get warned
when temperature or humidity get out of band.
The sensor is build for ultra low power applications.

Signed-off-by: COUSSEMENT Stijn <stijn.coussement@psicontrol.com>
2025-10-20 19:19:09 -04:00
Zhaoxiang Jin
ed66a1bbdb dts: nxp: add pmc-tmpsns to rt7xx dts
1. add pmc-tmpsns to rt7xx dts
2. add pmc-tmpsns to rt700 evk

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-10-20 19:18:36 -04:00
Zhaoxiang Jin
44bc475309 drivers: sensor: Enable NXP pmc tmpsns driver
This commit introduced NXP pmc temperature sensor
(pmc-tmpsns) driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-10-20 19:18:36 -04:00
Muhammed Asif
03f19824c3 dts: arm: microchip: add dtsi files for Microchip PIC32CX SG SoC series
Adds common and SoC-specific .dtsi files for the Microchip
PIC32CX SG family. These files define core peripherals,
address maps, and interrupt controller structure shared
across the PIC32CX SG variants.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-10-20 19:18:18 -04:00
Sunil Abraham
4de1acd007 dts: uart: microchip/g1: add more functionality
Add more functionality in uart driver.
Add bindings for sercom in n and p SOC variants.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-10-20 19:18:03 -04:00
Logan Saint-Germain
52d0ad2c67 drivers: sensor: max30101: Enhanced driver to support triggers
The max30101 sensor driver doesn't support triggers.
Add `.trigger_set` API and corresponding Kconfig and
device tree parameters. Add `SENSOR_CHAN_AMBIENT_LIGHT`
and `SENSOR_TRIG_OVERFLOW`.

Signed-off-by: Logan Saint-Germain <l.saintgermain@catie.fr>
2025-10-20 19:17:51 -04:00
Logan Saint-Germain
8a1371c5d6 drivers: sensor: max30101: Enable support for multiple instance
The max30101 sensor driver doesn't support multiple instance.
Update Kconfig and maxim,max30101.yaml for instance based
configuration. Propagate changes over existing files.

Signed-off-by: Logan Saint-Germain <l.saintgermain@catie.fr>
2025-10-20 19:17:51 -04:00
Zhaoxiang Jin
18d037f0b1 dts: nxp_mcxnxxx: Fixes 'dma-requests' incorrect value
Fixes incorrect 'dma-requests' value in
dts/arm/nxp/nxp_mcxn23x_common.dtsi and
dts/arm/nxp/nxp_mcxnx4x_common.dtsi. The
'dma-requests' indicates the maximum value of
the DMA request sources (slots) index supported
by DMAMUX rather than the number of request sources.

Fixes: #97389 (which introduced the incorrect values)

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-10-20 19:15:18 -04:00
Zhaoxiang Jin
fcc1b62834 dts: nxp,mcux-edma: Added description for properties
Added description for 'dma-requests' and 'dma-channels' in
dts/bindings/dma/nxp,mcux-edma.yaml.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-10-20 19:15:18 -04:00
Gerard Marull-Paretas
7e0bbc0421 dts: bindings: mtd: add jedec,qspi-nor
Ideally we should be able to just use jedec,spi-nor (to keep Linux
compatibility), but, QSPI controllers live in a limbo in Zephyr. Adding
this binding won't make things worse than they are.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-10-20 14:23:43 -04:00
Gerard Marull-Paretas
a056da260f dts: bindings: memory-controllers: drop sifli,sf32lb-mpi
No longer used.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-10-20 14:23:43 -04:00
Gerard Marull-Paretas
1b5689f59c dts: arm: sifli: sf32lb52x: adjust mpi1/2 defaults
Compatible should be set at board level, depending on how MPI IP is used
(e.g. NOR, NAND, PSRAM).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-10-20 14:23:43 -04:00
Gerard Marull-Paretas
30e8449356 dts: bindings: mtd: add sifli,sf32lb-mpi-qspi-nor
Add compatible for SiFli SF32LB MPI operating as QSPI NOR controller.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-10-20 14:23:43 -04:00
Stanislav Bobokalo
9a5634a1b7 dts: ra8: fix syntax error in r7fa8XXXX.dtsi files
The "status" property was defined after the pllX subnodes
in pll node, which violates the Devicetree Specification
v0.4, section 6.3:

"Nodes may contain property definitions and/or child node
definitions. If both are present, properties shall come
before child nodes."

This caused the Device Tree Compiler error: "Properties
must precede subnodes. Unable to parse input tree"

This commit moves the "status" property to precede all pll subnodes,
fixing the syntax error and ensuring compliance with the Devicetree
Specification.

Signed-off-by: Stanislav Bobokalo <stas.gurland@gmail.com>
2025-10-20 11:25:48 -04:00
Khoa Nguyen
4add0d3222 dts: arm: renesas: ra: Add support USB on Renesas RA8x2 devices
Add support USB on Renesas RA8x2 devices

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-20 11:24:17 -04:00
Khoa Tran
6035038a2e dts: arm: Add rtc device node for Renesas RA family
Add rtc device node to support rtc
driver on Renesas RA SoCs:
- r7fa8d1bhecbd
- r7ka8p1kflcac
- r7fa8m1ahecbd
- r7fa4l1bd4cfp

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-20 11:19:13 -04:00
Khoa Tran
ab8b5764b2 drivers: rtc: Initial driver support for RTC on Renesas RA
Add driver support for RTC on Renesas RA

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-20 11:19:13 -04:00
Khoa Tran
5c64067880 dts: arm: renesas: ra: Add battery backup node for Renesas
RA8 family

Add a battery backup (VBAT) node to the device tree for the Renesas
RA8 family. This enables support for RTC VBAT domain switching when main
power is lost.

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-20 11:19:13 -04:00